Commit d255abd6 authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Maxime Ripard

ARM: dts: sun9i: Add TODO comments for the main and low power clocks

The main (24MHz) clock on the A80 is configurable via the PRCM address
space. The low power/speed (32kHz) clock is from an external chip, the
AC100.
Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
parent afd7d66c
......@@ -128,6 +128,17 @@ clocks {
*/
ranges = <0 0 0 0x20000000>;
/*
* This clock is actually configurable from the PRCM address
* space. The external 24M oscillator can be turned off, and
* the clock switched to an internal 16M RC oscillator. Under
* normal operation there's no reason to do this, and the
* default is to use the external good one, so just model this
* as a fixed clock. Also it is not entirely clear if the
* osc24M mux in the PRCM affects the entire clock tree, which
* would also throw all the PLL clock rates off, or just the
* downstream clocks in the PRCM.
*/
osc24M: osc24M_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
......@@ -135,6 +146,13 @@ osc24M: osc24M_clk {
clock-output-names = "osc24M";
};
/*
* The 32k clock is from an external source, normally the
* AC100 codec/RTC chip. This clock is by default enabled
* and clocked at 32768 Hz, from the oscillator connected
* to the AC100. It is configurable, but no such driver or
* bindings exist yet.
*/
osc32k: osc32k_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment