Commit d29c071d authored by Sean Wang's avatar Sean Wang Committed by Matthias Brugger

dt-bindings: net: mediatek: update documentation for reset signals

Since there's no user for the property reset inside the ethernet node
for current supported MediaTek SoCs and boards, so it should be safe to
update reset property in the bindings to introduce more reset signals as
corresponding that commit 7c2adaf1 ("reset: mediatek: Add MT2701 ethsys
reset controller include file") did in order to be referenced them from
within a devicetree file.

Cc: John Crispin <john@phrozen.org>
Signed-off-by: default avatarSean Wang <sean.wang@mediatek.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 5771a8c0
......@@ -15,8 +15,10 @@ Required properties:
- clock-names: the names of the clock listed in the clocks property. These are
"ethif", "esw", "gp2", "gp1"
- power-domains: phandle to the power domain that the ethernet is part of
- resets: Should contain a phandle to the ethsys reset signal
- reset-names: Should contain the reset signal name "eth"
- resets: Should contain phandles to the ethsys reset signals
- reset-names: Should contain the names of reset signal listed in the resets
property
These are "fe", "gmac" and "ppe"
- mediatek,ethsys: phandle to the syscon node that handles the port setup
- mediatek,pctl: phandle to the syscon node that handles the ports slew rate
and driver current
......
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