Commit d367e7d3 authored by Fabio Estevam's avatar Fabio Estevam Committed by Shawn Guo

arm64: dts: imx8mq-evk: Add MIPI DSI support

imx8mq-evk has a MIPI DSI port that can be used to connect a Raydium
RM67191 panel.

Add support for it.
Signed-off-by: default avatarFabio Estevam <festevam@gmail.com>
Acked-by: default avatarGuido Günther <agx@sigxcpu.org>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent f7d48ffc
......@@ -132,6 +132,10 @@ opp-800M {
};
};
&dphy {
status = "okay";
};
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec1>;
......@@ -255,6 +259,40 @@ vgen6_reg: vgen6 {
};
};
&lcdif {
status = "okay";
};
&mipi_dsi {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
panel@0 {
pinctrl-0 = <&pinctrl_mipi_dsi>;
pinctrl-names = "default";
compatible = "raydium,rm67191";
reg = <0>;
reset-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>;
dsi-lanes = <4>;
port {
panel_in: endpoint {
remote-endpoint = <&mipi_dsi_out>;
};
};
};
ports {
port@1 {
reg = <1>;
mipi_dsi_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie0>;
......@@ -388,6 +426,12 @@ MX8MQ_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x4f
>;
};
pinctrl_mipi_dsi: mipidsigrp {
fsl,pins = <
MX8MQ_IOMUXC_ECSPI1_SCLK_GPIO5_IO6 0x16
>;
};
pinctrl_pcie0: pcie0grp {
fsl,pins = <
MX8MQ_IOMUXC_I2C4_SCL_PCIE1_CLKREQ_B 0x76
......
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