Commit d3d0502a authored by Pierre-Louis Bossart's avatar Pierre-Louis Bossart Committed by Mark Brown

ASoC: codecs: da7210: fix kernel-doc

Fix W=1 warning, the kernel-doc syntax was probably from Doxygen?
Signed-off-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Acked-by: default avatarAdam Thomson <Adam.Thomson.Opensource@diasemi.com>
Link: https://lore.kernel.org/r/20200707190612.97799-7-pierre-louis.bossart@linux.intel.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 891ba284
...@@ -971,14 +971,16 @@ static int da7210_set_dai_sysclk(struct snd_soc_dai *codec_dai, ...@@ -971,14 +971,16 @@ static int da7210_set_dai_sysclk(struct snd_soc_dai *codec_dai,
/** /**
* da7210_set_dai_pll :Configure the codec PLL * da7210_set_dai_pll :Configure the codec PLL
* @param codec_dai : pointer to codec DAI * @codec_dai: pointer to codec DAI
* @param pll_id : da7210 has only one pll, so pll_id is always zero * @pll_id: da7210 has only one pll, so pll_id is always zero
* @param fref : MCLK frequency, should be < 20MHz * @source: clock source
* @param fout : FsDM value, Refer page 44 & 45 of datasheet * @fref: MCLK frequency, should be < 20MHz
* @return int : Zero for success, negative error code for error * @fout: FsDM value, Refer page 44 & 45 of datasheet
* *
* Note: Supported PLL input frequencies are 12MHz, 13MHz, 13.5MHz, 14.4MHz, * Note: Supported PLL input frequencies are 12MHz, 13MHz, 13.5MHz, 14.4MHz,
* 19.2MHz, 19.6MHz and 19.8MHz * 19.2MHz, 19.6MHz and 19.8MHz
*
* Return: Zero for success, negative error code for error
*/ */
static int da7210_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, static int da7210_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
int source, unsigned int fref, unsigned int fout) int source, unsigned int fref, unsigned int fout)
......
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