Commit d4a4ff1c authored by Likun Gao's avatar Likun Gao Committed by Alex Deucher

drm/amdgpu: add wait_for helper for spirom update

Spirom update typically requires extremely long
duration for command execution, and special helper
function to wait for it completion.
Signed-off-by: default avatarLikun Gao <Likun.Gao@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ebbb0b10
...@@ -569,6 +569,26 @@ int psp_wait_for(struct psp_context *psp, uint32_t reg_index, ...@@ -569,6 +569,26 @@ int psp_wait_for(struct psp_context *psp, uint32_t reg_index,
return -ETIME; return -ETIME;
} }
int psp_wait_for_spirom_update(struct psp_context *psp, uint32_t reg_index,
uint32_t reg_val, uint32_t mask, uint32_t msec_timeout)
{
uint32_t val;
int i;
struct amdgpu_device *adev = psp->adev;
if (psp->adev->no_hw_access)
return 0;
for (i = 0; i < msec_timeout; i++) {
val = RREG32(reg_index);
if ((val & mask) == reg_val)
return 0;
msleep(1);
}
return -ETIME;
}
static const char *psp_gfx_cmd_name(enum psp_gfx_cmd_id cmd_id) static const char *psp_gfx_cmd_name(enum psp_gfx_cmd_id cmd_id)
{ {
switch (cmd_id) { switch (cmd_id) {
......
...@@ -455,6 +455,8 @@ extern const struct amdgpu_ip_block_version psp_v13_0_4_ip_block; ...@@ -455,6 +455,8 @@ extern const struct amdgpu_ip_block_version psp_v13_0_4_ip_block;
extern int psp_wait_for(struct psp_context *psp, uint32_t reg_index, extern int psp_wait_for(struct psp_context *psp, uint32_t reg_index,
uint32_t field_val, uint32_t mask, bool check_changed); uint32_t field_val, uint32_t mask, bool check_changed);
extern int psp_wait_for_spirom_update(struct psp_context *psp, uint32_t reg_index,
uint32_t field_val, uint32_t mask, uint32_t msec_timeout);
int psp_gpu_reset(struct amdgpu_device *adev); int psp_gpu_reset(struct amdgpu_device *adev);
int psp_update_vcn_sram(struct amdgpu_device *adev, int inst_idx, int psp_update_vcn_sram(struct amdgpu_device *adev, int inst_idx,
......
...@@ -624,10 +624,11 @@ static int psp_v13_0_exec_spi_cmd(struct psp_context *psp, int cmd) ...@@ -624,10 +624,11 @@ static int psp_v13_0_exec_spi_cmd(struct psp_context *psp, int cmd)
WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_73, 1); WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_73, 1);
if (cmd == C2PMSG_CMD_SPI_UPDATE_FLASH_IMAGE) if (cmd == C2PMSG_CMD_SPI_UPDATE_FLASH_IMAGE)
return 0; ret = psp_wait_for_spirom_update(psp, SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_115),
MBOX_READY_FLAG, MBOX_READY_MASK, PSP_SPIROM_UPDATE_TIMEOUT);
ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_115), else
MBOX_READY_FLAG, MBOX_READY_MASK, false); ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_115),
MBOX_READY_FLAG, MBOX_READY_MASK, false);
if (ret) { if (ret) {
dev_err(adev->dev, "SPI cmd %x timed out, ret = %d", cmd, ret); dev_err(adev->dev, "SPI cmd %x timed out, ret = %d", cmd, ret);
return ret; return ret;
......
...@@ -25,6 +25,8 @@ ...@@ -25,6 +25,8 @@
#include "amdgpu_psp.h" #include "amdgpu_psp.h"
#define PSP_SPIROM_UPDATE_TIMEOUT 60000 /* 60s */
void psp_v13_0_set_psp_funcs(struct psp_context *psp); void psp_v13_0_set_psp_funcs(struct psp_context *psp);
#endif #endif
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