Commit d5b4f42f authored by Daniel Cotey's avatar Daniel Cotey Committed by Greg Kroah-Hartman

Staging: silicom: bp_mod.h: checkpatch tab and space cleanup

eleventh chunk of bp_mod.h's cleanup
Signed-off-by: default avatarDaniel Cotey <puff65537@bansheeslibrary.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 97ef0a46
...@@ -463,28 +463,28 @@ static inline unsigned int jiffies_to_msecs(const unsigned long j) ...@@ -463,28 +463,28 @@ static inline unsigned int jiffies_to_msecs(const unsigned long j)
(pid == SILICOM_PE2G4BPFi35ZX_SSID)) (pid == SILICOM_PE2G4BPFi35ZX_SSID))
#define BP10G9_IF_SERIES(pid) \ #define BP10G9_IF_SERIES(pid) \
((pid==INTEL_PE210G2SPI9_SSID)|| \ ((pid == INTEL_PE210G2SPI9_SSID) || \
(pid==SILICOM_M1E10G2BPI9CX4_SSID)|| \ (pid == SILICOM_M1E10G2BPI9CX4_SSID) || \
(pid==SILICOM_M1E10G2BPI9SR_SSID)|| \ (pid == SILICOM_M1E10G2BPI9SR_SSID) || \
(pid==SILICOM_M1E10G2BPI9LR_SSID)|| \ (pid == SILICOM_M1E10G2BPI9LR_SSID) || \
(pid==SILICOM_M1E10G2BPI9T_SSID)|| \ (pid == SILICOM_M1E10G2BPI9T_SSID) || \
(pid==SILICOM_M2E10G2BPI9CX4_SSID)|| \ (pid == SILICOM_M2E10G2BPI9CX4_SSID) || \
(pid==SILICOM_M2E10G2BPI9SR_SSID)|| \ (pid == SILICOM_M2E10G2BPI9SR_SSID) || \
(pid==SILICOM_M2E10G2BPI9LR_SSID)|| \ (pid == SILICOM_M2E10G2BPI9LR_SSID) || \
(pid==SILICOM_M2E10G2BPI9T_SSID)|| \ (pid == SILICOM_M2E10G2BPI9T_SSID) || \
(pid==SILICOM_PE210G2BPI9CX4_SSID)|| \ (pid == SILICOM_PE210G2BPI9CX4_SSID) || \
(pid==SILICOM_PE210G2BPI9SR_SSID)|| \ (pid == SILICOM_PE210G2BPI9SR_SSID) || \
(pid==SILICOM_PE210G2BPI9LR_SSID)|| \ (pid == SILICOM_PE210G2BPI9LR_SSID) || \
(pid==SILICOM_PE210G2DBi9SR_SSID)|| \ (pid == SILICOM_PE210G2DBi9SR_SSID) || \
(pid==SILICOM_PE210G2DBi9SRRB_SSID)|| \ (pid == SILICOM_PE210G2DBi9SRRB_SSID) || \
(pid==SILICOM_PE210G2DBi9LR_SSID)|| \ (pid == SILICOM_PE210G2DBi9LR_SSID) || \
(pid==SILICOM_PE210G2DBi9LRRB_SSID)|| \ (pid == SILICOM_PE210G2DBi9LRRB_SSID) || \
(pid==SILICOM_PE310G4DBi940SR_SSID)|| \ (pid == SILICOM_PE310G4DBi940SR_SSID) || \
(pid==SILICOM_PEG2BISC6_SSID)|| \ (pid == SILICOM_PEG2BISC6_SSID) || \
(pid==SILICOM_PE310G4BPi9T_SSID)|| \ (pid == SILICOM_PE310G4BPi9T_SSID) || \
(pid==SILICOM_PE310G4BPi9SR_SSID)|| \ (pid == SILICOM_PE310G4BPi9SR_SSID) || \
(pid==SILICOM_PE310G4BPi9LR_SSID)|| \ (pid == SILICOM_PE310G4BPi9LR_SSID) || \
(pid==SILICOM_PE210G2BPI9T_SSID)) (pid == SILICOM_PE210G2BPI9T_SSID))
/*******************************************************/ /*******************************************************/
/* 1G INTERFACE ****************************************/ /* 1G INTERFACE ****************************************/
......
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