Commit d65dd852 authored by Helen Koike's avatar Helen Koike Committed by Mauro Carvalho Chehab

media: staging: rkisp1: add Rockchip ISP1 base driver

Add base driver for Rockchip Image Signal Processing v1 Unit, with isp
subdevice and sensor biddings.

[fixed compilation and run time errors regarding new v4l2 async API]
Signed-off-by: default avatarJacob Chen <jacob2.chen@rock-chips.com>
Signed-off-by: default avatarShunqian Zheng <zhengsq@rock-chips.com>
Signed-off-by: default avatarYichong Zhong <zyc@rock-chips.com>
Signed-off-by: default avatarJacob Chen <cc@rock-chips.com>
Signed-off-by: default avatarEddie Cai <eddie.cai.linux@gmail.com>
Signed-off-by: default avatarJeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: default avatarAllon Huang <allon.huang@rock-chips.com>
Signed-off-by: default avatarTomasz Figa <tfiga@chromium.org>
Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: default avatarEzequiel Garcia <ezequiel@collabora.com>
Signed-off-by: default avatarHelen Koike <helen.koike@collabora.com>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent 32abcc44
...@@ -40,4 +40,6 @@ source "drivers/staging/media/soc_camera/Kconfig" ...@@ -40,4 +40,6 @@ source "drivers/staging/media/soc_camera/Kconfig"
source "drivers/staging/media/phy-rockchip-dphy-rx0/Kconfig" source "drivers/staging/media/phy-rockchip-dphy-rx0/Kconfig"
source "drivers/staging/media/rkisp1/Kconfig"
endif endif
...@@ -9,3 +9,4 @@ obj-$(CONFIG_VIDEO_HANTRO) += hantro/ ...@@ -9,3 +9,4 @@ obj-$(CONFIG_VIDEO_HANTRO) += hantro/
obj-$(CONFIG_VIDEO_IPU3_IMGU) += ipu3/ obj-$(CONFIG_VIDEO_IPU3_IMGU) += ipu3/
obj-$(CONFIG_SOC_CAMERA) += soc_camera/ obj-$(CONFIG_SOC_CAMERA) += soc_camera/
obj-$(CONFIG_PHY_ROCKCHIP_DPHY_RX0) += phy-rockchip-dphy-rx0/ obj-$(CONFIG_PHY_ROCKCHIP_DPHY_RX0) += phy-rockchip-dphy-rx0/
obj-$(CONFIG_VIDEO_ROCKCHIP_ISP1) += rkisp1/
# SPDX-License-Identifier: GPL-2.0-only
config VIDEO_ROCKCHIP_ISP1
tristate "Rockchip Image Signal Processing v1 Unit driver"
depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
depends on ARCH_ROCKCHIP || COMPILE_TEST
select VIDEOBUF2_DMA_CONTIG
select VIDEOBUF2_VMALLOC
select V4L2_FWNODE
select PHY_ROCKCHIP_DPHY_RX0
default n
help
Enable this to support the Image Signal Processing (ISP) module
present in RK3399 SoCs.
To compile this driver as a module, choose M here: the module
will be called rockchip-isp1.
obj-$(CONFIG_VIDEO_ROCKCHIP_ISP1) += rockchip-isp1.o
rockchip-isp1-objs += rkisp1-common.o \
rkisp1-dev.o \
rkisp1-isp.o
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Rockchip ISP1 Driver - Common definitions
*
* Copyright (C) 2019 Collabora, Ltd.
*/
#include <media/v4l2-rect.h>
#include "rkisp1-common.h"
static const struct v4l2_rect rkisp1_sd_min_crop = {
.width = RKISP1_ISP_MIN_WIDTH,
.height = RKISP1_ISP_MIN_HEIGHT,
.top = 0,
.left = 0,
};
void rkisp1_sd_adjust_crop_rect(struct v4l2_rect *crop,
const struct v4l2_rect *bounds)
{
v4l2_rect_set_min_size(crop, &rkisp1_sd_min_crop);
v4l2_rect_map_inside(crop, bounds);
}
void rkisp1_sd_adjust_crop(struct v4l2_rect *crop,
const struct v4l2_mbus_framefmt *bounds)
{
struct v4l2_rect crop_bounds = {
.left = 0,
.top = 0,
.width = bounds->width,
.height = bounds->height,
};
rkisp1_sd_adjust_crop_rect(crop, &crop_bounds);
}
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
/*
* Rockchip ISP1 Driver - Common definitions
*
* Copyright (C) 2019 Collabora, Ltd.
*
* Based on Rockchip ISP1 driver by Rockchip Electronics Co., Ltd.
* Copyright (C) 2017 Rockchip Electronics Co., Ltd.
*/
#ifndef _RKISP1_COMMON_H
#define _RKISP1_COMMON_H
#include <linux/clk.h>
#include <linux/mutex.h>
#include <media/media-device.h>
#include <media/media-entity.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
#include <media/videobuf2-v4l2.h>
#include "rkisp1-regs.h"
#define RKISP1_ISP_MAX_WIDTH 4032
#define RKISP1_ISP_MAX_HEIGHT 3024
#define RKISP1_ISP_MIN_WIDTH 32
#define RKISP1_ISP_MIN_HEIGHT 32
#define RKISP1_RSZ_MP_SRC_MAX_WIDTH 4416
#define RKISP1_RSZ_MP_SRC_MAX_HEIGHT 3312
#define RKISP1_RSZ_SP_SRC_MAX_WIDTH 1920
#define RKISP1_RSZ_SP_SRC_MAX_HEIGHT 1920
#define RKISP1_RSZ_SRC_MIN_WIDTH 32
#define RKISP1_RSZ_SRC_MIN_HEIGHT 16
#define RKISP1_DEFAULT_WIDTH 800
#define RKISP1_DEFAULT_HEIGHT 600
#define RKISP1_DRIVER_NAME "rkisp1"
#define RKISP1_BUS_INFO "platform:" RKISP1_DRIVER_NAME
#define RKISP1_MAX_BUS_CLK 8
enum rkisp1_fmt_pix_type {
RKISP1_FMT_YUV,
RKISP1_FMT_RGB,
RKISP1_FMT_BAYER,
RKISP1_FMT_JPEG,
};
enum rkisp1_fmt_raw_pat_type {
RKISP1_RAW_RGGB = 0,
RKISP1_RAW_GRBG,
RKISP1_RAW_GBRG,
RKISP1_RAW_BGGR,
};
enum rkisp1_isp_pad {
RKISP1_ISP_PAD_SINK_VIDEO,
RKISP1_ISP_PAD_SINK_PARAMS,
RKISP1_ISP_PAD_SOURCE_VIDEO,
RKISP1_ISP_PAD_SOURCE_STATS,
RKISP1_ISP_PAD_MAX
};
/*
* struct rkisp1_sensor_async - Sensor information
* @mbus: media bus configuration
*/
struct rkisp1_sensor_async {
struct v4l2_async_subdev asd;
struct v4l2_mbus_config mbus;
unsigned int lanes;
struct v4l2_subdev *sd;
struct v4l2_ctrl *pixel_rate_ctrl;
struct phy *dphy;
};
/*
* struct rkisp1_isp - ISP sub-device
*
* See Cropping regions of ISP in rkisp1.c for details
* @sink_frm: input size, don't have to be equal to sensor size
* @sink_fmt: input format
* @sink_crop: crop for sink pad
* @src_fmt: output format
* @src_crop: output size
*
* @is_dphy_errctrl_disabled : if dphy errctrl is disabled (avoid endless interrupt)
* @frame_sequence: used to synchronize frame_id between video devices.
* @quantization: output quantization
*/
struct rkisp1_isp {
struct v4l2_subdev sd;
struct media_pad pads[RKISP1_ISP_PAD_MAX];
struct v4l2_subdev_pad_config pad_cfg[RKISP1_ISP_PAD_MAX];
const struct rkisp1_isp_mbus_info *sink_fmt;
const struct rkisp1_isp_mbus_info *src_fmt;
bool is_dphy_errctrl_disabled;
atomic_t frame_sequence;
};
struct rkisp1_vdev_node {
struct vb2_queue buf_queue;
struct mutex vlock; /* ioctl serialization mutex */
struct video_device vdev;
struct media_pad pad;
};
struct rkisp1_buffer {
struct vb2_v4l2_buffer vb;
struct list_head queue;
union {
u32 buff_addr[VIDEO_MAX_PLANES];
void *vaddr[VIDEO_MAX_PLANES];
};
};
struct rkisp1_dummy_buffer {
void *vaddr;
dma_addr_t dma_addr;
u32 size;
};
struct rkisp1_device;
struct rkisp1_debug {
struct dentry *debugfs_dir;
unsigned long data_loss;
unsigned long pic_size_error;
unsigned long mipi_error;
};
/*
* struct rkisp1_device - ISP platform device
* @base_addr: base register address
* @active_sensor: sensor in-use, set when streaming on
* @isp: ISP sub-device
*/
struct rkisp1_device {
void __iomem *base_addr;
int irq;
struct device *dev;
unsigned int clk_size;
struct clk_bulk_data clks[RKISP1_MAX_BUS_CLK];
struct v4l2_device v4l2_dev;
struct v4l2_ctrl_handler ctrl_handler;
struct media_device media_dev;
struct v4l2_async_notifier notifier;
struct rkisp1_sensor_async *active_sensor;
struct rkisp1_isp isp;
struct media_pipeline pipe;
struct vb2_alloc_ctx *alloc_ctx;
struct rkisp1_debug debug;
};
/*
* struct rkisp1_isp_mbus_info - ISP pad format info
*
* Translate mbus_code to hardware format values
*
* @bus_width: used for parallel
*/
struct rkisp1_isp_mbus_info {
u32 mbus_code;
enum rkisp1_fmt_pix_type fmt_type;
u32 mipi_dt;
u32 yuv_seq;
u8 bus_width;
enum rkisp1_fmt_raw_pat_type bayer_pat;
unsigned int direction;
};
static inline void
rkisp1_write(struct rkisp1_device *rkisp1, u32 val, unsigned int addr)
{
writel(val, rkisp1->base_addr + addr);
}
static inline u32 rkisp1_read(struct rkisp1_device *rkisp1, unsigned int addr)
{
return readl(rkisp1->base_addr + addr);
}
void rkisp1_sd_adjust_crop_rect(struct v4l2_rect *crop,
const struct v4l2_rect *bounds);
void rkisp1_sd_adjust_crop(struct v4l2_rect *crop,
const struct v4l2_mbus_framefmt *bounds);
int rkisp1_isp_register(struct rkisp1_device *rkisp1,
struct v4l2_device *v4l2_dev);
void rkisp1_isp_unregister(struct rkisp1_device *rkisp1);
const struct rkisp1_isp_mbus_info *rkisp1_isp_mbus_info_get(u32 mbus_code);
void rkisp1_isp_isr(struct rkisp1_device *rkisp1);
void rkisp1_mipi_isr(struct rkisp1_device *rkisp1);
#endif /* _RKISP1_COMMON_H */
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