Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
L
linux
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
Analytics
Analytics
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Commits
Issue Boards
Open sidebar
Kirill Smelkov
linux
Commits
d6a8536a
Commit
d6a8536a
authored
Mar 19, 2010
by
Benjamin Herrenschmidt
Browse files
Options
Browse Files
Download
Plain Diff
Merge commit 'kumar/merge' into merge
parents
bca14dd1
9d296cfa
Changes
2
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
with
3 additions
and
6 deletions
+3
-6
arch/powerpc/include/asm/ppc-opcode.h
arch/powerpc/include/asm/ppc-opcode.h
+3
-3
arch/powerpc/kernel/head_fsl_booke.S
arch/powerpc/kernel/head_fsl_booke.S
+0
-3
No files found.
arch/powerpc/include/asm/ppc-opcode.h
View file @
d6a8536a
...
@@ -25,7 +25,7 @@
...
@@ -25,7 +25,7 @@
#define PPC_INST_LDARX 0x7c0000a8
#define PPC_INST_LDARX 0x7c0000a8
#define PPC_INST_LSWI 0x7c0004aa
#define PPC_INST_LSWI 0x7c0004aa
#define PPC_INST_LSWX 0x7c00042a
#define PPC_INST_LSWX 0x7c00042a
#define PPC_INST_LWARX 0x7c00002
9
#define PPC_INST_LWARX 0x7c00002
8
#define PPC_INST_LWSYNC 0x7c2004ac
#define PPC_INST_LWSYNC 0x7c2004ac
#define PPC_INST_LXVD2X 0x7c000698
#define PPC_INST_LXVD2X 0x7c000698
#define PPC_INST_MCRXR 0x7c000400
#define PPC_INST_MCRXR 0x7c000400
...
@@ -62,8 +62,8 @@
...
@@ -62,8 +62,8 @@
#define __PPC_T_TLB(t) (((t) & 0x3) << 21)
#define __PPC_T_TLB(t) (((t) & 0x3) << 21)
#define __PPC_WC(w) (((w) & 0x3) << 21)
#define __PPC_WC(w) (((w) & 0x3) << 21)
/*
/*
* Only use the larx hint bit on 64bit CPUs.
Once we verify it doesn't have
* Only use the larx hint bit on 64bit CPUs.
e500v1/v2 based CPUs will treat a
*
any side effects on all 32bit processors, we can do this all the time
.
*
larx with EH set as an illegal instruction
.
*/
*/
#ifdef CONFIG_PPC64
#ifdef CONFIG_PPC64
#define __PPC_EH(eh) (((eh) & 0x1) << 0)
#define __PPC_EH(eh) (((eh) & 0x1) << 0)
...
...
arch/powerpc/kernel/head_fsl_booke.S
View file @
d6a8536a
...
@@ -746,9 +746,6 @@ finish_tlb_load:
...
@@ -746,9 +746,6 @@ finish_tlb_load:
rlwimi
r12
,
r11
,
32
-
19
,
27
,
31
/*
extract
WIMGE
from
pte
*/
rlwimi
r12
,
r11
,
32
-
19
,
27
,
31
/*
extract
WIMGE
from
pte
*/
#else
#else
rlwimi
r12
,
r11
,
26
,
27
,
31
/*
extract
WIMGE
from
pte
*/
rlwimi
r12
,
r11
,
26
,
27
,
31
/*
extract
WIMGE
from
pte
*/
#endif
#ifdef CONFIG_SMP
ori
r12
,
r12
,
MAS2_M
#endif
#endif
mtspr
SPRN_MAS2
,
r12
mtspr
SPRN_MAS2
,
r12
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment