Commit d70f7d31 authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Thierry Reding

ARM: tegra: Fix FLOW_CTLR_HALT register clobbering by tegra_resume()

There is an unfortunate typo in the code that results in writing to
FLOW_CTLR_HALT instead of FLOW_CTLR_CSR.

Cc: <stable@vger.kernel.org>
Acked-by: default avatarPeter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 54ecb8f7
...@@ -44,16 +44,16 @@ ENTRY(tegra_resume) ...@@ -44,16 +44,16 @@ ENTRY(tegra_resume)
cmp r6, #TEGRA20 cmp r6, #TEGRA20
beq 1f @ Yes beq 1f @ Yes
/* Clear the flow controller flags for this CPU. */ /* Clear the flow controller flags for this CPU. */
cpu_to_csr_reg r1, r0 cpu_to_csr_reg r3, r0
mov32 r2, TEGRA_FLOW_CTRL_BASE mov32 r2, TEGRA_FLOW_CTRL_BASE
ldr r1, [r2, r1] ldr r1, [r2, r3]
/* Clear event & intr flag */ /* Clear event & intr flag */
orr r1, r1, \ orr r1, r1, \
#FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG
movw r0, #0x3FFD @ enable, cluster_switch, immed, bitmaps movw r0, #0x3FFD @ enable, cluster_switch, immed, bitmaps
@ & ext flags for CPU power mgnt @ & ext flags for CPU power mgnt
bic r1, r1, r0 bic r1, r1, r0
str r1, [r2] str r1, [r2, r3]
1: 1:
mov32 r9, 0xc09 mov32 r9, 0xc09
......
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