Commit d83c82ce authored by Boris BREZILLON's avatar Boris BREZILLON Committed by Linus Walleij

pinctrl: sunxi: support multiple pin controller

Add support for multiple pin controller instances.

First remove the static definition of the sunxi gpio chip struct and fill
the dynamically struct instead.
Then define a new pin_base field in the sunxi_pinctrl_desc which will be
used to specify the gpiochip base pin.
Signed-off-by: default avatarBoris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 0aba6178
...@@ -538,19 +538,6 @@ static int sunxi_pinctrl_gpio_to_irq(struct gpio_chip *chip, unsigned offset) ...@@ -538,19 +538,6 @@ static int sunxi_pinctrl_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
return irq_find_mapping(pctl->domain, desc->irqnum); return irq_find_mapping(pctl->domain, desc->irqnum);
} }
static struct gpio_chip sunxi_pinctrl_gpio_chip = {
.owner = THIS_MODULE,
.request = sunxi_pinctrl_gpio_request,
.free = sunxi_pinctrl_gpio_free,
.direction_input = sunxi_pinctrl_gpio_direction_input,
.direction_output = sunxi_pinctrl_gpio_direction_output,
.get = sunxi_pinctrl_gpio_get,
.set = sunxi_pinctrl_gpio_set,
.of_xlate = sunxi_pinctrl_gpio_of_xlate,
.to_irq = sunxi_pinctrl_gpio_to_irq,
.of_gpio_n_cells = 3,
.can_sleep = false,
};
static int sunxi_pinctrl_irq_set_type(struct irq_data *d, static int sunxi_pinctrl_irq_set_type(struct irq_data *d,
unsigned int type) unsigned int type)
...@@ -858,11 +845,22 @@ static int sunxi_pinctrl_probe(struct platform_device *pdev) ...@@ -858,11 +845,22 @@ static int sunxi_pinctrl_probe(struct platform_device *pdev)
} }
last_pin = pctl->desc->pins[pctl->desc->npins - 1].pin.number; last_pin = pctl->desc->pins[pctl->desc->npins - 1].pin.number;
pctl->chip = &sunxi_pinctrl_gpio_chip; pctl->chip->owner = THIS_MODULE;
pctl->chip->ngpio = round_up(last_pin, PINS_PER_BANK); pctl->chip->request = sunxi_pinctrl_gpio_request,
pctl->chip->free = sunxi_pinctrl_gpio_free,
pctl->chip->direction_input = sunxi_pinctrl_gpio_direction_input,
pctl->chip->direction_output = sunxi_pinctrl_gpio_direction_output,
pctl->chip->get = sunxi_pinctrl_gpio_get,
pctl->chip->set = sunxi_pinctrl_gpio_set,
pctl->chip->of_xlate = sunxi_pinctrl_gpio_of_xlate,
pctl->chip->to_irq = sunxi_pinctrl_gpio_to_irq,
pctl->chip->of_gpio_n_cells = 3,
pctl->chip->can_sleep = false,
pctl->chip->ngpio = round_up(last_pin, PINS_PER_BANK) -
pctl->desc->pin_base;
pctl->chip->label = dev_name(&pdev->dev); pctl->chip->label = dev_name(&pdev->dev);
pctl->chip->dev = &pdev->dev; pctl->chip->dev = &pdev->dev;
pctl->chip->base = 0; pctl->chip->base = pctl->desc->pin_base;
ret = gpiochip_add(pctl->chip); ret = gpiochip_add(pctl->chip);
if (ret) if (ret)
......
...@@ -450,6 +450,7 @@ struct sunxi_pinctrl_desc { ...@@ -450,6 +450,7 @@ struct sunxi_pinctrl_desc {
int npins; int npins;
struct pinctrl_gpio_range *ranges; struct pinctrl_gpio_range *ranges;
int nranges; int nranges;
unsigned pin_base;
}; };
struct sunxi_pinctrl_function { struct sunxi_pinctrl_function {
......
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