Commit d8846023 authored by Lucas Stach's avatar Lucas Stach Committed by Stephen Boyd

clk: imx6: initialize GPU clocks

Initialize the GPU clock muxes to sane inputs. Until now they have
not been changed from their default values, which means that both
GPU3D shader and GPU2D core were fed by clock inputs whose rates
exceed the maximium allowed frequency of the cores by as much as
200MHz.

This fixes a severe GPU stability issue on i.MX6DL.

Cc: stable@vger.kernel.org
Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
Acked-by: default avatarShawn Guo <shawnguo@kernel.org>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent b1d51b44
...@@ -633,6 +633,24 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) ...@@ -633,6 +633,24 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
if (IS_ENABLED(CONFIG_PCI_IMX6)) if (IS_ENABLED(CONFIG_PCI_IMX6))
clk_set_parent(clk[IMX6QDL_CLK_LVDS1_SEL], clk[IMX6QDL_CLK_SATA_REF_100M]); clk_set_parent(clk[IMX6QDL_CLK_LVDS1_SEL], clk[IMX6QDL_CLK_SATA_REF_100M]);
/*
* Initialize the GPU clock muxes, so that the maximum specified clock
* rates for the respective SoC are not exceeded.
*/
if (clk_on_imx6dl()) {
clk_set_parent(clk[IMX6QDL_CLK_GPU3D_CORE_SEL],
clk[IMX6QDL_CLK_PLL2_PFD1_594M]);
clk_set_parent(clk[IMX6QDL_CLK_GPU2D_CORE_SEL],
clk[IMX6QDL_CLK_PLL2_PFD1_594M]);
} else if (clk_on_imx6q()) {
clk_set_parent(clk[IMX6QDL_CLK_GPU3D_CORE_SEL],
clk[IMX6QDL_CLK_MMDC_CH0_AXI]);
clk_set_parent(clk[IMX6QDL_CLK_GPU3D_SHADER_SEL],
clk[IMX6QDL_CLK_PLL2_PFD1_594M]);
clk_set_parent(clk[IMX6QDL_CLK_GPU2D_CORE_SEL],
clk[IMX6QDL_CLK_PLL3_USB_OTG]);
}
imx_register_uart_clocks(uart_clks); imx_register_uart_clocks(uart_clks);
} }
CLK_OF_DECLARE(imx6q, "fsl,imx6q-ccm", imx6q_clocks_init); CLK_OF_DECLARE(imx6q, "fsl,imx6q-ccm", imx6q_clocks_init);
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