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Commit d91ea1e0 authored by Rajendra Nayak's avatar Rajendra Nayak Committed by Bjorn Andersson
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arm64: dts: sc7180: Add OPP table for all qup devices 

qup has a requirement to vote on the performance state of the CX domain
in sc7180 devices. Add OPP tables for these and also add power-domains
property for all qup instances for uart and spi.
i2c does not support scaling and uses a fixed clock.
Reviewed-by: default avatarMatthias Kaehlcke <mka@chromium.org>
Signed-off-by: default avatarRajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1593506712-24557-3-git-send-email-rnayak@codeaurora.orgSigned-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 13cadb34
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arch/arm64/boot/dts/qcom/sc7180.dtsi
View file @ d91ea1e0
...@@ -697,6 +697,25 @@ sdhc_1: sdhci@7c4000 { ...@@ -697,6 +697,25 @@ sdhc_1: sdhci@7c4000 {
status = "disabled"; status = "disabled";
}; };
qup_opp_table: qup-opp-table {
compatible = "operating-points-v2";
opp-75000000 {
opp-hz = /bits/ 64 <75000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
required-opps = <&rpmhpd_opp_svs>;
};
opp-128000000 {
opp-hz = /bits/ 64 <128000000>;
required-opps = <&rpmhpd_opp_nom>;
};
};
qupv3_id_0: geniqup@8c0000 { qupv3_id_0: geniqup@8c0000 {
compatible = "qcom,geni-se-qup"; compatible = "qcom,geni-se-qup";
reg = <0 0x008c0000 0 0x6000>; reg = <0 0x008c0000 0 0x6000>;
...@@ -739,6 +758,8 @@ spi0: spi@880000 { ...@@ -739,6 +758,8 @@ spi0: spi@880000 {
interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>, interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>; <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
interconnect-names = "qup-core", "qup-config"; interconnect-names = "qup-core", "qup-config";
...@@ -753,6 +774,8 @@ uart0: serial@880000 { ...@@ -753,6 +774,8 @@ uart0: serial@880000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_uart0_default>; pinctrl-0 = <&qup_uart0_default>;
interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>, interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>; <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
interconnect-names = "qup-core", "qup-config"; interconnect-names = "qup-core", "qup-config";
...@@ -787,6 +810,8 @@ spi1: spi@884000 { ...@@ -787,6 +810,8 @@ spi1: spi@884000 {
interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>, interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>; <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
interconnect-names = "qup-core", "qup-config"; interconnect-names = "qup-core", "qup-config";
...@@ -801,6 +826,8 @@ uart1: serial@884000 { ...@@ -801,6 +826,8 @@ uart1: serial@884000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_uart1_default>; pinctrl-0 = <&qup_uart1_default>;
interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>, interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>; <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
interconnect-names = "qup-core", "qup-config"; interconnect-names = "qup-core", "qup-config";
...@@ -833,6 +860,8 @@ uart2: serial@888000 { ...@@ -833,6 +860,8 @@ uart2: serial@888000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_uart2_default>; pinctrl-0 = <&qup_uart2_default>;
interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>, interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>; <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
interconnect-names = "qup-core", "qup-config"; interconnect-names = "qup-core", "qup-config";
...@@ -867,6 +896,8 @@ spi3: spi@88c000 { ...@@ -867,6 +896,8 @@ spi3: spi@88c000 {
interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>, interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>; <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
interconnect-names = "qup-core", "qup-config"; interconnect-names = "qup-core", "qup-config";
...@@ -881,6 +912,8 @@ uart3: serial@88c000 { ...@@ -881,6 +912,8 @@ uart3: serial@88c000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_uart3_default>; pinctrl-0 = <&qup_uart3_default>;
interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>, interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>; <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
interconnect-names = "qup-core", "qup-config"; interconnect-names = "qup-core", "qup-config";
...@@ -913,6 +946,8 @@ uart4: serial@890000 { ...@@ -913,6 +946,8 @@ uart4: serial@890000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_uart4_default>; pinctrl-0 = <&qup_uart4_default>;
interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>, interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>; <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
interconnect-names = "qup-core", "qup-config"; interconnect-names = "qup-core", "qup-config";
...@@ -947,6 +982,8 @@ spi5: spi@894000 { ...@@ -947,6 +982,8 @@ spi5: spi@894000 {
interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>, interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>; <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
interconnect-names = "qup-core", "qup-config"; interconnect-names = "qup-core", "qup-config";
...@@ -961,6 +998,8 @@ uart5: serial@894000 { ...@@ -961,6 +998,8 @@ uart5: serial@894000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_uart5_default>; pinctrl-0 = <&qup_uart5_default>;
interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>, interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>; <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>;
interconnect-names = "qup-core", "qup-config"; interconnect-names = "qup-core", "qup-config";
...@@ -1010,6 +1049,8 @@ spi6: spi@a80000 { ...@@ -1010,6 +1049,8 @@ spi6: spi@a80000 {
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>, interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>; <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
interconnect-names = "qup-core", "qup-config"; interconnect-names = "qup-core", "qup-config";
...@@ -1024,6 +1065,8 @@ uart6: serial@a80000 { ...@@ -1024,6 +1065,8 @@ uart6: serial@a80000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_uart6_default>; pinctrl-0 = <&qup_uart6_default>;
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>, interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>; <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
interconnect-names = "qup-core", "qup-config"; interconnect-names = "qup-core", "qup-config";
...@@ -1056,6 +1099,8 @@ uart7: serial@a84000 { ...@@ -1056,6 +1099,8 @@ uart7: serial@a84000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_uart7_default>; pinctrl-0 = <&qup_uart7_default>;
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>, interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>; <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
interconnect-names = "qup-core", "qup-config"; interconnect-names = "qup-core", "qup-config";
...@@ -1090,6 +1135,8 @@ spi8: spi@a88000 { ...@@ -1090,6 +1135,8 @@ spi8: spi@a88000 {
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>, interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>; <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
interconnect-names = "qup-core", "qup-config"; interconnect-names = "qup-core", "qup-config";
...@@ -1104,6 +1151,8 @@ uart8: serial@a88000 { ...@@ -1104,6 +1151,8 @@ uart8: serial@a88000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_uart8_default>; pinctrl-0 = <&qup_uart8_default>;
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>, interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>; <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
interconnect-names = "qup-core", "qup-config"; interconnect-names = "qup-core", "qup-config";
...@@ -1136,6 +1185,8 @@ uart9: serial@a8c000 { ...@@ -1136,6 +1185,8 @@ uart9: serial@a8c000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_uart9_default>; pinctrl-0 = <&qup_uart9_default>;
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>, interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>; <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
interconnect-names = "qup-core", "qup-config"; interconnect-names = "qup-core", "qup-config";
...@@ -1170,6 +1221,8 @@ spi10: spi@a90000 { ...@@ -1170,6 +1221,8 @@ spi10: spi@a90000 {
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>, interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>; <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
interconnect-names = "qup-core", "qup-config"; interconnect-names = "qup-core", "qup-config";
...@@ -1184,6 +1237,8 @@ uart10: serial@a90000 { ...@@ -1184,6 +1237,8 @@ uart10: serial@a90000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_uart10_default>; pinctrl-0 = <&qup_uart10_default>;
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>, interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>; <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
interconnect-names = "qup-core", "qup-config"; interconnect-names = "qup-core", "qup-config";
...@@ -1218,6 +1273,8 @@ spi11: spi@a94000 { ...@@ -1218,6 +1273,8 @@ spi11: spi@a94000 {
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>, interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>; <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
interconnect-names = "qup-core", "qup-config"; interconnect-names = "qup-core", "qup-config";
...@@ -1232,6 +1289,8 @@ uart11: serial@a94000 { ...@@ -1232,6 +1289,8 @@ uart11: serial@a94000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_uart11_default>; pinctrl-0 = <&qup_uart11_default>;
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>, interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>; <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>;
interconnect-names = "qup-core", "qup-config"; interconnect-names = "qup-core", "qup-config";
......
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