memory-barriers.txt: Fix typo in pairing example
In the "general barrier pairing with implicit control depdendency" example, the last write by CPU 1 was meant to change variable x and not y. The example would be pretty uninteresting if no CPU ever changes x and the variable was initialized to zero. Signed-off-by: Scott Tsai <scottt@scottt.tw> Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
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