Commit d93023f8 authored by Wolfram Sang's avatar Wolfram Sang Committed by Simon Horman

ARM: shmobile: r7s72100: fix bus clock calculation

The picture in the datasheet is a little misleading, yet the divider of
the bus_clk is 1/3 and not 2/3.
Signed-off-by: default avatarWolfram Sang <wsa@sang-engineering.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 9ced1d47
...@@ -70,7 +70,7 @@ static struct clk pll_clk = { ...@@ -70,7 +70,7 @@ static struct clk pll_clk = {
static unsigned long bus_recalc(struct clk *clk) static unsigned long bus_recalc(struct clk *clk)
{ {
return clk->parent->rate * 2 / 3; return clk->parent->rate / 3;
} }
static struct sh_clk_ops bus_clk_ops = { static struct sh_clk_ops bus_clk_ops = {
......
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