Commit d96f234f authored by Anton Blanchard's avatar Anton Blanchard Committed by Michael Ellerman

powerpc: Avoid load hit store in setup_sigcontext()

In setup_sigcontext(), we set current->thread.vrsave then use it
straight after. Since current is hidden from the compiler via inline
assembly, it cannot optimise this and we end up with a load hit store.

Fix this by using a temporary.
Signed-off-by: default avatarAnton Blanchard <anton@samba.org>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 8eb98037
...@@ -104,6 +104,7 @@ static long setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs, ...@@ -104,6 +104,7 @@ static long setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
*/ */
#ifdef CONFIG_ALTIVEC #ifdef CONFIG_ALTIVEC
elf_vrreg_t __user *v_regs = sigcontext_vmx_regs(sc); elf_vrreg_t __user *v_regs = sigcontext_vmx_regs(sc);
unsigned long vrsave;
#endif #endif
unsigned long msr = regs->msr; unsigned long msr = regs->msr;
long err = 0; long err = 0;
...@@ -125,9 +126,13 @@ static long setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs, ...@@ -125,9 +126,13 @@ static long setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
/* We always copy to/from vrsave, it's 0 if we don't have or don't /* We always copy to/from vrsave, it's 0 if we don't have or don't
* use altivec. * use altivec.
*/ */
if (cpu_has_feature(CPU_FTR_ALTIVEC)) vrsave = 0;
current->thread.vrsave = mfspr(SPRN_VRSAVE); if (cpu_has_feature(CPU_FTR_ALTIVEC)) {
err |= __put_user(current->thread.vrsave, (u32 __user *)&v_regs[33]); vrsave = mfspr(SPRN_VRSAVE);
current->thread.vrsave = vrsave;
}
err |= __put_user(vrsave, (u32 __user *)&v_regs[33]);
#else /* CONFIG_ALTIVEC */ #else /* CONFIG_ALTIVEC */
err |= __put_user(0, &sc->v_regs); err |= __put_user(0, &sc->v_regs);
#endif /* CONFIG_ALTIVEC */ #endif /* CONFIG_ALTIVEC */
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment