Commit d99aa8d3 authored by Frank Li's avatar Frank Li Committed by Lorenzo Pieralisi

PCI: imx6: Simplify ltssm_enable() by using ltssm_off and ltssm_mask

Add drvdata::ltssm_off and drvdata::ltssm_mask to simplify
imx6_pcie_ltssm_enable(disable)() logic.

Link: https://lore.kernel.org/r/20240220161924.3871774-5-Frank.Li@nxp.comSigned-off-by: default avatarFrank Li <Frank.Li@nxp.com>
Signed-off-by: default avatarLorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
parent 0c9651c2
......@@ -76,6 +76,8 @@ struct imx6_pcie_drvdata {
const char *gpr;
const char * const *clk_names;
const u32 clks_cnt;
const u32 ltssm_off;
const u32 ltssm_mask;
};
struct imx6_pcie {
......@@ -775,18 +777,11 @@ static int imx6_pcie_wait_for_speed_change(struct imx6_pcie *imx6_pcie)
static void imx6_pcie_ltssm_enable(struct device *dev)
{
struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev);
const struct imx6_pcie_drvdata *drvdata = imx6_pcie->drvdata;
switch (imx6_pcie->drvdata->variant) {
case IMX6Q:
case IMX6SX:
case IMX6QP:
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
IMX6Q_GPR12_PCIE_CTL_2,
IMX6Q_GPR12_PCIE_CTL_2);
break;
default:
break;
}
if (drvdata->ltssm_mask)
regmap_update_bits(imx6_pcie->iomuxc_gpr, drvdata->ltssm_off, drvdata->ltssm_mask,
drvdata->ltssm_mask);
reset_control_deassert(imx6_pcie->apps_reset);
}
......@@ -794,17 +789,11 @@ static void imx6_pcie_ltssm_enable(struct device *dev)
static void imx6_pcie_ltssm_disable(struct device *dev)
{
struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev);
const struct imx6_pcie_drvdata *drvdata = imx6_pcie->drvdata;
switch (imx6_pcie->drvdata->variant) {
case IMX6Q:
case IMX6SX:
case IMX6QP:
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
IMX6Q_GPR12_PCIE_CTL_2, 0);
break;
default:
break;
}
if (drvdata->ltssm_mask)
regmap_update_bits(imx6_pcie->iomuxc_gpr, drvdata->ltssm_off,
drvdata->ltssm_mask, 0);
reset_control_assert(imx6_pcie->apps_reset);
}
......@@ -1393,6 +1382,8 @@ static const struct imx6_pcie_drvdata drvdata[] = {
.gpr = "fsl,imx6q-iomuxc-gpr",
.clk_names = imx6q_clks,
.clks_cnt = ARRAY_SIZE(imx6q_clks),
.ltssm_off = IOMUXC_GPR12,
.ltssm_mask = IMX6Q_GPR12_PCIE_CTL_2,
},
[IMX6SX] = {
.variant = IMX6SX,
......@@ -1402,6 +1393,8 @@ static const struct imx6_pcie_drvdata drvdata[] = {
.gpr = "fsl,imx6q-iomuxc-gpr",
.clk_names = imx6sx_clks,
.clks_cnt = ARRAY_SIZE(imx6sx_clks),
.ltssm_off = IOMUXC_GPR12,
.ltssm_mask = IMX6Q_GPR12_PCIE_CTL_2,
},
[IMX6QP] = {
.variant = IMX6QP,
......@@ -1412,6 +1405,8 @@ static const struct imx6_pcie_drvdata drvdata[] = {
.gpr = "fsl,imx6q-iomuxc-gpr",
.clk_names = imx6q_clks,
.clks_cnt = ARRAY_SIZE(imx6q_clks),
.ltssm_off = IOMUXC_GPR12,
.ltssm_mask = IMX6Q_GPR12_PCIE_CTL_2,
},
[IMX7D] = {
.variant = IMX7D,
......
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