Commit d9f67dbc authored by Rafael J. Wysocki's avatar Rafael J. Wysocki

Merge branch 'pm-tools'

* pm-tools:
  x86: remove unused definition of MSR_NHM_PLATFORM_INFO
  tools/power turbostat: use new name for MSR_PLATFORM_INFO
parents 8005c49d 5369a21e
...@@ -35,7 +35,7 @@ ...@@ -35,7 +35,7 @@
#define MSR_IA32_PERFCTR0 0x000000c1 #define MSR_IA32_PERFCTR0 0x000000c1
#define MSR_IA32_PERFCTR1 0x000000c2 #define MSR_IA32_PERFCTR1 0x000000c2
#define MSR_FSB_FREQ 0x000000cd #define MSR_FSB_FREQ 0x000000cd
#define MSR_NHM_PLATFORM_INFO 0x000000ce #define MSR_PLATFORM_INFO 0x000000ce
#define MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2 #define MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2
#define NHM_C3_AUTO_DEMOTE (1UL << 25) #define NHM_C3_AUTO_DEMOTE (1UL << 25)
...@@ -44,7 +44,6 @@ ...@@ -44,7 +44,6 @@
#define SNB_C1_AUTO_UNDEMOTE (1UL << 27) #define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
#define SNB_C3_AUTO_UNDEMOTE (1UL << 28) #define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
#define MSR_PLATFORM_INFO 0x000000ce
#define MSR_MTRRcap 0x000000fe #define MSR_MTRRcap 0x000000fe
#define MSR_IA32_BBL_CR_CTL 0x00000119 #define MSR_IA32_BBL_CR_CTL 0x00000119
#define MSR_IA32_BBL_CR_CTL3 0x0000011e #define MSR_IA32_BBL_CR_CTL3 0x0000011e
......
...@@ -1173,9 +1173,9 @@ dump_nhm_platform_info(void) ...@@ -1173,9 +1173,9 @@ dump_nhm_platform_info(void)
unsigned long long msr; unsigned long long msr;
unsigned int ratio; unsigned int ratio;
get_msr(base_cpu, MSR_NHM_PLATFORM_INFO, &msr); get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
fprintf(stderr, "cpu%d: MSR_NHM_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr); fprintf(stderr, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
ratio = (msr >> 40) & 0xFF; ratio = (msr >> 40) & 0xFF;
fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency frequency\n", fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency frequency\n",
...@@ -1807,7 +1807,7 @@ void check_permissions() ...@@ -1807,7 +1807,7 @@ void check_permissions()
* *
* MSR_SMI_COUNT 0x00000034 * MSR_SMI_COUNT 0x00000034
* *
* MSR_NHM_PLATFORM_INFO 0x000000ce * MSR_PLATFORM_INFO 0x000000ce
* MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2 * MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2
* *
* MSR_PKG_C3_RESIDENCY 0x000003f8 * MSR_PKG_C3_RESIDENCY 0x000003f8
...@@ -1876,7 +1876,7 @@ int probe_nhm_msrs(unsigned int family, unsigned int model) ...@@ -1876,7 +1876,7 @@ int probe_nhm_msrs(unsigned int family, unsigned int model)
get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr); get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
pkg_cstate_limit = pkg_cstate_limits[msr & 0xF]; pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
get_msr(base_cpu, MSR_NHM_PLATFORM_INFO, &msr); get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
base_ratio = (msr >> 8) & 0xFF; base_ratio = (msr >> 8) & 0xFF;
base_hz = base_ratio * bclk * 1000000; base_hz = base_ratio * bclk * 1000000;
......
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