Commit da4f2b4c authored by Dave Gerlach's avatar Dave Gerlach Committed by Tony Lindgren

ARM: OMAP2+: am43xx: Add lcdc clockdomain

As described in AM437x TRM, spruhl7h, Revised January 2018, there is
an LCDC clockdomain present in the PER power domain. Although it is
entirely unused on AM437x, it should be defined along with the other
clockdomains so it can be shut off by Linux as there are no users.
Reported-by: default avatarMunan Xu <munan@ti.com>
Signed-off-by: default avatarDave Gerlach <d-gerlach@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent e42617b8
...@@ -84,6 +84,15 @@ static struct clockdomain l3s_tsc_43xx_clkdm = { ...@@ -84,6 +84,15 @@ static struct clockdomain l3s_tsc_43xx_clkdm = {
.flags = CLKDM_CAN_SWSUP, .flags = CLKDM_CAN_SWSUP,
}; };
static struct clockdomain lcdc_43xx_clkdm = {
.name = "lcdc_clkdm",
.pwrdm = { .name = "per_pwrdm" },
.prcm_partition = AM43XX_CM_PARTITION,
.cm_inst = AM43XX_CM_PER_INST,
.clkdm_offs = AM43XX_CM_PER_LCDC_CDOFFS,
.flags = CLKDM_CAN_SWSUP,
};
static struct clockdomain dss_43xx_clkdm = { static struct clockdomain dss_43xx_clkdm = {
.name = "dss_clkdm", .name = "dss_clkdm",
.pwrdm = { .name = "per_pwrdm" }, .pwrdm = { .name = "per_pwrdm" },
...@@ -173,6 +182,7 @@ static struct clockdomain *clockdomains_am43xx[] __initdata = { ...@@ -173,6 +182,7 @@ static struct clockdomain *clockdomains_am43xx[] __initdata = {
&pruss_ocp_43xx_clkdm, &pruss_ocp_43xx_clkdm,
&ocpwp_l3_43xx_clkdm, &ocpwp_l3_43xx_clkdm,
&l3s_tsc_43xx_clkdm, &l3s_tsc_43xx_clkdm,
&lcdc_43xx_clkdm,
&dss_43xx_clkdm, &dss_43xx_clkdm,
&l3_aon_43xx_clkdm, &l3_aon_43xx_clkdm,
&emif_43xx_clkdm, &emif_43xx_clkdm,
......
...@@ -68,6 +68,7 @@ ...@@ -68,6 +68,7 @@
#define AM43XX_CM_PER_ICSS_CDOFFS 0x0300 #define AM43XX_CM_PER_ICSS_CDOFFS 0x0300
#define AM43XX_CM_PER_L4LS_CDOFFS 0x0400 #define AM43XX_CM_PER_L4LS_CDOFFS 0x0400
#define AM43XX_CM_PER_EMIF_CDOFFS 0x0700 #define AM43XX_CM_PER_EMIF_CDOFFS 0x0700
#define AM43XX_CM_PER_LCDC_CDOFFS 0x0800
#define AM43XX_CM_PER_DSS_CDOFFS 0x0a00 #define AM43XX_CM_PER_DSS_CDOFFS 0x0a00
#define AM43XX_CM_PER_CPSW_CDOFFS 0x0b00 #define AM43XX_CM_PER_CPSW_CDOFFS 0x0b00
#define AM43XX_CM_PER_OCPWP_L3_CDOFFS 0x0c00 #define AM43XX_CM_PER_OCPWP_L3_CDOFFS 0x0c00
......
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