Commit dab38e7d authored by Daniel Golle's avatar Daniel Golle Committed by Kalle Valo

rt2x00: rt2800lib: support for for RT3352 with external PA

This is needed for WiFi to work e.g. on DIR-615 rev.H1 which got
external RF power amplifiers connected to the WiSoC.
Signed-off-by: default avatarDaniel Golle <daniel@makrotopia.org>
Signed-off-by: default avatarGabor Juhos <juhosg@openwrt.org>
Acked-by: default avatarStanislaw Gruszka <sgruszka@redhat.com>
Signed-off-by: default avatarKalle Valo <kvalo@codeaurora.org>
parent b8c2db58
...@@ -2302,6 +2302,12 @@ struct mac_iveiv_entry { ...@@ -2302,6 +2302,12 @@ struct mac_iveiv_entry {
/* RFCSR 36 bits for RF3053 */ /* RFCSR 36 bits for RF3053 */
#define RFCSR36_RF_BS FIELD8(0x80) #define RFCSR36_RF_BS FIELD8(0x80)
/*
* RFCSR 34:
*/
#define RFCSR34_TX0_EXT_PA FIELD8(0x04)
#define RFCSR34_TX1_EXT_PA FIELD8(0x08)
/* /*
* RFCSR 38: * RFCSR 38:
*/ */
...@@ -2313,6 +2319,18 @@ struct mac_iveiv_entry { ...@@ -2313,6 +2319,18 @@ struct mac_iveiv_entry {
#define RFCSR39_RX_DIV FIELD8(0x40) #define RFCSR39_RX_DIV FIELD8(0x40)
#define RFCSR39_RX_LO2_EN FIELD8(0x80) #define RFCSR39_RX_LO2_EN FIELD8(0x80)
/*
* RFCSR 41:
*/
#define RFCSR41_BIT1 FIELD8(0x01)
#define RFCSR41_BIT4 FIELD8(0x08)
/*
* RFCSR 42:
*/
#define RFCSR42_BIT1 FIELD8(0x01)
#define RFCSR42_BIT4 FIELD8(0x08)
/* /*
* RFCSR 49: * RFCSR 49:
*/ */
...@@ -2326,6 +2344,8 @@ struct mac_iveiv_entry { ...@@ -2326,6 +2344,8 @@ struct mac_iveiv_entry {
* RFCSR 50: * RFCSR 50:
*/ */
#define RFCSR50_TX FIELD8(0x3f) #define RFCSR50_TX FIELD8(0x3f)
#define RFCSR50_TX0_EXT_PA FIELD8(0x02)
#define RFCSR50_TX1_EXT_PA FIELD8(0x10)
#define RFCSR50_EP FIELD8(0xc0) #define RFCSR50_EP FIELD8(0xc0)
/* bits for RT3593 */ /* bits for RT3593 */
#define RFCSR50_TX_LO1_EN FIELD8(0x20) #define RFCSR50_TX_LO1_EN FIELD8(0x20)
...@@ -2473,6 +2493,8 @@ enum rt2800_eeprom_word { ...@@ -2473,6 +2493,8 @@ enum rt2800_eeprom_word {
* INTERNAL_TX_ALC: 0: disable, 1: enable * INTERNAL_TX_ALC: 0: disable, 1: enable
* BT_COEXIST: 0: disable, 1: enable * BT_COEXIST: 0: disable, 1: enable
* DAC_TEST: 0: disable, 1: enable * DAC_TEST: 0: disable, 1: enable
* EXTERNAL_TX0_PA: 0: disable, 1: enable (only on RT3352)
* EXTERNAL_TX1_PA: 0: disable, 1: enable (only on RT3352)
*/ */
#define EEPROM_NIC_CONF1_HW_RADIO FIELD16(0x0001) #define EEPROM_NIC_CONF1_HW_RADIO FIELD16(0x0001)
#define EEPROM_NIC_CONF1_EXTERNAL_TX_ALC FIELD16(0x0002) #define EEPROM_NIC_CONF1_EXTERNAL_TX_ALC FIELD16(0x0002)
...@@ -2489,6 +2511,8 @@ enum rt2800_eeprom_word { ...@@ -2489,6 +2511,8 @@ enum rt2800_eeprom_word {
#define EEPROM_NIC_CONF1_INTERNAL_TX_ALC FIELD16(0x2000) #define EEPROM_NIC_CONF1_INTERNAL_TX_ALC FIELD16(0x2000)
#define EEPROM_NIC_CONF1_BT_COEXIST FIELD16(0x4000) #define EEPROM_NIC_CONF1_BT_COEXIST FIELD16(0x4000)
#define EEPROM_NIC_CONF1_DAC_TEST FIELD16(0x8000) #define EEPROM_NIC_CONF1_DAC_TEST FIELD16(0x8000)
#define EEPROM_NIC_CONF1_EXTERNAL_TX0_PA_3352 FIELD16(0x4000)
#define EEPROM_NIC_CONF1_EXTERNAL_TX1_PA_3352 FIELD16(0x8000)
/* /*
* EEPROM frequency * EEPROM frequency
......
...@@ -3241,11 +3241,18 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, ...@@ -3241,11 +3241,18 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
/* /*
* Change BBP settings * Change BBP settings
*/ */
if (rt2x00_rt(rt2x00dev, RT3352)) { if (rt2x00_rt(rt2x00dev, RT3352)) {
rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
rt2800_bbp_write(rt2x00dev, 27, 0x0); rt2800_bbp_write(rt2x00dev, 27, 0x0);
rt2800_bbp_write(rt2x00dev, 66, 0x26 + rt2x00dev->lna_gain); rt2800_bbp_write(rt2x00dev, 66, 0x26 + rt2x00dev->lna_gain);
rt2800_bbp_write(rt2x00dev, 27, 0x20); rt2800_bbp_write(rt2x00dev, 27, 0x20);
rt2800_bbp_write(rt2x00dev, 66, 0x26 + rt2x00dev->lna_gain); rt2800_bbp_write(rt2x00dev, 66, 0x26 + rt2x00dev->lna_gain);
rt2800_bbp_write(rt2x00dev, 86, 0x38);
rt2800_bbp_write(rt2x00dev, 83, 0x6a);
} else if (rt2x00_rt(rt2x00dev, RT3593)) { } else if (rt2x00_rt(rt2x00dev, RT3593)) {
if (rf->channel > 14) { if (rf->channel > 14) {
/* Disable CCK Packet detection on 5GHz */ /* Disable CCK Packet detection on 5GHz */
...@@ -6187,6 +6194,12 @@ static void rt2800_init_rfcsr_3290(struct rt2x00_dev *rt2x00dev) ...@@ -6187,6 +6194,12 @@ static void rt2800_init_rfcsr_3290(struct rt2x00_dev *rt2x00dev)
static void rt2800_init_rfcsr_3352(struct rt2x00_dev *rt2x00dev) static void rt2800_init_rfcsr_3352(struct rt2x00_dev *rt2x00dev)
{ {
int tx0_int_pa = test_bit(CAPABILITY_INTERNAL_PA_TX0,
&rt2x00dev->cap_flags);
int tx1_int_pa = test_bit(CAPABILITY_INTERNAL_PA_TX1,
&rt2x00dev->cap_flags);
u8 rfcsr;
rt2800_rf_init_calibration(rt2x00dev, 30); rt2800_rf_init_calibration(rt2x00dev, 30);
rt2800_rfcsr_write(rt2x00dev, 0, 0xf0); rt2800_rfcsr_write(rt2x00dev, 0, 0xf0);
...@@ -6222,15 +6235,30 @@ static void rt2800_init_rfcsr_3352(struct rt2x00_dev *rt2x00dev) ...@@ -6222,15 +6235,30 @@ static void rt2800_init_rfcsr_3352(struct rt2x00_dev *rt2x00dev)
rt2800_rfcsr_write(rt2x00dev, 31, 0x80); rt2800_rfcsr_write(rt2x00dev, 31, 0x80);
rt2800_rfcsr_write(rt2x00dev, 32, 0x80); rt2800_rfcsr_write(rt2x00dev, 32, 0x80);
rt2800_rfcsr_write(rt2x00dev, 33, 0x00); rt2800_rfcsr_write(rt2x00dev, 33, 0x00);
rt2800_rfcsr_write(rt2x00dev, 34, 0x01); rfcsr = 0x01;
if (!tx0_int_pa)
rt2x00_set_field8(&rfcsr, RFCSR34_TX0_EXT_PA, 1);
if (!tx1_int_pa)
rt2x00_set_field8(&rfcsr, RFCSR34_TX1_EXT_PA, 1);
rt2800_rfcsr_write(rt2x00dev, 34, rfcsr);
rt2800_rfcsr_write(rt2x00dev, 35, 0x03); rt2800_rfcsr_write(rt2x00dev, 35, 0x03);
rt2800_rfcsr_write(rt2x00dev, 36, 0xbd); rt2800_rfcsr_write(rt2x00dev, 36, 0xbd);
rt2800_rfcsr_write(rt2x00dev, 37, 0x3c); rt2800_rfcsr_write(rt2x00dev, 37, 0x3c);
rt2800_rfcsr_write(rt2x00dev, 38, 0x5f); rt2800_rfcsr_write(rt2x00dev, 38, 0x5f);
rt2800_rfcsr_write(rt2x00dev, 39, 0xc5); rt2800_rfcsr_write(rt2x00dev, 39, 0xc5);
rt2800_rfcsr_write(rt2x00dev, 40, 0x33); rt2800_rfcsr_write(rt2x00dev, 40, 0x33);
rt2800_rfcsr_write(rt2x00dev, 41, 0x5b); rfcsr = 0x52;
rt2800_rfcsr_write(rt2x00dev, 42, 0x5b); if (tx0_int_pa) {
rt2x00_set_field8(&rfcsr, RFCSR41_BIT1, 1);
rt2x00_set_field8(&rfcsr, RFCSR41_BIT4, 1);
}
rt2800_rfcsr_write(rt2x00dev, 41, rfcsr);
rfcsr = 0x52;
if (tx1_int_pa) {
rt2x00_set_field8(&rfcsr, RFCSR42_BIT1, 1);
rt2x00_set_field8(&rfcsr, RFCSR42_BIT4, 1);
}
rt2800_rfcsr_write(rt2x00dev, 42, rfcsr);
rt2800_rfcsr_write(rt2x00dev, 43, 0xdb); rt2800_rfcsr_write(rt2x00dev, 43, 0xdb);
rt2800_rfcsr_write(rt2x00dev, 44, 0xdb); rt2800_rfcsr_write(rt2x00dev, 44, 0xdb);
rt2800_rfcsr_write(rt2x00dev, 45, 0xdb); rt2800_rfcsr_write(rt2x00dev, 45, 0xdb);
...@@ -6238,15 +6266,20 @@ static void rt2800_init_rfcsr_3352(struct rt2x00_dev *rt2x00dev) ...@@ -6238,15 +6266,20 @@ static void rt2800_init_rfcsr_3352(struct rt2x00_dev *rt2x00dev)
rt2800_rfcsr_write(rt2x00dev, 47, 0x0d); rt2800_rfcsr_write(rt2x00dev, 47, 0x0d);
rt2800_rfcsr_write(rt2x00dev, 48, 0x14); rt2800_rfcsr_write(rt2x00dev, 48, 0x14);
rt2800_rfcsr_write(rt2x00dev, 49, 0x00); rt2800_rfcsr_write(rt2x00dev, 49, 0x00);
rt2800_rfcsr_write(rt2x00dev, 50, 0x2d); rfcsr = 0x2d;
rt2800_rfcsr_write(rt2x00dev, 51, 0x7f); if (!tx0_int_pa)
rt2800_rfcsr_write(rt2x00dev, 52, 0x00); rt2x00_set_field8(&rfcsr, RFCSR50_TX0_EXT_PA, 1);
rt2800_rfcsr_write(rt2x00dev, 53, 0x52); if (!tx1_int_pa)
rt2800_rfcsr_write(rt2x00dev, 54, 0x1b); rt2x00_set_field8(&rfcsr, RFCSR50_TX1_EXT_PA, 1);
rt2800_rfcsr_write(rt2x00dev, 55, 0x7f); rt2800_rfcsr_write(rt2x00dev, 50, rfcsr);
rt2800_rfcsr_write(rt2x00dev, 56, 0x00); rt2800_rfcsr_write(rt2x00dev, 51, (tx0_int_pa ? 0x7f : 0x52));
rt2800_rfcsr_write(rt2x00dev, 57, 0x52); rt2800_rfcsr_write(rt2x00dev, 52, (tx0_int_pa ? 0x00 : 0xc0));
rt2800_rfcsr_write(rt2x00dev, 58, 0x1b); rt2800_rfcsr_write(rt2x00dev, 53, (tx0_int_pa ? 0x52 : 0xd2));
rt2800_rfcsr_write(rt2x00dev, 54, (tx0_int_pa ? 0x1b : 0xc0));
rt2800_rfcsr_write(rt2x00dev, 55, (tx1_int_pa ? 0x7f : 0x52));
rt2800_rfcsr_write(rt2x00dev, 56, (tx1_int_pa ? 0x00 : 0xc0));
rt2800_rfcsr_write(rt2x00dev, 57, (tx0_int_pa ? 0x52 : 0x49));
rt2800_rfcsr_write(rt2x00dev, 58, (tx1_int_pa ? 0x1b : 0xc0));
rt2800_rfcsr_write(rt2x00dev, 59, 0x00); rt2800_rfcsr_write(rt2x00dev, 59, 0x00);
rt2800_rfcsr_write(rt2x00dev, 60, 0x00); rt2800_rfcsr_write(rt2x00dev, 60, 0x00);
rt2800_rfcsr_write(rt2x00dev, 61, 0x00); rt2800_rfcsr_write(rt2x00dev, 61, 0x00);
...@@ -7203,7 +7236,8 @@ static int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev) ...@@ -7203,7 +7236,8 @@ static int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
/* /*
* Detect if this device has Bluetooth co-existence. * Detect if this device has Bluetooth co-existence.
*/ */
if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_BT_COEXIST)) if (!rt2x00_rt(rt2x00dev, RT3352) &&
rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_BT_COEXIST))
__set_bit(CAPABILITY_BT_COEXIST, &rt2x00dev->cap_flags); __set_bit(CAPABILITY_BT_COEXIST, &rt2x00dev->cap_flags);
/* /*
...@@ -7232,6 +7266,22 @@ static int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev) ...@@ -7232,6 +7266,22 @@ static int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
EIRP_MAX_TX_POWER_LIMIT) EIRP_MAX_TX_POWER_LIMIT)
__set_bit(CAPABILITY_POWER_LIMIT, &rt2x00dev->cap_flags); __set_bit(CAPABILITY_POWER_LIMIT, &rt2x00dev->cap_flags);
/*
* Detect if device uses internal or external PA
*/
rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom);
if (rt2x00_rt(rt2x00dev, RT3352)) {
if (!rt2x00_get_field16(eeprom,
EEPROM_NIC_CONF1_EXTERNAL_TX0_PA_3352))
__set_bit(CAPABILITY_INTERNAL_PA_TX0,
&rt2x00dev->cap_flags);
if (!rt2x00_get_field16(eeprom,
EEPROM_NIC_CONF1_EXTERNAL_TX1_PA_3352))
__set_bit(CAPABILITY_INTERNAL_PA_TX1,
&rt2x00dev->cap_flags);
}
return 0; return 0;
} }
......
...@@ -716,6 +716,8 @@ enum rt2x00_capability_flags { ...@@ -716,6 +716,8 @@ enum rt2x00_capability_flags {
CAPABILITY_DOUBLE_ANTENNA, CAPABILITY_DOUBLE_ANTENNA,
CAPABILITY_BT_COEXIST, CAPABILITY_BT_COEXIST,
CAPABILITY_VCO_RECALIBRATION, CAPABILITY_VCO_RECALIBRATION,
CAPABILITY_INTERNAL_PA_TX0,
CAPABILITY_INTERNAL_PA_TX1,
}; };
/* /*
......
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