Commit dc39bb3e authored by Oswald Buddenhagen's avatar Oswald Buddenhagen Committed by Takashi Iwai

ALSA: emu10k1: compactize E-MU routing source arrays

Use macros to avoid duplication. Arguably, this is somewhat less
legible, but future additions would grow this part of the file to
completely unmanageable dimensions.
The EMU*_COMMON_TEXTS macros will save duplication in a future commit;
I pulled them ahead to reduce churn.

While rewriting the tables anyway, rearrange them such that each card's
strings and registers are adjacent.

Also, add some static asserts to verify that the array sizes match.
Signed-off-by: default avatarOswald Buddenhagen <oswald.buddenhagen@gmx.de>
Link: https://lore.kernel.org/r/20230516093612.3536508-3-oswald.buddenhagen@gmx.deSigned-off-by: default avatarTakashi Iwai <tiwai@suse.de>
parent 9b00a1e9
...@@ -62,232 +62,123 @@ static int snd_emu10k1_spdif_get_mask(struct snd_kcontrol *kcontrol, ...@@ -62,232 +62,123 @@ static int snd_emu10k1_spdif_get_mask(struct snd_kcontrol *kcontrol,
return 0; return 0;
} }
/* #define PAIR_PS(base, one, two, sfx) base " " one sfx, base " " two sfx
* Items labels in enum mixer controls assigning source data to #define LR_PS(base, sfx) PAIR_PS(base, "Left", "Right", sfx)
* each destination
*/
static const char * const emu1010_src_texts[] = {
"Silence",
"Dock Mic A",
"Dock Mic B",
"Dock ADC1 Left",
"Dock ADC1 Right",
"Dock ADC2 Left",
"Dock ADC2 Right",
"Dock ADC3 Left",
"Dock ADC3 Right",
"0202 ADC Left",
"0202 ADC Right",
"1010 SPDIF Left",
"1010 SPDIF Right",
"1010 ADAT 0",
"1010 ADAT 1",
"1010 ADAT 2",
"1010 ADAT 3",
"1010 ADAT 4",
"1010 ADAT 5",
"1010 ADAT 6",
"1010 ADAT 7",
"DSP 0",
"DSP 1",
"DSP 2",
"DSP 3",
"DSP 4",
"DSP 5",
"DSP 6",
"DSP 7",
"DSP 8",
"DSP 9",
"DSP 10",
"DSP 11",
"DSP 12",
"DSP 13",
"DSP 14",
"DSP 15",
"DSP 16",
"DSP 17",
"DSP 18",
"DSP 19",
"DSP 20",
"DSP 21",
"DSP 22",
"DSP 23",
"DSP 24",
"DSP 25",
"DSP 26",
"DSP 27",
"DSP 28",
"DSP 29",
"DSP 30",
"DSP 31",
};
/* 1616(m) cardbus */ #define ADAT_PS(pfx, sfx) \
pfx "ADAT 0" sfx, pfx "ADAT 1" sfx, pfx "ADAT 2" sfx, pfx "ADAT 3" sfx, \
pfx "ADAT 4" sfx, pfx "ADAT 5" sfx, pfx "ADAT 6" sfx, pfx "ADAT 7" sfx
static const char * const emu1616_src_texts[] = { #define PAIR_REGS(base, one, two) \
"Silence", base ## one ## 1, \
"Mic A", base ## two ## 1
"Mic B",
"ADC1 Left", #define LR_REGS(base) PAIR_REGS(base, _LEFT, _RIGHT)
"ADC1 Right",
"ADC2 Left",
"ADC2 Right",
"SPDIF Left",
"SPDIF Right",
"ADAT 0",
"ADAT 1",
"ADAT 2",
"ADAT 3",
"ADAT 4",
"ADAT 5",
"ADAT 6",
"ADAT 7",
"DSP 0",
"DSP 1",
"DSP 2",
"DSP 3",
"DSP 4",
"DSP 5",
"DSP 6",
"DSP 7",
"DSP 8",
"DSP 9",
"DSP 10",
"DSP 11",
"DSP 12",
"DSP 13",
"DSP 14",
"DSP 15",
"DSP 16",
"DSP 17",
"DSP 18",
"DSP 19",
"DSP 20",
"DSP 21",
"DSP 22",
"DSP 23",
"DSP 24",
"DSP 25",
"DSP 26",
"DSP 27",
"DSP 28",
"DSP 29",
"DSP 30",
"DSP 31",
};
#define ADAT_REGS(base) \
base+0, base+1, base+2, base+3, base+4, base+5, base+6, base+7
/* /*
* List of data sources available for each destination * List of data sources available for each destination
*/ */
#define DSP_TEXTS \
"DSP 0", "DSP 1", "DSP 2", "DSP 3", "DSP 4", "DSP 5", "DSP 6", "DSP 7", \
"DSP 8", "DSP 9", "DSP 10", "DSP 11", "DSP 12", "DSP 13", "DSP 14", "DSP 15", \
"DSP 16", "DSP 17", "DSP 18", "DSP 19", "DSP 20", "DSP 21", "DSP 22", "DSP 23", \
"DSP 24", "DSP 25", "DSP 26", "DSP 27", "DSP 28", "DSP 29", "DSP 30", "DSP 31"
#define PAIR_TEXTS(base, one, two) PAIR_PS(base, one, two, "")
#define LR_TEXTS(base) LR_PS(base, "")
#define ADAT_TEXTS(pfx) ADAT_PS(pfx, "")
#define EMU32_SRC_REGS \
EMU_SRC_ALICE_EMU32A, \
EMU_SRC_ALICE_EMU32A+1, \
EMU_SRC_ALICE_EMU32A+2, \
EMU_SRC_ALICE_EMU32A+3, \
EMU_SRC_ALICE_EMU32A+4, \
EMU_SRC_ALICE_EMU32A+5, \
EMU_SRC_ALICE_EMU32A+6, \
EMU_SRC_ALICE_EMU32A+7, \
EMU_SRC_ALICE_EMU32A+8, \
EMU_SRC_ALICE_EMU32A+9, \
EMU_SRC_ALICE_EMU32A+0xa, \
EMU_SRC_ALICE_EMU32A+0xb, \
EMU_SRC_ALICE_EMU32A+0xc, \
EMU_SRC_ALICE_EMU32A+0xd, \
EMU_SRC_ALICE_EMU32A+0xe, \
EMU_SRC_ALICE_EMU32A+0xf, \
EMU_SRC_ALICE_EMU32B, \
EMU_SRC_ALICE_EMU32B+1, \
EMU_SRC_ALICE_EMU32B+2, \
EMU_SRC_ALICE_EMU32B+3, \
EMU_SRC_ALICE_EMU32B+4, \
EMU_SRC_ALICE_EMU32B+5, \
EMU_SRC_ALICE_EMU32B+6, \
EMU_SRC_ALICE_EMU32B+7, \
EMU_SRC_ALICE_EMU32B+8, \
EMU_SRC_ALICE_EMU32B+9, \
EMU_SRC_ALICE_EMU32B+0xa, \
EMU_SRC_ALICE_EMU32B+0xb, \
EMU_SRC_ALICE_EMU32B+0xc, \
EMU_SRC_ALICE_EMU32B+0xd, \
EMU_SRC_ALICE_EMU32B+0xe, \
EMU_SRC_ALICE_EMU32B+0xf
#define EMU1010_COMMON_TEXTS \
"Silence", \
PAIR_TEXTS("Dock Mic", "A", "B"), \
LR_TEXTS("Dock ADC1"), \
LR_TEXTS("Dock ADC2"), \
LR_TEXTS("Dock ADC3"), \
LR_TEXTS("0202 ADC"), \
LR_TEXTS("1010 SPDIF"), \
ADAT_TEXTS("1010 ")
static const char * const emu1010_src_texts[] = {
EMU1010_COMMON_TEXTS,
DSP_TEXTS,
};
static const unsigned short emu1010_src_regs[] = { static const unsigned short emu1010_src_regs[] = {
EMU_SRC_SILENCE,/* 0 */ EMU_SRC_SILENCE,
EMU_SRC_DOCK_MIC_A1, /* 1 */ PAIR_REGS(EMU_SRC_DOCK_MIC, _A, _B),
EMU_SRC_DOCK_MIC_B1, /* 2 */ LR_REGS(EMU_SRC_DOCK_ADC1),
EMU_SRC_DOCK_ADC1_LEFT1, /* 3 */ LR_REGS(EMU_SRC_DOCK_ADC2),
EMU_SRC_DOCK_ADC1_RIGHT1, /* 4 */ LR_REGS(EMU_SRC_DOCK_ADC3),
EMU_SRC_DOCK_ADC2_LEFT1, /* 5 */ LR_REGS(EMU_SRC_HAMOA_ADC),
EMU_SRC_DOCK_ADC2_RIGHT1, /* 6 */ LR_REGS(EMU_SRC_HANA_SPDIF),
EMU_SRC_DOCK_ADC3_LEFT1, /* 7 */ ADAT_REGS(EMU_SRC_HANA_ADAT),
EMU_SRC_DOCK_ADC3_RIGHT1, /* 8 */ EMU32_SRC_REGS,
EMU_SRC_HAMOA_ADC_LEFT1, /* 9 */
EMU_SRC_HAMOA_ADC_RIGHT1, /* 10 */
EMU_SRC_HANA_SPDIF_LEFT1, /* 11 */
EMU_SRC_HANA_SPDIF_RIGHT1, /* 12 */
EMU_SRC_HANA_ADAT, /* 13 */
EMU_SRC_HANA_ADAT+1, /* 14 */
EMU_SRC_HANA_ADAT+2, /* 15 */
EMU_SRC_HANA_ADAT+3, /* 16 */
EMU_SRC_HANA_ADAT+4, /* 17 */
EMU_SRC_HANA_ADAT+5, /* 18 */
EMU_SRC_HANA_ADAT+6, /* 19 */
EMU_SRC_HANA_ADAT+7, /* 20 */
EMU_SRC_ALICE_EMU32A, /* 21 */
EMU_SRC_ALICE_EMU32A+1, /* 22 */
EMU_SRC_ALICE_EMU32A+2, /* 23 */
EMU_SRC_ALICE_EMU32A+3, /* 24 */
EMU_SRC_ALICE_EMU32A+4, /* 25 */
EMU_SRC_ALICE_EMU32A+5, /* 26 */
EMU_SRC_ALICE_EMU32A+6, /* 27 */
EMU_SRC_ALICE_EMU32A+7, /* 28 */
EMU_SRC_ALICE_EMU32A+8, /* 29 */
EMU_SRC_ALICE_EMU32A+9, /* 30 */
EMU_SRC_ALICE_EMU32A+0xa, /* 31 */
EMU_SRC_ALICE_EMU32A+0xb, /* 32 */
EMU_SRC_ALICE_EMU32A+0xc, /* 33 */
EMU_SRC_ALICE_EMU32A+0xd, /* 34 */
EMU_SRC_ALICE_EMU32A+0xe, /* 35 */
EMU_SRC_ALICE_EMU32A+0xf, /* 36 */
EMU_SRC_ALICE_EMU32B, /* 37 */
EMU_SRC_ALICE_EMU32B+1, /* 38 */
EMU_SRC_ALICE_EMU32B+2, /* 39 */
EMU_SRC_ALICE_EMU32B+3, /* 40 */
EMU_SRC_ALICE_EMU32B+4, /* 41 */
EMU_SRC_ALICE_EMU32B+5, /* 42 */
EMU_SRC_ALICE_EMU32B+6, /* 43 */
EMU_SRC_ALICE_EMU32B+7, /* 44 */
EMU_SRC_ALICE_EMU32B+8, /* 45 */
EMU_SRC_ALICE_EMU32B+9, /* 46 */
EMU_SRC_ALICE_EMU32B+0xa, /* 47 */
EMU_SRC_ALICE_EMU32B+0xb, /* 48 */
EMU_SRC_ALICE_EMU32B+0xc, /* 49 */
EMU_SRC_ALICE_EMU32B+0xd, /* 50 */
EMU_SRC_ALICE_EMU32B+0xe, /* 51 */
EMU_SRC_ALICE_EMU32B+0xf, /* 52 */
}; };
static_assert(ARRAY_SIZE(emu1010_src_regs) == ARRAY_SIZE(emu1010_src_texts));
/* 1616(m) cardbus */ /* 1616(m) cardbus */
#define EMU1616_COMMON_TEXTS \
"Silence", \
PAIR_TEXTS("Mic", "A", "B"), \
LR_TEXTS("ADC1"), \
LR_TEXTS("ADC2"), \
LR_TEXTS("SPDIF"), \
ADAT_TEXTS("")
static const char * const emu1616_src_texts[] = {
EMU1616_COMMON_TEXTS,
DSP_TEXTS,
};
static const unsigned short emu1616_src_regs[] = { static const unsigned short emu1616_src_regs[] = {
EMU_SRC_SILENCE, EMU_SRC_SILENCE,
EMU_SRC_DOCK_MIC_A1, PAIR_REGS(EMU_SRC_DOCK_MIC, _A, _B),
EMU_SRC_DOCK_MIC_B1, LR_REGS(EMU_SRC_DOCK_ADC1),
EMU_SRC_DOCK_ADC1_LEFT1, LR_REGS(EMU_SRC_DOCK_ADC2),
EMU_SRC_DOCK_ADC1_RIGHT1, LR_REGS(EMU_SRC_MDOCK_SPDIF),
EMU_SRC_DOCK_ADC2_LEFT1, ADAT_REGS(EMU_SRC_MDOCK_ADAT),
EMU_SRC_DOCK_ADC2_RIGHT1, EMU32_SRC_REGS,
EMU_SRC_MDOCK_SPDIF_LEFT1,
EMU_SRC_MDOCK_SPDIF_RIGHT1,
EMU_SRC_MDOCK_ADAT,
EMU_SRC_MDOCK_ADAT+1,
EMU_SRC_MDOCK_ADAT+2,
EMU_SRC_MDOCK_ADAT+3,
EMU_SRC_MDOCK_ADAT+4,
EMU_SRC_MDOCK_ADAT+5,
EMU_SRC_MDOCK_ADAT+6,
EMU_SRC_MDOCK_ADAT+7,
EMU_SRC_ALICE_EMU32A,
EMU_SRC_ALICE_EMU32A+1,
EMU_SRC_ALICE_EMU32A+2,
EMU_SRC_ALICE_EMU32A+3,
EMU_SRC_ALICE_EMU32A+4,
EMU_SRC_ALICE_EMU32A+5,
EMU_SRC_ALICE_EMU32A+6,
EMU_SRC_ALICE_EMU32A+7,
EMU_SRC_ALICE_EMU32A+8,
EMU_SRC_ALICE_EMU32A+9,
EMU_SRC_ALICE_EMU32A+0xa,
EMU_SRC_ALICE_EMU32A+0xb,
EMU_SRC_ALICE_EMU32A+0xc,
EMU_SRC_ALICE_EMU32A+0xd,
EMU_SRC_ALICE_EMU32A+0xe,
EMU_SRC_ALICE_EMU32A+0xf,
EMU_SRC_ALICE_EMU32B,
EMU_SRC_ALICE_EMU32B+1,
EMU_SRC_ALICE_EMU32B+2,
EMU_SRC_ALICE_EMU32B+3,
EMU_SRC_ALICE_EMU32B+4,
EMU_SRC_ALICE_EMU32B+5,
EMU_SRC_ALICE_EMU32B+6,
EMU_SRC_ALICE_EMU32B+7,
EMU_SRC_ALICE_EMU32B+8,
EMU_SRC_ALICE_EMU32B+9,
EMU_SRC_ALICE_EMU32B+0xa,
EMU_SRC_ALICE_EMU32B+0xb,
EMU_SRC_ALICE_EMU32B+0xc,
EMU_SRC_ALICE_EMU32B+0xd,
EMU_SRC_ALICE_EMU32B+0xe,
EMU_SRC_ALICE_EMU32B+0xf,
}; };
static_assert(ARRAY_SIZE(emu1616_src_regs) == ARRAY_SIZE(emu1616_src_texts));
/* /*
* Data destinations - physical EMU outputs. * Data destinations - physical EMU outputs.
......
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