Commit dc7f1c29 authored by Marc Zyngier's avatar Marc Zyngier

Merge branch irq/loongarch-of into irq/irqchip-next

* irq/loongarch-of:
  : .
  : Initial OF support for LoongArch. Funny how it only took
  : *one* release from plumbing ACPI into an unsuspecting
  : architecture to start enabling OF on it. Oh well...
  : .
  irqchip/loongarch-cpu: Fix a missing prototype warning
  dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller
  irqchip: loongarch-cpu: add DT support
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parents 63ab33c0 065abd13
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/loongarch,cpu-interrupt-controller.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: LoongArch CPU Interrupt Controller
maintainers:
- Liu Peibao <liupeibao@loongson.cn>
properties:
compatible:
const: loongarch,cpu-interrupt-controller
'#interrupt-cells':
const: 1
interrupt-controller: true
additionalProperties: false
required:
- compatible
- '#interrupt-cells'
- interrupt-controller
examples:
- |
interrupt-controller {
compatible = "loongarch,cpu-interrupt-controller";
#interrupt-cells = <1>;
interrupt-controller;
};
......@@ -92,6 +92,24 @@ static const struct irq_domain_ops loongarch_cpu_intc_irq_domain_ops = {
.xlate = irq_domain_xlate_onecell,
};
#ifdef CONFIG_OF
static int __init cpuintc_of_init(struct device_node *of_node,
struct device_node *parent)
{
cpuintc_handle = of_node_to_fwnode(of_node);
irq_domain = irq_domain_create_linear(cpuintc_handle, EXCCODE_INT_NUM,
&loongarch_cpu_intc_irq_domain_ops, NULL);
if (!irq_domain)
panic("Failed to add irqdomain for loongarch CPU");
set_handle_irq(&handle_cpu_irq);
return 0;
}
IRQCHIP_DECLARE(cpu_intc, "loongson,cpu-interrupt-controller", cpuintc_of_init);
#endif
static int __init liointc_parse_madt(union acpi_subtable_headers *header,
const unsigned long end)
{
......
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