Commit dca1d9f6 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (370 commits)
  ARM: S3C2443: Add set_rate and round_rate calls for armdiv clock
  ARM: S3C2443: Remove #if 0 for clk_mpll
  ARM: S3C2443: Update notes on MPLLREF clock
  ARM: S3C2443: Further clksrc-clk conversions
  ARM: S3C2443: Change to using plat-samsung clksrc-clk implementation
  USB: Fix s3c-hsotg build following Samsung platform header moves
  ARM: S3C64XX: Reintroduce unconditional build of audio device
  ARM: 5961/1: ux500: fix CLKRST addresses
  ARM: 5977/1: arm: Enable backtrace printing on oops when PC is corrupted
  ASoC: Fix S3C64xx IIS driver for Samsung header reorg
  ARM: S3C2440: Fix plat-s3c24xx move of s3c2440/s3c2442 support
  [ARM] pxa: fix typo in mxm8x10.h
  [ARM] pxa/raumfeld: set GPIO drive bits for LED pins
  [ARM] pxa/zeus: Add support for mcp2515 CAN bus
  [ARM] pxa/zeus: Add support for onboard max6369 watchdog
  [ARM] pxa/zeus: Add Eurotech as the manufacturer
  [ARM] pxa/zeus: Correct the USB host initialisation flags
  [ARM] pxa/zeus: Allow usage of 8250-compatible UART in uncompress
  [ARM] pxa: refactor uncompress.h for non-PXA uarts
  [ARM] mmp2: fix incorrect calling of chip->mask_ack() for 2nd level cascaded IRQs
  ...
parents 9ff99339 91e01382
Samsung ARM Linux Overview
==========================
Introduction
------------
The Samsung range of ARM SoCs spans many similar devices, from the initial
ARM9 through to the newest ARM cores. This document shows an overview of
the current kernel support, how to use it and where to find the code
that supports this.
The currently supported SoCs are:
- S3C24XX: See Documentation/arm/Samsung-S3C24XX/Overview.txt for full list
- S3C64XX: S3C6400 and S3C6410
- S5PC6440
S5PC100 and S5PC110 support is currently being merged
S3C24XX Systems
---------------
There is still documentation in Documnetation/arm/Samsung-S3C24XX/ which
deals with the architecture and drivers specific to these devices.
See Documentation/arm/Samsung-S3C24XX/Overview.txt for more information
on the implementation details and specific support.
Configuration
-------------
A number of configurations are supplied, as there is no current way of
unifying all the SoCs into one kernel.
s5p6440_defconfig - S5P6440 specific default configuration
s5pc100_defconfig - S5PC100 specific default configuration
Layout
------
The directory layout is currently being restructured, and consists of
several platform directories and then the machine specific directories
of the CPUs being built for.
plat-samsung provides the base for all the implementations, and is the
last in the line of include directories that are processed for the build
specific information. It contains the base clock, GPIO and device definitions
to get the system running.
plat-s3c is the s3c24xx/s3c64xx platform directory, although it is currently
involved in other builds this will be phased out once the relevant code is
moved elsewhere.
plat-s3c24xx is for s3c24xx specific builds, see the S3C24XX docs.
plat-s3c64xx is for the s3c64xx specific bits, see the S3C24XX docs.
plat-s5p is for s5p specific builds, more to be added.
[ to finish ]
Port Contributors
-----------------
Ben Dooks (BJD)
Vincent Sanders
Herbert Potzl
Arnaud Patard (RTP)
Roc Wu
Klaus Fetscher
Dimitry Andric
Shannon Holland
Guillaume Gourat (NexVision)
Christer Weinigel (wingel) (Acer N30)
Lucas Correia Villa Real (S3C2400 port)
Document Author
---------------
Copyright 2009-2010 Ben Dooks <ben-linux@fluff.org>
#!/usr/bin/awk -f
#
# Copyright 2010 Ben Dooks <ben-linux@fluff.org>
#
# Released under GPLv2
# example usage
# ./clksrc-change-registers.awk arch/arm/plat-s5pc1xx/include/plat/regs-clock.h < src > dst
function extract_value(s)
{
eqat = index(s, "=")
comat = index(s, ",")
return substr(s, eqat+2, (comat-eqat)-2)
}
function remove_brackets(b)
{
return substr(b, 2, length(b)-2)
}
function splitdefine(l, p)
{
r = split(l, tp)
p[0] = tp[2]
p[1] = remove_brackets(tp[3])
}
function find_length(f)
{
if (0)
printf "find_length " f "\n" > "/dev/stderr"
if (f ~ /0x1/)
return 1
else if (f ~ /0x3/)
return 2
else if (f ~ /0x7/)
return 3
else if (f ~ /0xf/)
return 4
printf "unknown legnth " f "\n" > "/dev/stderr"
exit
}
function find_shift(s)
{
id = index(s, "<")
if (id <= 0) {
printf "cannot find shift " s "\n" > "/dev/stderr"
exit
}
return substr(s, id+2)
}
BEGIN {
if (ARGC < 2) {
print "too few arguments" > "/dev/stderr"
exit
}
# read the header file and find the mask values that we will need
# to replace and create an associative array of values
while (getline line < ARGV[1] > 0) {
if (line ~ /\#define.*_MASK/ &&
!(line ~ /S5PC100_EPLL_MASK/) &&
!(line ~ /USB_SIG_MASK/)) {
splitdefine(line, fields)
name = fields[0]
if (0)
printf "MASK " line "\n" > "/dev/stderr"
dmask[name,0] = find_length(fields[1])
dmask[name,1] = find_shift(fields[1])
if (0)
printf "=> '" name "' LENGTH=" dmask[name,0] " SHIFT=" dmask[name,1] "\n" > "/dev/stderr"
} else {
}
}
delete ARGV[1]
}
/clksrc_clk.*=.*{/ {
shift=""
mask=""
divshift=""
reg_div=""
reg_src=""
indent=1
print $0
for(; indent >= 1;) {
if ((getline line) <= 0) {
printf "unexpected end of file" > "/dev/stderr"
exit 1;
}
if (line ~ /\.shift/) {
shift = extract_value(line)
} else if (line ~ /\.mask/) {
mask = extract_value(line)
} else if (line ~ /\.reg_divider/) {
reg_div = extract_value(line)
} else if (line ~ /\.reg_source/) {
reg_src = extract_value(line)
} else if (line ~ /\.divider_shift/) {
divshift = extract_value(line)
} else if (line ~ /{/) {
indent++
print line
} else if (line ~ /}/) {
indent--
if (indent == 0) {
if (0) {
printf "shift '" shift "' ='" dmask[shift,0] "'\n" > "/dev/stderr"
printf "mask '" mask "'\n" > "/dev/stderr"
printf "dshft '" divshift "'\n" > "/dev/stderr"
printf "rdiv '" reg_div "'\n" > "/dev/stderr"
printf "rsrc '" reg_src "'\n" > "/dev/stderr"
}
generated = mask
sub(reg_src, reg_div, generated)
if (0) {
printf "/* rsrc " reg_src " */\n"
printf "/* rdiv " reg_div " */\n"
printf "/* shift " shift " */\n"
printf "/* mask " mask " */\n"
printf "/* generated " generated " */\n"
}
if (reg_div != "") {
printf "\t.reg_div = { "
printf ".reg = " reg_div ", "
printf ".shift = " dmask[generated,1] ", "
printf ".size = " dmask[generated,0] ", "
printf "},\n"
}
printf "\t.reg_src = { "
printf ".reg = " reg_src ", "
printf ".shift = " dmask[mask,1] ", "
printf ".size = " dmask[mask,0] ", "
printf "},\n"
}
print line
} else {
print line
}
if (0)
printf indent ":" line "\n" > "/dev/stderr"
}
}
// && ! /clksrc_clk.*=.*{/ { print $0 }
...@@ -666,6 +666,12 @@ T: git://git.pengutronix.de/git/imx/linux-2.6.git ...@@ -666,6 +666,12 @@ T: git://git.pengutronix.de/git/imx/linux-2.6.git
F: arch/arm/mach-mx*/ F: arch/arm/mach-mx*/
F: arch/arm/plat-mxc/ F: arch/arm/plat-mxc/
ARM/FREESCALE IMX51
M: Amit Kucheria <amit.kucheria@canonical.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-mx5/
ARM/GLOMATION GESBC9312SX MACHINE SUPPORT ARM/GLOMATION GESBC9312SX MACHINE SUPPORT
M: Lennert Buytenhek <kernel@wantstofly.org> M: Lennert Buytenhek <kernel@wantstofly.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
...@@ -939,6 +945,16 @@ W: http://www.fluff.org/ben/linux/ ...@@ -939,6 +945,16 @@ W: http://www.fluff.org/ben/linux/
S: Maintained S: Maintained
F: arch/arm/mach-s3c6410/ F: arch/arm/mach-s3c6410/
ARM/SHMOBILE ARM ARCHITECTURE
M: Paul Mundt <lethal@linux-sh.org>
M: Magnus Damm <magnus.damm@gmail.com>
L: linux-sh@vger.kernel.org
T: git git://git.kernel.org/pub/scm/linux/kernel/git/lethal/genesis-2.6.git
W: http://oss.renesas.com
S: Supported
F: arch/arm/mach-shmobile/
F: drivers/sh/
ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT
M: Lennert Buytenhek <kernel@wantstofly.org> M: Lennert Buytenhek <kernel@wantstofly.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
...@@ -4502,6 +4518,13 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) ...@@ -4502,6 +4518,13 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
T: git git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6.git
S: Maintained S: Maintained
MMP2 SUPPORT (aka ARMADA610)
M: Haojian Zhuang <haojian.zhuang@marvell.com>
M: Eric Miao <eric.y.miao@gmail.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
T: git git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6.git
S: Maintained
PXA MMCI DRIVER PXA MMCI DRIVER
S: Orphan S: Orphan
......
...@@ -324,10 +324,9 @@ config ARCH_MXC ...@@ -324,10 +324,9 @@ config ARCH_MXC
bool "Freescale MXC/iMX-based" bool "Freescale MXC/iMX-based"
select GENERIC_TIME select GENERIC_TIME
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select ARCH_MTD_XIP
select GENERIC_GPIO
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select HAVE_CLK select HAVE_CLK
select COMMON_CLKDEV
help help
Support for Freescale MXC/iMX-based family of processors Support for Freescale MXC/iMX-based family of processors
...@@ -511,7 +510,7 @@ config ARCH_ORION5X ...@@ -511,7 +510,7 @@ config ARCH_ORION5X
Orion-2 (5281), Orion-1-90 (6183). Orion-2 (5281), Orion-1-90 (6183).
config ARCH_MMP config ARCH_MMP
bool "Marvell PXA168/910" bool "Marvell PXA168/910/MMP2"
depends on MMU depends on MMU
select GENERIC_GPIO select GENERIC_GPIO
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
...@@ -522,7 +521,7 @@ config ARCH_MMP ...@@ -522,7 +521,7 @@ config ARCH_MMP
select TICK_ONESHOT select TICK_ONESHOT
select PLAT_PXA select PLAT_PXA
help help
Support for Marvell's PXA168/910 processor line. Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
config ARCH_KS8695 config ARCH_KS8695
bool "Micrel/Kendin KS8695" bool "Micrel/Kendin KS8695"
...@@ -608,6 +607,11 @@ config ARCH_MSM ...@@ -608,6 +607,11 @@ config ARCH_MSM
interface to the ARM9 modem processor which runs the baseband stack interface to the ARM9 modem processor which runs the baseband stack
and controls some vital subsystems (clock and power control, etc). and controls some vital subsystems (clock and power control, etc).
config ARCH_SHMOBILE
bool "Renesas SH-Mobile"
help
Support for Renesas's SH-Mobile ARM platforms
config ARCH_RPC config ARCH_RPC
bool "RiscPC" bool "RiscPC"
select ARCH_ACORN select ARCH_ACORN
...@@ -651,12 +655,43 @@ config ARCH_S3C2410 ...@@ -651,12 +655,43 @@ config ARCH_S3C2410
config ARCH_S3C64XX config ARCH_S3C64XX
bool "Samsung S3C64XX" bool "Samsung S3C64XX"
select PLAT_SAMSUNG
select CPU_V6
select GENERIC_GPIO select GENERIC_GPIO
select ARM_VIC
select HAVE_CLK select HAVE_CLK
select NO_IOPORT
select ARCH_HAS_CPUFREQ select ARCH_HAS_CPUFREQ
select ARCH_REQUIRE_GPIOLIB
select SAMSUNG_CLKSRC
select SAMSUNG_IRQ_VIC_TIMER
select SAMSUNG_IRQ_UART
select S3C_GPIO_TRACK
select S3C_GPIO_PULL_UPDOWN
select S3C_GPIO_CFG_S3C24XX
select S3C_GPIO_CFG_S3C64XX
select S3C_DEV_NAND
select USB_ARCH_HAS_OHCI
select SAMSUNG_GPIOLIB_4BIT
help help
Samsung S3C64XX series based systems Samsung S3C64XX series based systems
config ARCH_S5P6440
bool "Samsung S5P6440"
select CPU_V6
select GENERIC_GPIO
select HAVE_CLK
help
Samsung S5P6440 CPU based systems
config ARCH_S5P6442
bool "Samsung S5P6442"
select CPU_V6
select GENERIC_GPIO
select HAVE_CLK
help
Samsung S5P6442 CPU based systems
config ARCH_S5PC1XX config ARCH_S5PC1XX
bool "Samsung S5PC1XX" bool "Samsung S5PC1XX"
select GENERIC_GPIO select GENERIC_GPIO
...@@ -666,6 +701,15 @@ config ARCH_S5PC1XX ...@@ -666,6 +701,15 @@ config ARCH_S5PC1XX
help help
Samsung S5PC1XX series based systems Samsung S5PC1XX series based systems
config ARCH_S5PV210
bool "Samsung S5PV210/S5PC110"
select CPU_V7
select GENERIC_GPIO
select HAVE_CLK
select ARM_L1_CACHE_SHIFT_6
help
Samsung S5PV210/S5PC110 series based systems
config ARCH_SHARK config ARCH_SHARK
bool "Shark" bool "Shark"
select CPU_SA110 select CPU_SA110
...@@ -831,8 +875,7 @@ source "arch/arm/mach-sa1100/Kconfig" ...@@ -831,8 +875,7 @@ source "arch/arm/mach-sa1100/Kconfig"
source "arch/arm/plat-samsung/Kconfig" source "arch/arm/plat-samsung/Kconfig"
source "arch/arm/plat-s3c24xx/Kconfig" source "arch/arm/plat-s3c24xx/Kconfig"
source "arch/arm/plat-s3c64xx/Kconfig" source "arch/arm/plat-s5p/Kconfig"
source "arch/arm/plat-s3c/Kconfig"
source "arch/arm/plat-s5pc1xx/Kconfig" source "arch/arm/plat-s5pc1xx/Kconfig"
if ARCH_S3C2410 if ARCH_S3C2410
...@@ -840,21 +883,27 @@ source "arch/arm/mach-s3c2400/Kconfig" ...@@ -840,21 +883,27 @@ source "arch/arm/mach-s3c2400/Kconfig"
source "arch/arm/mach-s3c2410/Kconfig" source "arch/arm/mach-s3c2410/Kconfig"
source "arch/arm/mach-s3c2412/Kconfig" source "arch/arm/mach-s3c2412/Kconfig"
source "arch/arm/mach-s3c2440/Kconfig" source "arch/arm/mach-s3c2440/Kconfig"
source "arch/arm/mach-s3c2442/Kconfig"
source "arch/arm/mach-s3c2443/Kconfig" source "arch/arm/mach-s3c2443/Kconfig"
endif endif
if ARCH_S3C64XX if ARCH_S3C64XX
source "arch/arm/mach-s3c6400/Kconfig" source "arch/arm/mach-s3c64xx/Kconfig"
source "arch/arm/mach-s3c6410/Kconfig"
endif endif
source "arch/arm/plat-stmp3xxx/Kconfig" source "arch/arm/mach-s5p6440/Kconfig"
source "arch/arm/mach-s5p6442/Kconfig"
if ARCH_S5PC1XX if ARCH_S5PC1XX
source "arch/arm/mach-s5pc100/Kconfig" source "arch/arm/mach-s5pc100/Kconfig"
endif endif
source "arch/arm/mach-s5pv210/Kconfig"
source "arch/arm/mach-shmobile/Kconfig"
source "arch/arm/plat-stmp3xxx/Kconfig"
source "arch/arm/mach-u300/Kconfig" source "arch/arm/mach-u300/Kconfig"
source "arch/arm/mach-ux500/Kconfig" source "arch/arm/mach-ux500/Kconfig"
...@@ -1120,7 +1169,7 @@ source kernel/Kconfig.preempt ...@@ -1120,7 +1169,7 @@ source kernel/Kconfig.preempt
config HZ config HZ
int int
default 128 if ARCH_L7200 default 128 if ARCH_L7200
default 200 if ARCH_EBSA110 || ARCH_S3C2410 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210
default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
default AT91_TIMER_HZ if ARCH_AT91 default AT91_TIMER_HZ if ARCH_AT91
default 100 default 100
......
...@@ -117,7 +117,7 @@ config DEBUG_CLPS711X_UART2 ...@@ -117,7 +117,7 @@ config DEBUG_CLPS711X_UART2
cause the debug messages to appear on the first serial port. cause the debug messages to appear on the first serial port.
config DEBUG_S3C_UART config DEBUG_S3C_UART
depends on PLAT_S3C depends on PLAT_SAMSUNG
int "S3C UART to use for low-level debug" int "S3C UART to use for low-level debug"
default "0" default "0"
help help
......
...@@ -146,6 +146,7 @@ machine-$(CONFIG_ARCH_MX1) := mx1 ...@@ -146,6 +146,7 @@ machine-$(CONFIG_ARCH_MX1) := mx1
machine-$(CONFIG_ARCH_MX2) := mx2 machine-$(CONFIG_ARCH_MX2) := mx2
machine-$(CONFIG_ARCH_MX25) := mx25 machine-$(CONFIG_ARCH_MX25) := mx25
machine-$(CONFIG_ARCH_MX3) := mx3 machine-$(CONFIG_ARCH_MX3) := mx3
machine-$(CONFIG_ARCH_MX5) := mx5
machine-$(CONFIG_ARCH_MXC91231) := mxc91231 machine-$(CONFIG_ARCH_MXC91231) := mxc91231
machine-$(CONFIG_ARCH_NETX) := netx machine-$(CONFIG_ARCH_NETX) := netx
machine-$(CONFIG_ARCH_NOMADIK) := nomadik machine-$(CONFIG_ARCH_NOMADIK) := nomadik
...@@ -159,12 +160,16 @@ machine-$(CONFIG_ARCH_PNX4008) := pnx4008 ...@@ -159,12 +160,16 @@ machine-$(CONFIG_ARCH_PNX4008) := pnx4008
machine-$(CONFIG_ARCH_PXA) := pxa machine-$(CONFIG_ARCH_PXA) := pxa
machine-$(CONFIG_ARCH_REALVIEW) := realview machine-$(CONFIG_ARCH_REALVIEW) := realview
machine-$(CONFIG_ARCH_RPC) := rpc machine-$(CONFIG_ARCH_RPC) := rpc
machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2440 s3c2442 s3c2443 machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2440 s3c2443
machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0 machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0
machine-$(CONFIG_ARCH_S3C64XX) := s3c6400 s3c6410 machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx
machine-$(CONFIG_ARCH_S5P6440) := s5p6440
machine-$(CONFIG_ARCH_S5P6442) := s5p6442
machine-$(CONFIG_ARCH_S5PC1XX) := s5pc100 machine-$(CONFIG_ARCH_S5PC1XX) := s5pc100
machine-$(CONFIG_ARCH_S5PV210) := s5pv210
machine-$(CONFIG_ARCH_SA1100) := sa1100 machine-$(CONFIG_ARCH_SA1100) := sa1100
machine-$(CONFIG_ARCH_SHARK) := shark machine-$(CONFIG_ARCH_SHARK) := shark
machine-$(CONFIG_ARCH_SHMOBILE) := shmobile
machine-$(CONFIG_ARCH_STMP378X) := stmp378x machine-$(CONFIG_ARCH_STMP378X) := stmp378x
machine-$(CONFIG_ARCH_STMP37XX) := stmp37xx machine-$(CONFIG_ARCH_STMP37XX) := stmp37xx
machine-$(CONFIG_ARCH_U300) := u300 machine-$(CONFIG_ARCH_U300) := u300
...@@ -178,14 +183,15 @@ machine-$(CONFIG_FOOTBRIDGE) := footbridge ...@@ -178,14 +183,15 @@ machine-$(CONFIG_FOOTBRIDGE) := footbridge
# by CONFIG_* macro name. # by CONFIG_* macro name.
plat-$(CONFIG_ARCH_MXC) := mxc plat-$(CONFIG_ARCH_MXC) := mxc
plat-$(CONFIG_ARCH_OMAP) := omap plat-$(CONFIG_ARCH_OMAP) := omap
plat-$(CONFIG_ARCH_S3C64XX) := samsung
plat-$(CONFIG_ARCH_STMP3XXX) := stmp3xxx plat-$(CONFIG_ARCH_STMP3XXX) := stmp3xxx
plat-$(CONFIG_PLAT_IOP) := iop plat-$(CONFIG_PLAT_IOP) := iop
plat-$(CONFIG_PLAT_NOMADIK) := nomadik plat-$(CONFIG_PLAT_NOMADIK) := nomadik
plat-$(CONFIG_PLAT_ORION) := orion plat-$(CONFIG_PLAT_ORION) := orion
plat-$(CONFIG_PLAT_PXA) := pxa plat-$(CONFIG_PLAT_PXA) := pxa
plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx s3c samsung plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx samsung
plat-$(CONFIG_PLAT_S3C64XX) := s3c64xx s3c samsung plat-$(CONFIG_PLAT_S5PC1XX) := s5pc1xx samsung
plat-$(CONFIG_PLAT_S5PC1XX) := s5pc1xx s3c samsung plat-$(CONFIG_PLAT_S5P) := s5p samsung
ifeq ($(CONFIG_ARCH_EBSA110),y) ifeq ($(CONFIG_ARCH_EBSA110),y)
# This is what happens if you forget the IOCS16 line. # This is what happens if you forget the IOCS16 line.
......
...@@ -170,8 +170,8 @@ not_angel: ...@@ -170,8 +170,8 @@ not_angel:
.text .text
adr r0, LC0 adr r0, LC0
ARM( ldmia r0, {r1, r2, r3, r4, r5, r6, ip, sp} ) ARM( ldmia r0, {r1, r2, r3, r4, r5, r6, r11, ip, sp})
THUMB( ldmia r0, {r1, r2, r3, r4, r5, r6, ip} ) THUMB( ldmia r0, {r1, r2, r3, r4, r5, r6, r11, ip} )
THUMB( ldr sp, [r0, #28] ) THUMB( ldr sp, [r0, #28] )
subs r0, r0, r1 @ calculate the delta offset subs r0, r0, r1 @ calculate the delta offset
...@@ -182,12 +182,13 @@ not_angel: ...@@ -182,12 +182,13 @@ not_angel:
/* /*
* We're running at a different address. We need to fix * We're running at a different address. We need to fix
* up various pointers: * up various pointers:
* r5 - zImage base address * r5 - zImage base address (_start)
* r6 - GOT start * r6 - size of decompressed image
* r11 - GOT start
* ip - GOT end * ip - GOT end
*/ */
add r5, r5, r0 add r5, r5, r0
add r6, r6, r0 add r11, r11, r0
add ip, ip, r0 add ip, ip, r0
#ifndef CONFIG_ZBOOT_ROM #ifndef CONFIG_ZBOOT_ROM
...@@ -205,10 +206,10 @@ not_angel: ...@@ -205,10 +206,10 @@ not_angel:
/* /*
* Relocate all entries in the GOT table. * Relocate all entries in the GOT table.
*/ */
1: ldr r1, [r6, #0] @ relocate entries in the GOT 1: ldr r1, [r11, #0] @ relocate entries in the GOT
add r1, r1, r0 @ table. This fixes up the add r1, r1, r0 @ table. This fixes up the
str r1, [r6], #4 @ C references. str r1, [r11], #4 @ C references.
cmp r6, ip cmp r11, ip
blo 1b blo 1b
#else #else
...@@ -216,12 +217,12 @@ not_angel: ...@@ -216,12 +217,12 @@ not_angel:
* Relocate entries in the GOT table. We only relocate * Relocate entries in the GOT table. We only relocate
* the entries that are outside the (relocated) BSS region. * the entries that are outside the (relocated) BSS region.
*/ */
1: ldr r1, [r6, #0] @ relocate entries in the GOT 1: ldr r1, [r11, #0] @ relocate entries in the GOT
cmp r1, r2 @ entry < bss_start || cmp r1, r2 @ entry < bss_start ||
cmphs r3, r1 @ _end < entry cmphs r3, r1 @ _end < entry
addlo r1, r1, r0 @ table. This fixes up the addlo r1, r1, r0 @ table. This fixes up the
str r1, [r6], #4 @ C references. str r1, [r11], #4 @ C references.
cmp r6, ip cmp r11, ip
blo 1b blo 1b
#endif #endif
...@@ -247,6 +248,7 @@ not_relocated: mov r0, #0 ...@@ -247,6 +248,7 @@ not_relocated: mov r0, #0
* Check to see if we will overwrite ourselves. * Check to see if we will overwrite ourselves.
* r4 = final kernel address * r4 = final kernel address
* r5 = start of this image * r5 = start of this image
* r6 = size of decompressed image
* r2 = end of malloc space (and therefore this image) * r2 = end of malloc space (and therefore this image)
* We basically want: * We basically want:
* r4 >= r2 -> OK * r4 >= r2 -> OK
...@@ -254,8 +256,7 @@ not_relocated: mov r0, #0 ...@@ -254,8 +256,7 @@ not_relocated: mov r0, #0
*/ */
cmp r4, r2 cmp r4, r2
bhs wont_overwrite bhs wont_overwrite
sub r3, sp, r5 @ > compressed kernel size add r0, r4, r6
add r0, r4, r3, lsl #2 @ allow for 4x expansion
cmp r0, r5 cmp r0, r5
bls wont_overwrite bls wont_overwrite
...@@ -271,7 +272,6 @@ not_relocated: mov r0, #0 ...@@ -271,7 +272,6 @@ not_relocated: mov r0, #0
* r1-r3 = unused * r1-r3 = unused
* r4 = kernel execution address * r4 = kernel execution address
* r5 = decompressed kernel start * r5 = decompressed kernel start
* r6 = processor ID
* r7 = architecture ID * r7 = architecture ID
* r8 = atags pointer * r8 = atags pointer
* r9-r12,r14 = corrupted * r9-r12,r14 = corrupted
...@@ -312,7 +312,8 @@ LC0: .word LC0 @ r1 ...@@ -312,7 +312,8 @@ LC0: .word LC0 @ r1
.word _end @ r3 .word _end @ r3
.word zreladdr @ r4 .word zreladdr @ r4
.word _start @ r5 .word _start @ r5
.word _got_start @ r6 .word _image_size @ r6
.word _got_start @ r11
.word _got_end @ ip .word _got_end @ ip
.word user_stack+4096 @ sp .word user_stack+4096 @ sp
LC1: .word reloc_end - reloc_start LC1: .word reloc_end - reloc_start
...@@ -336,7 +337,6 @@ params: ldr r0, =params_phys ...@@ -336,7 +337,6 @@ params: ldr r0, =params_phys
* *
* On entry, * On entry,
* r4 = kernel execution address * r4 = kernel execution address
* r6 = processor ID
* r7 = architecture number * r7 = architecture number
* r8 = atags pointer * r8 = atags pointer
* r9 = run-time address of "start" (???) * r9 = run-time address of "start" (???)
...@@ -542,7 +542,6 @@ __common_mmu_cache_on: ...@@ -542,7 +542,6 @@ __common_mmu_cache_on:
* r1-r3 = unused * r1-r3 = unused
* r4 = kernel execution address * r4 = kernel execution address
* r5 = decompressed kernel start * r5 = decompressed kernel start
* r6 = processor ID
* r7 = architecture ID * r7 = architecture ID
* r8 = atags pointer * r8 = atags pointer
* r9-r12,r14 = corrupted * r9-r12,r14 = corrupted
...@@ -581,19 +580,19 @@ call_kernel: bl cache_clean_flush ...@@ -581,19 +580,19 @@ call_kernel: bl cache_clean_flush
* r1 = corrupted * r1 = corrupted
* r2 = corrupted * r2 = corrupted
* r3 = block offset * r3 = block offset
* r6 = corrupted * r9 = corrupted
* r12 = corrupted * r12 = corrupted
*/ */
call_cache_fn: adr r12, proc_types call_cache_fn: adr r12, proc_types
#ifdef CONFIG_CPU_CP15 #ifdef CONFIG_CPU_CP15
mrc p15, 0, r6, c0, c0 @ get processor ID mrc p15, 0, r9, c0, c0 @ get processor ID
#else #else
ldr r6, =CONFIG_PROCESSOR_ID ldr r9, =CONFIG_PROCESSOR_ID
#endif #endif
1: ldr r1, [r12, #0] @ get value 1: ldr r1, [r12, #0] @ get value
ldr r2, [r12, #4] @ get mask ldr r2, [r12, #4] @ get mask
eor r1, r1, r6 @ (real ^ match) eor r1, r1, r9 @ (real ^ match)
tst r1, r2 @ & mask tst r1, r2 @ & mask
ARM( addeq pc, r12, r3 ) @ call cache function ARM( addeq pc, r12, r3 ) @ call cache function
THUMB( addeq r12, r3 ) THUMB( addeq r12, r3 )
...@@ -778,8 +777,7 @@ proc_types: ...@@ -778,8 +777,7 @@ proc_types:
* Turn off the Cache and MMU. ARMv3 does not support * Turn off the Cache and MMU. ARMv3 does not support
* reading the control register, but ARMv4 does. * reading the control register, but ARMv4 does.
* *
* On entry, r6 = processor ID * On exit, r0, r1, r2, r3, r9, r12 corrupted
* On exit, r0, r1, r2, r3, r12 corrupted
* This routine must preserve: r4, r6, r7 * This routine must preserve: r4, r6, r7
*/ */
.align 5 .align 5
...@@ -852,10 +850,8 @@ __armv3_mmu_cache_off: ...@@ -852,10 +850,8 @@ __armv3_mmu_cache_off:
/* /*
* Clean and flush the cache to maintain consistency. * Clean and flush the cache to maintain consistency.
* *
* On entry,
* r6 = processor ID
* On exit, * On exit,
* r1, r2, r3, r11, r12 corrupted * r1, r2, r3, r9, r11, r12 corrupted
* This routine must preserve: * This routine must preserve:
* r0, r4, r5, r6, r7 * r0, r4, r5, r6, r7
*/ */
...@@ -967,7 +963,7 @@ __armv4_mmu_cache_flush: ...@@ -967,7 +963,7 @@ __armv4_mmu_cache_flush:
mov r2, #64*1024 @ default: 32K dcache size (*2) mov r2, #64*1024 @ default: 32K dcache size (*2)
mov r11, #32 @ default: 32 byte line size mov r11, #32 @ default: 32 byte line size
mrc p15, 0, r3, c0, c0, 1 @ read cache type mrc p15, 0, r3, c0, c0, 1 @ read cache type
teq r3, r6 @ cache ID register present? teq r3, r9 @ cache ID register present?
beq no_cache_id beq no_cache_id
mov r1, r3, lsr #18 mov r1, r3, lsr #18
and r1, r1, #7 and r1, r1, #7
......
...@@ -43,6 +43,9 @@ SECTIONS ...@@ -43,6 +43,9 @@ SECTIONS
_etext = .; _etext = .;
/* Assume size of decompressed image is 4x the compressed image */
_image_size = (_etext - _text) * 4;
_got_start = .; _got_start = .;
.got : { *(.got) } .got : { *(.got) }
_got_end = .; _got_end = .;
......
This diff is collapsed.
...@@ -35,6 +35,58 @@ ...@@ -35,6 +35,58 @@
#include <asm/hardware/sa1111.h> #include <asm/hardware/sa1111.h>
/* SA1111 IRQs */
#define IRQ_GPAIN0 (0)
#define IRQ_GPAIN1 (1)
#define IRQ_GPAIN2 (2)
#define IRQ_GPAIN3 (3)
#define IRQ_GPBIN0 (4)
#define IRQ_GPBIN1 (5)
#define IRQ_GPBIN2 (6)
#define IRQ_GPBIN3 (7)
#define IRQ_GPBIN4 (8)
#define IRQ_GPBIN5 (9)
#define IRQ_GPCIN0 (10)
#define IRQ_GPCIN1 (11)
#define IRQ_GPCIN2 (12)
#define IRQ_GPCIN3 (13)
#define IRQ_GPCIN4 (14)
#define IRQ_GPCIN5 (15)
#define IRQ_GPCIN6 (16)
#define IRQ_GPCIN7 (17)
#define IRQ_MSTXINT (18)
#define IRQ_MSRXINT (19)
#define IRQ_MSSTOPERRINT (20)
#define IRQ_TPTXINT (21)
#define IRQ_TPRXINT (22)
#define IRQ_TPSTOPERRINT (23)
#define SSPXMTINT (24)
#define SSPRCVINT (25)
#define SSPROR (26)
#define AUDXMTDMADONEA (32)
#define AUDRCVDMADONEA (33)
#define AUDXMTDMADONEB (34)
#define AUDRCVDMADONEB (35)
#define AUDTFSR (36)
#define AUDRFSR (37)
#define AUDTUR (38)
#define AUDROR (39)
#define AUDDTS (40)
#define AUDRDD (41)
#define AUDSTO (42)
#define IRQ_USBPWR (43)
#define IRQ_HCIM (44)
#define IRQ_HCIBUFFACC (45)
#define IRQ_HCIRMTWKP (46)
#define IRQ_NHCIMFCIR (47)
#define IRQ_USB_PORT_RESUME (48)
#define IRQ_S0_READY_NINT (49)
#define IRQ_S1_READY_NINT (50)
#define IRQ_S0_CD_VALID (51)
#define IRQ_S1_CD_VALID (52)
#define IRQ_S0_BVD1_STSCHG (53)
#define IRQ_S1_BVD1_STSCHG (54)
extern void __init sa1110_mb_enable(void); extern void __init sa1110_mb_enable(void);
/* /*
...@@ -49,6 +101,7 @@ struct sa1111 { ...@@ -49,6 +101,7 @@ struct sa1111 {
struct clk *clk; struct clk *clk;
unsigned long phys; unsigned long phys;
int irq; int irq;
int irq_base; /* base for cascaded on-chip IRQs */
spinlock_t lock; spinlock_t lock;
void __iomem *base; void __iomem *base;
#ifdef CONFIG_PM #ifdef CONFIG_PM
...@@ -152,36 +205,37 @@ static void ...@@ -152,36 +205,37 @@ static void
sa1111_irq_handler(unsigned int irq, struct irq_desc *desc) sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
{ {
unsigned int stat0, stat1, i; unsigned int stat0, stat1, i;
void __iomem *base = get_irq_data(irq); struct sa1111 *sachip = get_irq_data(irq);
void __iomem *mapbase = sachip->base + SA1111_INTC;
stat0 = sa1111_readl(base + SA1111_INTSTATCLR0); stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0);
stat1 = sa1111_readl(base + SA1111_INTSTATCLR1); stat1 = sa1111_readl(mapbase + SA1111_INTSTATCLR1);
sa1111_writel(stat0, base + SA1111_INTSTATCLR0); sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0);
desc->chip->ack(irq); desc->chip->ack(irq);
sa1111_writel(stat1, base + SA1111_INTSTATCLR1); sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1);
if (stat0 == 0 && stat1 == 0) { if (stat0 == 0 && stat1 == 0) {
do_bad_IRQ(irq, desc); do_bad_IRQ(irq, desc);
return; return;
} }
for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1) for (i = 0; stat0; i++, stat0 >>= 1)
if (stat0 & 1) if (stat0 & 1)
handle_edge_irq(i, irq_desc + i); generic_handle_irq(i + sachip->irq_base);
for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1) for (i = 32; stat1; i++, stat1 >>= 1)
if (stat1 & 1) if (stat1 & 1)
handle_edge_irq(i, irq_desc + i); generic_handle_irq(i + sachip->irq_base);
/* For level-based interrupts */ /* For level-based interrupts */
desc->chip->unmask(irq); desc->chip->unmask(irq);
} }
#define SA1111_IRQMASK_LO(x) (1 << (x - IRQ_SA1111_START)) #define SA1111_IRQMASK_LO(x) (1 << (x - sachip->irq_base))
#define SA1111_IRQMASK_HI(x) (1 << (x - IRQ_SA1111_START - 32)) #define SA1111_IRQMASK_HI(x) (1 << (x - sachip->irq_base - 32))
static void sa1111_ack_irq(unsigned int irq) static void sa1111_ack_irq(unsigned int irq)
{ {
...@@ -189,7 +243,8 @@ static void sa1111_ack_irq(unsigned int irq) ...@@ -189,7 +243,8 @@ static void sa1111_ack_irq(unsigned int irq)
static void sa1111_mask_lowirq(unsigned int irq) static void sa1111_mask_lowirq(unsigned int irq)
{ {
void __iomem *mapbase = get_irq_chip_data(irq); struct sa1111 *sachip = get_irq_chip_data(irq);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned long ie0; unsigned long ie0;
ie0 = sa1111_readl(mapbase + SA1111_INTEN0); ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
...@@ -199,7 +254,8 @@ static void sa1111_mask_lowirq(unsigned int irq) ...@@ -199,7 +254,8 @@ static void sa1111_mask_lowirq(unsigned int irq)
static void sa1111_unmask_lowirq(unsigned int irq) static void sa1111_unmask_lowirq(unsigned int irq)
{ {
void __iomem *mapbase = get_irq_chip_data(irq); struct sa1111 *sachip = get_irq_chip_data(irq);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned long ie0; unsigned long ie0;
ie0 = sa1111_readl(mapbase + SA1111_INTEN0); ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
...@@ -216,8 +272,9 @@ static void sa1111_unmask_lowirq(unsigned int irq) ...@@ -216,8 +272,9 @@ static void sa1111_unmask_lowirq(unsigned int irq)
*/ */
static int sa1111_retrigger_lowirq(unsigned int irq) static int sa1111_retrigger_lowirq(unsigned int irq)
{ {
struct sa1111 *sachip = get_irq_chip_data(irq);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned int mask = SA1111_IRQMASK_LO(irq); unsigned int mask = SA1111_IRQMASK_LO(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned long ip0; unsigned long ip0;
int i; int i;
...@@ -237,8 +294,9 @@ static int sa1111_retrigger_lowirq(unsigned int irq) ...@@ -237,8 +294,9 @@ static int sa1111_retrigger_lowirq(unsigned int irq)
static int sa1111_type_lowirq(unsigned int irq, unsigned int flags) static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
{ {
struct sa1111 *sachip = get_irq_chip_data(irq);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned int mask = SA1111_IRQMASK_LO(irq); unsigned int mask = SA1111_IRQMASK_LO(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned long ip0; unsigned long ip0;
if (flags == IRQ_TYPE_PROBE) if (flags == IRQ_TYPE_PROBE)
...@@ -260,8 +318,9 @@ static int sa1111_type_lowirq(unsigned int irq, unsigned int flags) ...@@ -260,8 +318,9 @@ static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
static int sa1111_wake_lowirq(unsigned int irq, unsigned int on) static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
{ {
struct sa1111 *sachip = get_irq_chip_data(irq);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned int mask = SA1111_IRQMASK_LO(irq); unsigned int mask = SA1111_IRQMASK_LO(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned long we0; unsigned long we0;
we0 = sa1111_readl(mapbase + SA1111_WAKEEN0); we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
...@@ -286,7 +345,8 @@ static struct irq_chip sa1111_low_chip = { ...@@ -286,7 +345,8 @@ static struct irq_chip sa1111_low_chip = {
static void sa1111_mask_highirq(unsigned int irq) static void sa1111_mask_highirq(unsigned int irq)
{ {
void __iomem *mapbase = get_irq_chip_data(irq); struct sa1111 *sachip = get_irq_chip_data(irq);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned long ie1; unsigned long ie1;
ie1 = sa1111_readl(mapbase + SA1111_INTEN1); ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
...@@ -296,7 +356,8 @@ static void sa1111_mask_highirq(unsigned int irq) ...@@ -296,7 +356,8 @@ static void sa1111_mask_highirq(unsigned int irq)
static void sa1111_unmask_highirq(unsigned int irq) static void sa1111_unmask_highirq(unsigned int irq)
{ {
void __iomem *mapbase = get_irq_chip_data(irq); struct sa1111 *sachip = get_irq_chip_data(irq);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned long ie1; unsigned long ie1;
ie1 = sa1111_readl(mapbase + SA1111_INTEN1); ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
...@@ -313,8 +374,9 @@ static void sa1111_unmask_highirq(unsigned int irq) ...@@ -313,8 +374,9 @@ static void sa1111_unmask_highirq(unsigned int irq)
*/ */
static int sa1111_retrigger_highirq(unsigned int irq) static int sa1111_retrigger_highirq(unsigned int irq)
{ {
struct sa1111 *sachip = get_irq_chip_data(irq);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned int mask = SA1111_IRQMASK_HI(irq); unsigned int mask = SA1111_IRQMASK_HI(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned long ip1; unsigned long ip1;
int i; int i;
...@@ -334,8 +396,9 @@ static int sa1111_retrigger_highirq(unsigned int irq) ...@@ -334,8 +396,9 @@ static int sa1111_retrigger_highirq(unsigned int irq)
static int sa1111_type_highirq(unsigned int irq, unsigned int flags) static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
{ {
struct sa1111 *sachip = get_irq_chip_data(irq);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned int mask = SA1111_IRQMASK_HI(irq); unsigned int mask = SA1111_IRQMASK_HI(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned long ip1; unsigned long ip1;
if (flags == IRQ_TYPE_PROBE) if (flags == IRQ_TYPE_PROBE)
...@@ -357,8 +420,9 @@ static int sa1111_type_highirq(unsigned int irq, unsigned int flags) ...@@ -357,8 +420,9 @@ static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
static int sa1111_wake_highirq(unsigned int irq, unsigned int on) static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
{ {
struct sa1111 *sachip = get_irq_chip_data(irq);
void __iomem *mapbase = sachip->base + SA1111_INTC;
unsigned int mask = SA1111_IRQMASK_HI(irq); unsigned int mask = SA1111_IRQMASK_HI(irq);
void __iomem *mapbase = get_irq_chip_data(irq);
unsigned long we1; unsigned long we1;
we1 = sa1111_readl(mapbase + SA1111_WAKEEN1); we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
...@@ -412,14 +476,14 @@ static void sa1111_setup_irq(struct sa1111 *sachip) ...@@ -412,14 +476,14 @@ static void sa1111_setup_irq(struct sa1111 *sachip)
for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) { for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
set_irq_chip(irq, &sa1111_low_chip); set_irq_chip(irq, &sa1111_low_chip);
set_irq_chip_data(irq, irqbase); set_irq_chip_data(irq, sachip);
set_irq_handler(irq, handle_edge_irq); set_irq_handler(irq, handle_edge_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
} }
for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) { for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) {
set_irq_chip(irq, &sa1111_high_chip); set_irq_chip(irq, &sa1111_high_chip);
set_irq_chip_data(irq, irqbase); set_irq_chip_data(irq, sachip);
set_irq_handler(irq, handle_edge_irq); set_irq_handler(irq, handle_edge_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
} }
...@@ -428,7 +492,7 @@ static void sa1111_setup_irq(struct sa1111 *sachip) ...@@ -428,7 +492,7 @@ static void sa1111_setup_irq(struct sa1111 *sachip)
* Register SA1111 interrupt * Register SA1111 interrupt
*/ */
set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING); set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
set_irq_data(sachip->irq, irqbase); set_irq_data(sachip->irq, sachip);
set_irq_chained_handler(sachip->irq, sa1111_irq_handler); set_irq_chained_handler(sachip->irq, sa1111_irq_handler);
} }
......
...@@ -140,6 +140,7 @@ EXPORT_SYMBOL(reset_scoop); ...@@ -140,6 +140,7 @@ EXPORT_SYMBOL(reset_scoop);
EXPORT_SYMBOL(read_scoop_reg); EXPORT_SYMBOL(read_scoop_reg);
EXPORT_SYMBOL(write_scoop_reg); EXPORT_SYMBOL(write_scoop_reg);
#ifdef CONFIG_PM
static void check_scoop_reg(struct scoop_dev *sdev) static void check_scoop_reg(struct scoop_dev *sdev)
{ {
unsigned short mcr; unsigned short mcr;
...@@ -149,7 +150,6 @@ static void check_scoop_reg(struct scoop_dev *sdev) ...@@ -149,7 +150,6 @@ static void check_scoop_reg(struct scoop_dev *sdev)
iowrite16(0x0101, sdev->base + SCOOP_MCR); iowrite16(0x0101, sdev->base + SCOOP_MCR);
} }
#ifdef CONFIG_PM
static int scoop_suspend(struct platform_device *dev, pm_message_t state) static int scoop_suspend(struct platform_device *dev, pm_message_t state)
{ {
struct scoop_dev *sdev = platform_get_drvdata(dev); struct scoop_dev *sdev = platform_get_drvdata(dev);
......
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...@@ -184,7 +184,7 @@ CONFIG_S3C24XX_PWM=y ...@@ -184,7 +184,7 @@ CONFIG_S3C24XX_PWM=y
CONFIG_S3C24XX_GPIO_EXTRA=0 CONFIG_S3C24XX_GPIO_EXTRA=0
CONFIG_S3C2410_DMA=y CONFIG_S3C2410_DMA=y
# CONFIG_S3C2410_DMA_DEBUG is not set # CONFIG_S3C2410_DMA_DEBUG is not set
CONFIG_S3C24XX_ADC=y CONFIG_S3C_ADC=y
CONFIG_PLAT_S3C=y CONFIG_PLAT_S3C=y
CONFIG_CPU_LLSERIAL_S3C2440_ONLY=y CONFIG_CPU_LLSERIAL_S3C2440_ONLY=y
CONFIG_CPU_LLSERIAL_S3C2440=y CONFIG_CPU_LLSERIAL_S3C2440=y
...@@ -199,8 +199,8 @@ CONFIG_S3C_BOOT_UART_FORCE_FIFO=y ...@@ -199,8 +199,8 @@ CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
# #
# Power management # Power management
# #
# CONFIG_S3C2410_PM_DEBUG is not set # CONFIG_SAMSUNG_PM_DEBUG is not set
# CONFIG_S3C2410_PM_CHECK is not set # CONFIG_SAMSUNG_PM_CHECK is not set
CONFIG_S3C_LOWLEVEL_UART_PORT=0 CONFIG_S3C_LOWLEVEL_UART_PORT=0
CONFIG_S3C_GPIO_SPACE=0 CONFIG_S3C_GPIO_SPACE=0
......
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...@@ -176,6 +176,7 @@ CONFIG_ARCH_MV78XX0=y ...@@ -176,6 +176,7 @@ CONFIG_ARCH_MV78XX0=y
# #
CONFIG_MACH_DB78X00_BP=y CONFIG_MACH_DB78X00_BP=y
CONFIG_MACH_RD78X00_MASA=y CONFIG_MACH_RD78X00_MASA=y
CONFIG_MACH_TERASTATION_WXL=y
CONFIG_PLAT_ORION=y CONFIG_PLAT_ORION=y
# #
......
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...@@ -200,7 +200,7 @@ CONFIG_MACH_MX27ADS=y ...@@ -200,7 +200,7 @@ CONFIG_MACH_MX27ADS=y
CONFIG_MACH_PCM038=y CONFIG_MACH_PCM038=y
CONFIG_MACH_PCM970_BASEBOARD=y CONFIG_MACH_PCM970_BASEBOARD=y
CONFIG_MACH_MX27_3DS=y CONFIG_MACH_MX27_3DS=y
CONFIG_MACH_MX27LITE=y CONFIG_MACH_IMX27LITE=y
CONFIG_MXC_IRQ_PRIOR=y CONFIG_MXC_IRQ_PRIOR=y
CONFIG_MXC_PWM=y CONFIG_MXC_PWM=y
......
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...@@ -187,7 +187,7 @@ CONFIG_S3C24XX_GPIO_EXTRA128=y ...@@ -187,7 +187,7 @@ CONFIG_S3C24XX_GPIO_EXTRA128=y
CONFIG_PM_SIMTEC=y CONFIG_PM_SIMTEC=y
CONFIG_S3C2410_DMA=y CONFIG_S3C2410_DMA=y
# CONFIG_S3C2410_DMA_DEBUG is not set # CONFIG_S3C2410_DMA_DEBUG is not set
CONFIG_S3C24XX_ADC=y CONFIG_S3C_ADC=y
CONFIG_MACH_SMDK=y CONFIG_MACH_SMDK=y
CONFIG_PLAT_S3C=y CONFIG_PLAT_S3C=y
CONFIG_CPU_LLSERIAL_S3C2410=y CONFIG_CPU_LLSERIAL_S3C2410=y
...@@ -203,8 +203,8 @@ CONFIG_S3C_BOOT_UART_FORCE_FIFO=y ...@@ -203,8 +203,8 @@ CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
# #
# Power management # Power management
# #
# CONFIG_S3C2410_PM_DEBUG is not set # CONFIG_SAMSUNG_PM_DEBUG is not set
# CONFIG_S3C2410_PM_CHECK is not set # CONFIG_SAMSUNG_PM_CHECK is not set
CONFIG_S3C_LOWLEVEL_UART_PORT=0 CONFIG_S3C_LOWLEVEL_UART_PORT=0
CONFIG_S3C_GPIO_SPACE=0 CONFIG_S3C_GPIO_SPACE=0
CONFIG_S3C_DEV_HSMMC=y CONFIG_S3C_DEV_HSMMC=y
......
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/* arch/arm/mach-s3c6400/include/mach/entry-macro.S /* arch/arm/include/asm/entry-macro-vic2.S
*
* Originally arch/arm/mach-s3c6400/include/mach/entry-macro.S
* *
* Copyright 2008 Openmoko, Inc. * Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics * Copyright 2008 Simtec Electronics
* http://armlinux.simtec.co.uk/ * http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk> * Ben Dooks <ben@simtec.co.uk>
* *
* Low-level IRQ helper macros for the Samsung S3C64XX series * Low-level IRQ helper macros for a device with two VICs
* *
* This file is licensed under the terms of the GNU General Public * This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any * License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied. * warranty of any kind, whether express or implied.
*/ */
/* This should be included from <mach/entry-macro.S> with the necessary
* defines for virtual addresses and IRQ bases for the two vics.
*
* The code needs the following defined:
* IRQ_VIC0_BASE IRQ number of VIC0's first IRQ
* IRQ_VIC1_BASE IRQ number of VIC1's first IRQ
* VA_VIC0 Virtual address of VIC0
* VA_VIC1 Virtual address of VIC1
*
* Note, code assumes VIC0's virtual address is an ARM immediate constant
* away from VIC1.
*/
#include <asm/hardware/vic.h> #include <asm/hardware/vic.h>
#include <mach/map.h>
#include <plat/irqs.h>
.macro disable_fiq .macro disable_fiq
.endm .endm
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
ldr \base, =S3C_VA_VIC0 ldr \base, =VA_VIC0
.endm .endm
.macro arch_ret_to_user, tmp1, tmp2 .macro arch_ret_to_user, tmp1, tmp2
...@@ -29,13 +42,13 @@ ...@@ -29,13 +42,13 @@
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
@ check the vic0 @ check the vic0
mov \irqnr, # S3C_IRQ_OFFSET + 31 mov \irqnr, #IRQ_VIC0_BASE + 31
ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
teq \irqstat, #0 teq \irqstat, #0
@ otherwise try vic1 @ otherwise try vic1
addeq \tmp, \base, #(S3C_VA_VIC1 - S3C_VA_VIC0) addeq \tmp, \base, #(VA_VIC1 - VA_VIC0)
addeq \irqnr, \irqnr, #32 addeq \irqnr, \irqnr, #(IRQ_VIC1_BASE - IRQ_VIC0_BASE)
ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
teqeq \irqstat, #0 teqeq \irqstat, #0
......
...@@ -75,6 +75,18 @@ extern unsigned long it8152_base_address; ...@@ -75,6 +75,18 @@ extern unsigned long it8152_base_address;
IT8152_PD_IRQ(1) USB (USBR) IT8152_PD_IRQ(1) USB (USBR)
IT8152_PD_IRQ(0) Audio controller (ACR) IT8152_PD_IRQ(0) Audio controller (ACR)
*/ */
#define IT8152_IRQ(x) (IRQ_BOARD_END + (x))
/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */
#define IT8152_LD_IRQ_COUNT 9
#define IT8152_LP_IRQ_COUNT 16
#define IT8152_PD_IRQ_COUNT 15
/* Priorities: */
#define IT8152_PD_IRQ(i) IT8152_IRQ(i)
#define IT8152_LP_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT)
#define IT8152_LD_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT)
/* frequently used interrupts */ /* frequently used interrupts */
#define IT8152_PCISERR IT8152_PD_IRQ(14) #define IT8152_PCISERR IT8152_PD_IRQ(14)
#define IT8152_H2PTADR IT8152_PD_IRQ(13) #define IT8152_H2PTADR IT8152_PD_IRQ(13)
......
...@@ -214,4 +214,8 @@ void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int ...@@ -214,4 +214,8 @@ void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int
/* Frontlight control */ /* Frontlight control */
void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf); void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf);
struct locomo_platform_data {
int irq_base; /* IRQ base for cascaded on-chip IRQs */
};
#endif #endif
...@@ -578,4 +578,8 @@ void sa1111_set_io_dir(struct sa1111_dev *sadev, unsigned int bits, unsigned int ...@@ -578,4 +578,8 @@ void sa1111_set_io_dir(struct sa1111_dev *sadev, unsigned int bits, unsigned int
void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v); void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v);
void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v); void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v);
struct sa1111_platform_data {
int irq_base; /* base for cascaded on-chip IRQs */
};
#endif /* _ASM_ARCH_SA1111 */ #endif /* _ASM_ARCH_SA1111 */
...@@ -359,7 +359,9 @@ void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk) ...@@ -359,7 +359,9 @@ void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk)
frame.fp = regs->ARM_fp; frame.fp = regs->ARM_fp;
frame.sp = regs->ARM_sp; frame.sp = regs->ARM_sp;
frame.lr = regs->ARM_lr; frame.lr = regs->ARM_lr;
frame.pc = regs->ARM_pc; /* PC might be corrupted, use LR in that case. */
frame.pc = kernel_text_address(regs->ARM_pc)
? regs->ARM_pc : regs->ARM_lr;
} else if (tsk == current) { } else if (tsk == current) {
frame.fp = (unsigned long)__builtin_frame_address(0); frame.fp = (unsigned long)__builtin_frame_address(0);
frame.sp = current_sp; frame.sp = current_sp;
......
...@@ -58,6 +58,12 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id) ...@@ -58,6 +58,12 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
{ {
u32 sr = at91_sys_read(AT91_ST_SR) & irqmask; u32 sr = at91_sys_read(AT91_ST_SR) & irqmask;
/*
* irqs should be disabled here, but as the irq is shared they are only
* guaranteed to be off if the timer irq is registered first.
*/
WARN_ON_ONCE(!irqs_disabled());
/* simulate "oneshot" timer with alarm */ /* simulate "oneshot" timer with alarm */
if (sr & AT91_ST_ALMS) { if (sr & AT91_ST_ALMS) {
clkevt.event_handler(&clkevt); clkevt.event_handler(&clkevt);
...@@ -132,24 +138,11 @@ clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev) ...@@ -132,24 +138,11 @@ clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev)
static int static int
clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev) clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
{ {
unsigned long flags;
u32 alm; u32 alm;
int status = 0; int status = 0;
BUG_ON(delta < 2); BUG_ON(delta < 2);
/* Use "raw" primitives so we behave correctly on RT kernels. */
raw_local_irq_save(flags);
/*
* According to Thomas Gleixner irqs are already disabled here. Simply
* removing raw_local_irq_save above (and the matching
* raw_local_irq_restore) was not accepted. See
* http://thread.gmane.org/gmane.linux.ports.arm.kernel/41174
* So for now (2008-11-20) just warn once if irqs were not disabled ...
*/
WARN_ON_ONCE(!raw_irqs_disabled_flags(flags));
/* The alarm IRQ uses absolute time (now+delta), not the relative /* The alarm IRQ uses absolute time (now+delta), not the relative
* time (delta) in our calling convention. Like all clockevents * time (delta) in our calling convention. Like all clockevents
* using such "match" hardware, we have a race to defend against. * using such "match" hardware, we have a race to defend against.
...@@ -169,7 +162,6 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev) ...@@ -169,7 +162,6 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
alm += delta; alm += delta;
at91_sys_write(AT91_ST_RTAR, alm); at91_sys_write(AT91_ST_RTAR, alm);
raw_local_irq_restore(flags);
return status; return status;
} }
......
...@@ -62,16 +62,12 @@ static struct clocksource pit_clk = { ...@@ -62,16 +62,12 @@ static struct clocksource pit_clk = {
static void static void
pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev) pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
{ {
unsigned long flags;
switch (mode) { switch (mode) {
case CLOCK_EVT_MODE_PERIODIC: case CLOCK_EVT_MODE_PERIODIC:
/* update clocksource counter, then enable the IRQ */ /* update clocksource counter */
raw_local_irq_save(flags);
pit_cnt += pit_cycle * PIT_PICNT(at91_sys_read(AT91_PIT_PIVR)); pit_cnt += pit_cycle * PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN
| AT91_PIT_PITIEN); | AT91_PIT_PITIEN);
raw_local_irq_restore(flags);
break; break;
case CLOCK_EVT_MODE_ONESHOT: case CLOCK_EVT_MODE_ONESHOT:
BUG(); BUG();
...@@ -100,6 +96,11 @@ static struct clock_event_device pit_clkevt = { ...@@ -100,6 +96,11 @@ static struct clock_event_device pit_clkevt = {
*/ */
static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id) static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
{ {
/*
* irqs should be disabled here, but as the irq is shared they are only
* guaranteed to be off if the timer irq is registered first.
*/
WARN_ON_ONCE(!irqs_disabled());
/* The PIT interrupt may be disabled, and is shared */ /* The PIT interrupt may be disabled, and is shared */
if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC) if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC)
......
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obj-y += common.o addr-map.o irq.o pcie.o obj-y += common.o addr-map.o mpp.o irq.o pcie.o
obj-$(CONFIG_MACH_DB78X00_BP) += db78x00-bp-setup.o obj-$(CONFIG_MACH_DB78X00_BP) += db78x00-bp-setup.o
obj-$(CONFIG_MACH_RD78X00_MASA) += rd78x00-masa-setup.o obj-$(CONFIG_MACH_RD78X00_MASA) += rd78x00-masa-setup.o
obj-$(CONFIG_MACH_TERASTATION_WXL) += buffalo-wxl-setup.o
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