Commit dcb2e993 authored by Ville Syrjälä's avatar Ville Syrjälä

Revert "drm/i915: Enable PSR by default on Valleyview and Cherryview."

This reverts commit a38c274f.

PSR causes all sorts of vblank wait timeouts and whanot on CHV. Disable
it again.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Fixes: a38c274f ("drm/i915: Enable PSR by default on Valleyview and Cherryview.")
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1457543247-13987-2-git-send-email-ville.syrjala@linux.intel.com
Link: http://patchwork.freedesktop.org/patch/msgid/1457543247-13987-2-git-send-email-ville.syrjala@linux.intel.comAcked-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
parent 8b1f165a
...@@ -781,8 +781,7 @@ void intel_psr_init(struct drm_device *dev) ...@@ -781,8 +781,7 @@ void intel_psr_init(struct drm_device *dev)
/* Per platform default */ /* Per platform default */
if (i915.enable_psr == -1) { if (i915.enable_psr == -1) {
if (IS_HASWELL(dev) || IS_BROADWELL(dev) || if (IS_HASWELL(dev) || IS_BROADWELL(dev))
IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
i915.enable_psr = 1; i915.enable_psr = 1;
else else
i915.enable_psr = 0; i915.enable_psr = 0;
......
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