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Kirill Smelkov
linux
Commits
dcf81c1a
Commit
dcf81c1a
authored
Jan 26, 2012
by
Russell King
Browse files
Options
Browse Files
Download
Plain Diff
Merge branch 'amba' into for-armsoc
parents
34e5f4f1
75c06963
Changes
39
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Side-by-side
Showing
39 changed files
with
489 additions
and
816 deletions
+489
-816
arch/arm/mach-bcmring/core.c
arch/arm/mach-bcmring/core.c
+2
-21
arch/arm/mach-ep93xx/core.c
arch/arm/mach-ep93xx/core.c
+6
-40
arch/arm/mach-exynos/dma.c
arch/arm/mach-exynos/dma.c
+6
-32
arch/arm/mach-integrator/core.c
arch/arm/mach-integrator/core.c
+13
-57
arch/arm/mach-integrator/impd1.c
arch/arm/mach-integrator/impd1.c
+3
-6
arch/arm/mach-integrator/integrator_cp.c
arch/arm/mach-integrator/integrator_cp.c
+9
-40
arch/arm/mach-lpc32xx/phy3250.c
arch/arm/mach-lpc32xx/phy3250.c
+4
-28
arch/arm/mach-mxs/devices.c
arch/arm/mach-mxs/devices.c
+5
-3
arch/arm/mach-mxs/devices/amba-duart.c
arch/arm/mach-mxs/devices/amba-duart.c
+1
-1
arch/arm/mach-netx/fb.c
arch/arm/mach-netx/fb.c
+1
-12
arch/arm/mach-nomadik/board-nhk8815.c
arch/arm/mach-nomadik/board-nhk8815.c
+4
-13
arch/arm/mach-nomadik/cpu-8815.c
arch/arm/mach-nomadik/cpu-8815.c
+2
-7
arch/arm/mach-omap2/emu.c
arch/arm/mach-omap2/emu.c
+2
-24
arch/arm/mach-realview/core.h
arch/arm/mach-realview/core.h
+5
-15
arch/arm/mach-realview/include/mach/irqs-pb1176.h
arch/arm/mach-realview/include/mach/irqs-pb1176.h
+1
-1
arch/arm/mach-realview/realview_eb.c
arch/arm/mach-realview/realview_eb.c
+39
-39
arch/arm/mach-realview/realview_pb1176.c
arch/arm/mach-realview/realview_pb1176.c
+39
-39
arch/arm/mach-realview/realview_pb11mp.c
arch/arm/mach-realview/realview_pb11mp.c
+39
-39
arch/arm/mach-realview/realview_pba8.c
arch/arm/mach-realview/realview_pba8.c
+39
-39
arch/arm/mach-realview/realview_pbx.c
arch/arm/mach-realview/realview_pbx.c
+39
-39
arch/arm/mach-s5p64x0/dma.c
arch/arm/mach-s5p64x0/dma.c
+5
-17
arch/arm/mach-s5pc100/dma.c
arch/arm/mach-s5pc100/dma.c
+6
-32
arch/arm/mach-s5pv210/dma.c
arch/arm/mach-s5pv210/dma.c
+6
-32
arch/arm/mach-spear3xx/spear300.c
arch/arm/mach-spear3xx/spear300.c
+2
-12
arch/arm/mach-spear3xx/spear3xx.c
arch/arm/mach-spear3xx/spear3xx.c
+4
-23
arch/arm/mach-spear6xx/spear6xx.c
arch/arm/mach-spear6xx/spear6xx.c
+5
-5
arch/arm/mach-u300/core.c
arch/arm/mach-u300/core.c
+16
-69
arch/arm/mach-ux500/devices-common.c
arch/arm/mach-ux500/devices-common.c
+3
-10
arch/arm/mach-versatile/core.c
arch/arm/mach-versatile/core.c
+35
-35
arch/arm/mach-versatile/core.h
arch/arm/mach-versatile/core.h
+5
-15
arch/arm/mach-versatile/versatile_pb.c
arch/arm/mach-versatile/versatile_pb.c
+9
-9
arch/arm/mach-vexpress/core.h
arch/arm/mach-vexpress/core.h
+0
-17
arch/arm/mach-vexpress/ct-ca9x4.c
arch/arm/mach-vexpress/ct-ca9x4.c
+4
-4
arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
+1
-1
arch/arm/mach-vexpress/v2m.c
arch/arm/mach-vexpress/v2m.c
+10
-10
drivers/amba/bus.c
drivers/amba/bus.c
+79
-26
drivers/mmc/host/mmci.c
drivers/mmc/host/mmci.c
+1
-1
drivers/of/platform.c
drivers/of/platform.c
+3
-3
include/linux/amba/bus.h
include/linux/amba/bus.h
+36
-0
No files found.
arch/arm/mach-bcmring/core.c
View file @
dcf81c1a
...
...
@@ -52,27 +52,8 @@
#include <mach/csp/chipcHw_inline.h>
#include <mach/csp/tmrHw_reg.h>
#define AMBA_DEVICE(name, initname, base, plat, size) \
static struct amba_device name##_device = { \
.dev = { \
.coherent_dma_mask = ~0, \
.init_name = initname, \
.platform_data = plat \
}, \
.res = { \
.start = MM_ADDR_IO_##base, \
.end = MM_ADDR_IO_##base + (size) - 1, \
.flags = IORESOURCE_MEM \
}, \
.dma_mask = ~0, \
.irq = { \
IRQ_##base \
} \
}
AMBA_DEVICE
(
uartA
,
"uarta"
,
UARTA
,
NULL
,
SZ_4K
);
AMBA_DEVICE
(
uartB
,
"uartb"
,
UARTB
,
NULL
,
SZ_4K
);
static
AMBA_APB_DEVICE
(
uartA
,
"uarta"
,
MM_ADDR_IO_UARTA
,
{
IRQ_UARTA
},
NULL
);
static
AMBA_APB_DEVICE
(
uartB
,
"uartb"
,
MM_ADDR_IO_UARTB
,
{
IRQ_UARTB
},
NULL
);
static
struct
clk
pll1_clk
=
{
.
name
=
"PLL1"
,
...
...
arch/arm/mach-ep93xx/core.c
View file @
dcf81c1a
...
...
@@ -279,48 +279,14 @@ static struct amba_pl010_data ep93xx_uart_data = {
.
set_mctrl
=
ep93xx_uart_set_mctrl
,
};
static
struct
amba_device
uart1_device
=
{
.
dev
=
{
.
init_name
=
"apb:uart1"
,
.
platform_data
=
&
ep93xx_uart_data
,
},
.
res
=
{
.
start
=
EP93XX_UART1_PHYS_BASE
,
.
end
=
EP93XX_UART1_PHYS_BASE
+
0x0fff
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_EP93XX_UART1
,
NO_IRQ
},
.
periphid
=
0x00041010
,
};
static
struct
amba_device
uart2_device
=
{
.
dev
=
{
.
init_name
=
"apb:uart2"
,
.
platform_data
=
&
ep93xx_uart_data
,
},
.
res
=
{
.
start
=
EP93XX_UART2_PHYS_BASE
,
.
end
=
EP93XX_UART2_PHYS_BASE
+
0x0fff
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_EP93XX_UART2
,
NO_IRQ
},
.
periphid
=
0x00041010
,
};
static
AMBA_APB_DEVICE
(
uart1
,
"apb:uart1"
,
0x00041010
,
EP93XX_UART1_PHYS_BASE
,
{
IRQ_EP93XX_UART1
},
&
ep93xx_uart_data
);
static
struct
amba_device
uart3_device
=
{
.
dev
=
{
.
init_name
=
"apb:uart3"
,
.
platform_data
=
&
ep93xx_uart_data
,
},
.
res
=
{
.
start
=
EP93XX_UART3_PHYS_BASE
,
.
end
=
EP93XX_UART3_PHYS_BASE
+
0x0fff
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_EP93XX_UART3
,
NO_IRQ
},
.
periphid
=
0x00041010
,
};
static
AMBA_APB_DEVICE
(
uart2
,
"apb:uart2"
,
0x00041010
,
EP93XX_UART2_PHYS_BASE
,
{
IRQ_EP93XX_UART2
},
&
ep93xx_uart_data
);
static
AMBA_APB_DEVICE
(
uart3
,
"apb:uart3"
,
0x00041010
,
EP93XX_UART3_PHYS_BASE
,
{
IRQ_EP93XX_UART3
},
&
ep93xx_uart_data
);
static
struct
resource
ep93xx_rtc_resource
[]
=
{
{
...
...
arch/arm/mach-exynos/dma.c
View file @
dcf81c1a
...
...
@@ -74,21 +74,8 @@ struct dma_pl330_platdata exynos4_pdma0_pdata = {
.
peri_id
=
pdma0_peri
,
};
struct
amba_device
exynos4_device_pdma0
=
{
.
dev
=
{
.
init_name
=
"dma-pl330.0"
,
.
dma_mask
=
&
dma_dmamask
,
.
coherent_dma_mask
=
DMA_BIT_MASK
(
32
),
.
platform_data
=
&
exynos4_pdma0_pdata
,
},
.
res
=
{
.
start
=
EXYNOS4_PA_PDMA0
,
.
end
=
EXYNOS4_PA_PDMA0
+
SZ_4K
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_PDMA0
,
NO_IRQ
},
.
periphid
=
0x00041330
,
};
AMBA_AHB_DEVICE
(
exynos4_pdma0
,
"dma-pl330.0"
,
0x00041330
,
EXYNOS4_PA_PDMA0
,
{
IRQ_PDMA0
},
&
exynos4_pdma0_pdata
);
u8
pdma1_peri
[]
=
{
DMACH_PCM0_RX
,
...
...
@@ -123,21 +110,8 @@ struct dma_pl330_platdata exynos4_pdma1_pdata = {
.
peri_id
=
pdma1_peri
,
};
struct
amba_device
exynos4_device_pdma1
=
{
.
dev
=
{
.
init_name
=
"dma-pl330.1"
,
.
dma_mask
=
&
dma_dmamask
,
.
coherent_dma_mask
=
DMA_BIT_MASK
(
32
),
.
platform_data
=
&
exynos4_pdma1_pdata
,
},
.
res
=
{
.
start
=
EXYNOS4_PA_PDMA1
,
.
end
=
EXYNOS4_PA_PDMA1
+
SZ_4K
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_PDMA1
,
NO_IRQ
},
.
periphid
=
0x00041330
,
};
AMBA_AHB_DEVICE
(
exynos4_pdma1
,
"dma-pl330.1"
,
0x00041330
,
EXYNOS4_PA_PDMA1
,
{
IRQ_PDMA1
},
&
exynos4_pdma1_pdata
);
static
int
__init
exynos4_dma_init
(
void
)
{
...
...
@@ -146,11 +120,11 @@ static int __init exynos4_dma_init(void)
dma_cap_set
(
DMA_SLAVE
,
exynos4_pdma0_pdata
.
cap_mask
);
dma_cap_set
(
DMA_CYCLIC
,
exynos4_pdma0_pdata
.
cap_mask
);
amba_device_register
(
&
exynos4_
device_pdma0
,
&
iomem_resource
);
amba_device_register
(
&
exynos4_
pdma0_device
,
&
iomem_resource
);
dma_cap_set
(
DMA_SLAVE
,
exynos4_pdma1_pdata
.
cap_mask
);
dma_cap_set
(
DMA_CYCLIC
,
exynos4_pdma1_pdata
.
cap_mask
);
amba_device_register
(
&
exynos4_
device_pdma1
,
&
iomem_resource
);
amba_device_register
(
&
exynos4_
pdma1_device
,
&
iomem_resource
);
return
0
;
}
...
...
arch/arm/mach-integrator/core.c
View file @
dcf81c1a
...
...
@@ -35,67 +35,23 @@
static
struct
amba_pl010_data
integrator_uart_data
;
static
struct
amba_device
rtc_device
=
{
.
dev
=
{
.
init_name
=
"mb:15"
,
},
.
res
=
{
.
start
=
INTEGRATOR_RTC_BASE
,
.
end
=
INTEGRATOR_RTC_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_RTCINT
,
NO_IRQ
},
};
#define INTEGRATOR_RTC_IRQ { IRQ_RTCINT }
#define INTEGRATOR_UART0_IRQ { IRQ_UARTINT0 }
#define INTEGRATOR_UART1_IRQ { IRQ_UARTINT1 }
#define KMI0_IRQ { IRQ_KMIINT0 }
#define KMI1_IRQ { IRQ_KMIINT1 }
static
struct
amba_device
uart0_device
=
{
.
dev
=
{
.
init_name
=
"mb:16"
,
.
platform_data
=
&
integrator_uart_data
,
},
.
res
=
{
.
start
=
INTEGRATOR_UART0_BASE
,
.
end
=
INTEGRATOR_UART0_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_UARTINT0
,
NO_IRQ
},
};
static
AMBA_APB_DEVICE
(
rtc
,
"mb:15"
,
0
,
INTEGRATOR_RTC_BASE
,
INTEGRATOR_RTC_IRQ
,
NULL
);
static
struct
amba_device
uart1_device
=
{
.
dev
=
{
.
init_name
=
"mb:17"
,
.
platform_data
=
&
integrator_uart_data
,
},
.
res
=
{
.
start
=
INTEGRATOR_UART1_BASE
,
.
end
=
INTEGRATOR_UART1_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_UARTINT1
,
NO_IRQ
},
};
static
AMBA_APB_DEVICE
(
uart0
,
"mb:16"
,
0
,
INTEGRATOR_UART0_BASE
,
INTEGRATOR_UART0_IRQ
,
&
integrator_uart_data
);
static
struct
amba_device
kmi0_device
=
{
.
dev
=
{
.
init_name
=
"mb:18"
,
},
.
res
=
{
.
start
=
KMI0_BASE
,
.
end
=
KMI0_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_KMIINT0
,
NO_IRQ
},
};
static
AMBA_APB_DEVICE
(
uart1
,
"mb:17"
,
0
,
INTEGRATOR_UART1_BASE
,
INTEGRATOR_UART1_IRQ
,
&
integrator_uart_data
);
static
struct
amba_device
kmi1_device
=
{
.
dev
=
{
.
init_name
=
"mb:19"
,
},
.
res
=
{
.
start
=
KMI1_BASE
,
.
end
=
KMI1_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_KMIINT1
,
NO_IRQ
},
};
static
AMBA_APB_DEVICE
(
kmi0
,
"mb:18"
,
0
,
KMI0_BASE
,
KMI0_IRQ
,
NULL
);
static
AMBA_APB_DEVICE
(
kmi1
,
"mb:19"
,
0
,
KMI1_BASE
,
KMI1_IRQ
,
NULL
);
static
struct
amba_device
*
amba_devs
[]
__initdata
=
{
&
rtc_device
,
...
...
arch/arm/mach-integrator/impd1.c
View file @
dcf81c1a
...
...
@@ -401,24 +401,21 @@ static int impd1_probe(struct lm_device *dev)
pc_base
=
dev
->
resource
.
start
+
idev
->
offset
;
d
=
kzalloc
(
sizeof
(
struct
amba_device
),
GFP_KERNEL
);
d
=
amba_device_alloc
(
NULL
,
pc_base
,
SZ_4K
);
if
(
!
d
)
continue
;
dev_set_name
(
&
d
->
dev
,
"lm%x:%5.5lx"
,
dev
->
id
,
idev
->
offset
>>
12
);
d
->
dev
.
parent
=
&
dev
->
dev
;
d
->
res
.
start
=
dev
->
resource
.
start
+
idev
->
offset
;
d
->
res
.
end
=
d
->
res
.
start
+
SZ_4K
-
1
;
d
->
res
.
flags
=
IORESOURCE_MEM
;
d
->
irq
[
0
]
=
dev
->
irq
;
d
->
irq
[
1
]
=
dev
->
irq
;
d
->
periphid
=
idev
->
id
;
d
->
dev
.
platform_data
=
idev
->
platform_data
;
ret
=
amba_device_
register
(
d
,
&
dev
->
resource
);
ret
=
amba_device_
add
(
d
,
&
dev
->
resource
);
if
(
ret
)
{
dev_err
(
&
d
->
dev
,
"unable to register device: %d
\n
"
,
ret
);
kfree
(
d
);
amba_device_put
(
d
);
}
}
...
...
arch/arm/mach-integrator/integrator_cp.c
View file @
dcf81c1a
...
...
@@ -347,32 +347,14 @@ static struct mmci_platform_data mmc_data = {
.
gpio_cd
=
-
1
,
};
static
struct
amba_device
mmc_device
=
{
.
dev
=
{
.
init_name
=
"mb:1c"
,
.
platform_data
=
&
mmc_data
,
},
.
res
=
{
.
start
=
INTEGRATOR_CP_MMC_BASE
,
.
end
=
INTEGRATOR_CP_MMC_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_CP_MMCIINT0
,
IRQ_CP_MMCIINT1
},
.
periphid
=
0
,
};
#define INTEGRATOR_CP_MMC_IRQS { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 }
#define INTEGRATOR_CP_AACI_IRQS { IRQ_CP_AACIINT }
static
struct
amba_device
aaci_device
=
{
.
dev
=
{
.
init_name
=
"mb:1d"
,
},
.
res
=
{
.
start
=
INTEGRATOR_CP_AACI_BASE
,
.
end
=
INTEGRATOR_CP_AACI_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_CP_AACIINT
,
NO_IRQ
},
.
periphid
=
0
,
};
static
AMBA_APB_DEVICE
(
mmc
,
"mb:1c"
,
0
,
INTEGRATOR_CP_MMC_BASE
,
INTEGRATOR_CP_MMC_IRQS
,
&
mmc_data
);
static
AMBA_APB_DEVICE
(
aaci
,
"mb:1d"
,
0
,
INTEGRATOR_CP_AACI_BASE
,
INTEGRATOR_CP_AACI_IRQS
,
NULL
);
/*
...
...
@@ -425,21 +407,8 @@ static struct clcd_board clcd_data = {
.
remove
=
versatile_clcd_remove_dma
,
};
static
struct
amba_device
clcd_device
=
{
.
dev
=
{
.
init_name
=
"mb:c0"
,
.
coherent_dma_mask
=
~
0
,
.
platform_data
=
&
clcd_data
,
},
.
res
=
{
.
start
=
INTCP_PA_CLCD_BASE
,
.
end
=
INTCP_PA_CLCD_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
.
dma_mask
=
~
0
,
.
irq
=
{
IRQ_CP_CLCDCINT
,
NO_IRQ
},
.
periphid
=
0
,
};
static
AMBA_AHB_DEVICE
(
clcd
,
"mb:c0"
,
0
,
INTCP_PA_CLCD_BASE
,
{
IRQ_CP_CLCDCINT
},
&
clcd_data
);
static
struct
amba_device
*
amba_devs
[]
__initdata
=
{
&
mmc_device
,
...
...
arch/arm/mach-lpc32xx/phy3250.c
View file @
dcf81c1a
...
...
@@ -149,20 +149,8 @@ static struct clcd_board lpc32xx_clcd_data = {
.
remove
=
lpc32xx_clcd_remove
,
};
static
struct
amba_device
lpc32xx_clcd_device
=
{
.
dev
=
{
.
coherent_dma_mask
=
~
0
,
.
init_name
=
"dev:clcd"
,
.
platform_data
=
&
lpc32xx_clcd_data
,
},
.
res
=
{
.
start
=
LPC32XX_LCD_BASE
,
.
end
=
(
LPC32XX_LCD_BASE
+
SZ_4K
-
1
),
.
flags
=
IORESOURCE_MEM
,
},
.
dma_mask
=
~
0
,
.
irq
=
{
IRQ_LPC32XX_LCD
,
NO_IRQ
},
};
static
AMBA_AHB_DEVICE
(
lpc32xx_clcd
,
"dev:clcd"
,
0
,
LPC32XX_LCD_BASE
,
{
IRQ_LPC32XX_LCD
},
&
lpc32xx_clcd_data
);
/*
* AMBA SSP (SPI)
...
...
@@ -191,20 +179,8 @@ static struct pl022_ssp_controller lpc32xx_ssp0_data = {
.
enable_dma
=
0
,
};
static
struct
amba_device
lpc32xx_ssp0_device
=
{
.
dev
=
{
.
coherent_dma_mask
=
~
0
,
.
init_name
=
"dev:ssp0"
,
.
platform_data
=
&
lpc32xx_ssp0_data
,
},
.
res
=
{
.
start
=
LPC32XX_SSP0_BASE
,
.
end
=
(
LPC32XX_SSP0_BASE
+
SZ_4K
-
1
),
.
flags
=
IORESOURCE_MEM
,
},
.
dma_mask
=
~
0
,
.
irq
=
{
IRQ_LPC32XX_SSP0
,
NO_IRQ
},
};
static
AMBA_APB_DEVICE
(
lpc32xx_ssp0
,
"dev:ssp0"
,
0
,
LPC32XX_SSP0_BASE
,
{
IRQ_LPC32XX_SSP0
},
&
lpc32xx_ssp0_data
);
/* AT25 driver registration */
static
int
__init
phy3250_spi_board_register
(
void
)
...
...
arch/arm/mach-mxs/devices.c
View file @
dcf81c1a
...
...
@@ -77,16 +77,18 @@ struct platform_device *__init mxs_add_platform_device_dmamask(
int
__init
mxs_add_amba_device
(
const
struct
amba_device
*
dev
)
{
struct
amba_device
*
adev
=
kmalloc
(
sizeof
(
*
adev
),
GFP_KERNEL
);
struct
amba_device
*
adev
=
amba_device_alloc
(
dev
->
dev
.
init_name
,
dev
->
res
.
start
,
resource_size
(
&
dev
->
res
));
if
(
!
adev
)
{
pr_err
(
"%s: failed to allocate memory"
,
__func__
);
return
-
ENOMEM
;
}
*
adev
=
*
dev
;
adev
->
irq
[
0
]
=
dev
->
irq
[
0
];
adev
->
irq
[
1
]
=
dev
->
irq
[
1
];
return
amba_device_
register
(
adev
,
&
iomem_resource
);
return
amba_device_
add
(
adev
,
&
iomem_resource
);
}
struct
device
mxs_apbh_bus
=
{
...
...
arch/arm/mach-mxs/devices/amba-duart.c
View file @
dcf81c1a
...
...
@@ -23,7 +23,7 @@ const struct amba_device name##_device __initconst = { \
.end = (soc ## _DUART_BASE_ADDR) + SZ_8K - 1, \
.flags = IORESOURCE_MEM, \
}, \
.irq = {soc ## _INT_DUART
, NO_IRQ},
\
.irq = {soc ## _INT_DUART
},
\
}
#ifdef CONFIG_SOC_IMX23
...
...
arch/arm/mach-netx/fb.c
View file @
dcf81c1a
...
...
@@ -92,18 +92,7 @@ void clk_put(struct clk *clk)
{
}
static
struct
amba_device
fb_device
=
{
.
dev
=
{
.
init_name
=
"fb"
,
.
coherent_dma_mask
=
~
0
,
},
.
res
=
{
.
start
=
0x00104000
,
.
end
=
0x00104fff
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
NETX_IRQ_LCD
,
NO_IRQ
},
};
static
AMBA_AHB_DEVICE
(
fb
,
"fb"
,
0
,
0x00104000
,
{
NETX_IRQ_LCD
},
NULL
);
int
netx_fb_init
(
struct
clcd_board
*
board
,
struct
clcd_panel
*
panel
)
{
...
...
arch/arm/mach-nomadik/board-nhk8815.c
View file @
dcf81c1a
...
...
@@ -185,20 +185,11 @@ static void __init nhk8815_onenand_init(void)
#endif
}
#define __MEM_4K_RESOURCE(x) \
.res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM}
static
AMBA_APB_DEVICE
(
uart0
,
"uart0"
,
0
,
NOMADIK_UART0_BASE
,
{
IRQ_UART0
},
NULL
);
static
struct
amba_device
uart0_device
=
{
.
dev
=
{
.
init_name
=
"uart0"
},
__MEM_4K_RESOURCE
(
NOMADIK_UART0_BASE
),
.
irq
=
{
IRQ_UART0
,
NO_IRQ
},
};
static
struct
amba_device
uart1_device
=
{
.
dev
=
{
.
init_name
=
"uart1"
},
__MEM_4K_RESOURCE
(
NOMADIK_UART1_BASE
),
.
irq
=
{
IRQ_UART1
,
NO_IRQ
},
};
static
AMBA_APB_DEVICE
(
uart1
,
"uart1"
,
0
,
NOMADIK_UART1_BASE
,
{
IRQ_UART1
},
NULL
);
static
struct
amba_device
*
amba_devs
[]
__initdata
=
{
&
uart0_device
,
...
...
arch/arm/mach-nomadik/cpu-8815.c
View file @
dcf81c1a
...
...
@@ -97,12 +97,7 @@ static struct platform_device cpu8815_platform_gpio[] = {
GPIO_DEVICE
(
3
),
};
static
struct
amba_device
cpu8815_amba_rng
=
{
.
dev
=
{
.
init_name
=
"rng"
,
},
__MEM_4K_RESOURCE
(
NOMADIK_RNG_BASE
),
};
static
AMBA_APB_DEVICE
(
cpu8815_amba_rng
,
"rng"
,
0
,
NOMADIK_RNG_BASE
,
{
},
NULL
);
static
struct
platform_device
*
platform_devs
[]
__initdata
=
{
cpu8815_platform_gpio
+
0
,
...
...
@@ -112,7 +107,7 @@ static struct platform_device *platform_devs[] __initdata = {
};
static
struct
amba_device
*
amba_devs
[]
__initdata
=
{
&
cpu8815_amba_rng
&
cpu8815_amba_rng
_device
};
static
int
__init
cpu8815_init
(
void
)
...
...
arch/arm/mach-omap2/emu.c
View file @
dcf81c1a
...
...
@@ -30,29 +30,8 @@ MODULE_AUTHOR("Alexander Shishkin");
#define ETB_BASE (L4_EMU_34XX_PHYS + 0x1b000)
#define DAPCTL (L4_EMU_34XX_PHYS + 0x1d000)
static
struct
amba_device
omap3_etb_device
=
{
.
dev
=
{
.
init_name
=
"etb"
,
},
.
res
=
{
.
start
=
ETB_BASE
,
.
end
=
ETB_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
.
periphid
=
0x000bb907
,
};
static
struct
amba_device
omap3_etm_device
=
{
.
dev
=
{
.
init_name
=
"etm"
,
},
.
res
=
{
.
start
=
ETM_BASE
,
.
end
=
ETM_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
.
periphid
=
0x102bb921
,
};
static
AMBA_APB_DEVICE
(
omap3_etb
,
"etb"
,
0x000bb907
,
ETB_BASE
,
{
},
NULL
);
static
AMBA_APB_DEVICE
(
omap3_etm
,
"etm"
,
0x102bb921
,
ETM_BASE
,
{
},
NULL
);
static
int
__init
emu_init
(
void
)
{
...
...
@@ -66,4 +45,3 @@ static int __init emu_init(void)
}
subsys_initcall
(
emu_init
);
arch/arm/mach-realview/core.h
View file @
dcf81c1a
...
...
@@ -28,21 +28,11 @@
#include <asm/setup.h>
#include <asm/leds.h>
#define AMBA_DEVICE(name,busid,base,plat) \
static struct amba_device name##_device = { \
.dev = { \
.coherent_dma_mask = ~0, \
.init_name = busid, \
.platform_data = plat, \
}, \
.res = { \
.start = REALVIEW_##base##_BASE, \
.end = (REALVIEW_##base##_BASE) + SZ_4K - 1, \
.flags = IORESOURCE_MEM, \
}, \
.dma_mask = ~0, \
.irq = base##_IRQ, \
}
#define APB_DEVICE(name, busid, base, plat) \
static AMBA_APB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat)
#define AHB_DEVICE(name, busid, base, plat) \
static AMBA_AHB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat)
struct
machine_desc
;
...
...
arch/arm/mach-realview/include/mach/irqs-pb1176.h
View file @
dcf81c1a
...
...
@@ -40,6 +40,7 @@
#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13)
#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14)
#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15)
/* CLCD controller */
#define IRQ_DC1176_GPIO0 (IRQ_DC1176_GIC_START + 16)
#define IRQ_DC1176_SSP (IRQ_DC1176_GIC_START + 17)
/* SSP port */
#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18)
/* UART 0 on development chip */
#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19)
/* UART 1 on development chip */
...
...
@@ -73,7 +74,6 @@
#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24)
/* DMA controller */
#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25)
/* Real Time Clock */
#define IRQ_PB1176_GPIO0 -1
#define IRQ_PB1176_SCTL -1
#define NR_GIC_PB1176 2
...
...
arch/arm/mach-realview/realview_eb.c
View file @
dcf81c1a
...
...
@@ -140,63 +140,63 @@ static struct pl022_ssp_controller ssp0_plat_data = {
/*
* These devices are connected via the core APB bridge
*/
#define GPIO2_IRQ { IRQ_EB_GPIO2
, NO_IRQ
}
#define GPIO3_IRQ { IRQ_EB_GPIO3
, NO_IRQ
}
#define GPIO2_IRQ { IRQ_EB_GPIO2 }
#define GPIO3_IRQ { IRQ_EB_GPIO3 }
#define AACI_IRQ { IRQ_EB_AACI
, NO_IRQ
}
#define AACI_IRQ { IRQ_EB_AACI }
#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
#define KMI0_IRQ { IRQ_EB_KMI0
, NO_IRQ
}
#define KMI1_IRQ { IRQ_EB_KMI1
, NO_IRQ
}
#define KMI0_IRQ { IRQ_EB_KMI0 }
#define KMI1_IRQ { IRQ_EB_KMI1 }
/*
* These devices are connected directly to the multi-layer AHB switch
*/
#define EB_SMC_IRQ {
NO_IRQ, NO_IRQ
}
#define MPMC_IRQ {
NO_IRQ, NO_IRQ
}
#define EB_CLCD_IRQ { IRQ_EB_CLCD
, NO_IRQ
}
#define DMAC_IRQ { IRQ_EB_DMA
, NO_IRQ
}
#define EB_SMC_IRQ { }
#define MPMC_IRQ { }
#define EB_CLCD_IRQ { IRQ_EB_CLCD }
#define DMAC_IRQ { IRQ_EB_DMA }
/*
* These devices are connected via the core APB bridge
*/
#define SCTL_IRQ {
NO_IRQ, NO_IRQ
}
#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG
, NO_IRQ
}
#define EB_GPIO0_IRQ { IRQ_EB_GPIO0
, NO_IRQ
}
#define GPIO1_IRQ { IRQ_EB_GPIO1
, NO_IRQ
}
#define EB_RTC_IRQ { IRQ_EB_RTC
, NO_IRQ
}
#define SCTL_IRQ { }
#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG }
#define EB_GPIO0_IRQ { IRQ_EB_GPIO0 }
#define GPIO1_IRQ { IRQ_EB_GPIO1 }
#define EB_RTC_IRQ { IRQ_EB_RTC }
/*
* These devices are connected via the DMA APB bridge
*/
#define SCI_IRQ { IRQ_EB_SCI
, NO_IRQ
}
#define EB_UART0_IRQ { IRQ_EB_UART0
, NO_IRQ
}
#define EB_UART1_IRQ { IRQ_EB_UART1
, NO_IRQ
}
#define EB_UART2_IRQ { IRQ_EB_UART2
, NO_IRQ
}
#define EB_UART3_IRQ { IRQ_EB_UART3
, NO_IRQ
}
#define EB_SSP_IRQ { IRQ_EB_SSP
, NO_IRQ
}
#define SCI_IRQ { IRQ_EB_SCI }
#define EB_UART0_IRQ { IRQ_EB_UART0 }
#define EB_UART1_IRQ { IRQ_EB_UART1 }
#define EB_UART2_IRQ { IRQ_EB_UART2 }
#define EB_UART3_IRQ { IRQ_EB_UART3 }
#define EB_SSP_IRQ { IRQ_EB_SSP }
/* FPGA Primecells */
A
MBA
_DEVICE
(
aaci
,
"fpga:aaci"
,
AACI
,
NULL
);
A
MBA
_DEVICE
(
mmc0
,
"fpga:mmc0"
,
MMCI0
,
&
realview_mmc0_plat_data
);
A
MBA
_DEVICE
(
kmi0
,
"fpga:kmi0"
,
KMI0
,
NULL
);
A
MBA
_DEVICE
(
kmi1
,
"fpga:kmi1"
,
KMI1
,
NULL
);
A
MBA
_DEVICE
(
uart3
,
"fpga:uart3"
,
EB_UART3
,
NULL
);
A
PB
_DEVICE
(
aaci
,
"fpga:aaci"
,
AACI
,
NULL
);
A
PB
_DEVICE
(
mmc0
,
"fpga:mmc0"
,
MMCI0
,
&
realview_mmc0_plat_data
);
A
PB
_DEVICE
(
kmi0
,
"fpga:kmi0"
,
KMI0
,
NULL
);
A
PB
_DEVICE
(
kmi1
,
"fpga:kmi1"
,
KMI1
,
NULL
);
A
PB
_DEVICE
(
uart3
,
"fpga:uart3"
,
EB_UART3
,
NULL
);
/* DevChip Primecells */
A
MBA
_DEVICE
(
smc
,
"dev:smc"
,
EB_SMC
,
NULL
);
A
MBA
_DEVICE
(
clcd
,
"dev:clcd"
,
EB_CLCD
,
&
clcd_plat_data
);
A
MBA
_DEVICE
(
dmac
,
"dev:dmac"
,
DMAC
,
NULL
);
A
MBA
_DEVICE
(
sctl
,
"dev:sctl"
,
SCTL
,
NULL
);
A
MBA
_DEVICE
(
wdog
,
"dev:wdog"
,
EB_WATCHDOG
,
NULL
);
A
MBA
_DEVICE
(
gpio0
,
"dev:gpio0"
,
EB_GPIO0
,
&
gpio0_plat_data
);
A
MBA
_DEVICE
(
gpio1
,
"dev:gpio1"
,
GPIO1
,
&
gpio1_plat_data
);
A
MBA
_DEVICE
(
gpio2
,
"dev:gpio2"
,
GPIO2
,
&
gpio2_plat_data
);
A
MBA
_DEVICE
(
rtc
,
"dev:rtc"
,
EB_RTC
,
NULL
);
A
MBA
_DEVICE
(
sci0
,
"dev:sci0"
,
SCI
,
NULL
);
A
MBA
_DEVICE
(
uart0
,
"dev:uart0"
,
EB_UART0
,
NULL
);
A
MBA
_DEVICE
(
uart1
,
"dev:uart1"
,
EB_UART1
,
NULL
);
A
MBA
_DEVICE
(
uart2
,
"dev:uart2"
,
EB_UART2
,
NULL
);
A
MBA
_DEVICE
(
ssp0
,
"dev:ssp0"
,
EB_SSP
,
&
ssp0_plat_data
);
A
HB
_DEVICE
(
smc
,
"dev:smc"
,
EB_SMC
,
NULL
);
A
HB
_DEVICE
(
clcd
,
"dev:clcd"
,
EB_CLCD
,
&
clcd_plat_data
);
A
HB
_DEVICE
(
dmac
,
"dev:dmac"
,
DMAC
,
NULL
);
A
HB
_DEVICE
(
sctl
,
"dev:sctl"
,
SCTL
,
NULL
);
A
PB
_DEVICE
(
wdog
,
"dev:wdog"
,
EB_WATCHDOG
,
NULL
);
A
PB
_DEVICE
(
gpio0
,
"dev:gpio0"
,
EB_GPIO0
,
&
gpio0_plat_data
);
A
PB
_DEVICE
(
gpio1
,
"dev:gpio1"
,
GPIO1
,
&
gpio1_plat_data
);
A
PB
_DEVICE
(
gpio2
,
"dev:gpio2"
,
GPIO2
,
&
gpio2_plat_data
);
A
PB
_DEVICE
(
rtc
,
"dev:rtc"
,
EB_RTC
,
NULL
);
A
PB
_DEVICE
(
sci0
,
"dev:sci0"
,
SCI
,
NULL
);
A
PB
_DEVICE
(
uart0
,
"dev:uart0"
,
EB_UART0
,
NULL
);
A
PB
_DEVICE
(
uart1
,
"dev:uart1"
,
EB_UART1
,
NULL
);
A
PB
_DEVICE
(
uart2
,
"dev:uart2"
,
EB_UART2
,
NULL
);
A
PB
_DEVICE
(
ssp0
,
"dev:ssp0"
,
EB_SSP
,
&
ssp0_plat_data
);
static
struct
amba_device
*
amba_devs
[]
__initdata
=
{
&
dmac_device
,
...
...
arch/arm/mach-realview/realview_pb1176.c
View file @
dcf81c1a
...
...
@@ -132,50 +132,50 @@ static struct pl022_ssp_controller ssp0_plat_data = {
/*
* RealView PB1176 AMBA devices
*/
#define GPIO2_IRQ { IRQ_PB1176_GPIO2
, NO_IRQ
}
#define GPIO3_IRQ { IRQ_PB1176_GPIO3
, NO_IRQ
}
#define AACI_IRQ { IRQ_PB1176_AACI
, NO_IRQ
}
#define GPIO2_IRQ { IRQ_PB1176_GPIO2 }
#define GPIO3_IRQ { IRQ_PB1176_GPIO3 }
#define AACI_IRQ { IRQ_PB1176_AACI }
#define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
#define KMI0_IRQ { IRQ_PB1176_KMI0
, NO_IRQ
}
#define KMI1_IRQ { IRQ_PB1176_KMI1
, NO_IRQ
}
#define PB1176_SMC_IRQ {
NO_IRQ, NO_IRQ
}
#define MPMC_IRQ {
NO_IRQ, NO_IRQ
}
#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD
, NO_IRQ
}
#define SCTL_IRQ {
NO_IRQ, NO_IRQ
}
#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG
, NO_IRQ
}
#define PB1176_GPIO0_IRQ { IRQ_
PB1176_GPIO0, NO_IRQ
}
#define GPIO1_IRQ { IRQ_PB1176_GPIO1
, NO_IRQ
}
#define PB1176_RTC_IRQ { IRQ_DC1176_RTC
, NO_IRQ
}
#define SCI_IRQ { IRQ_PB1176_SCI
, NO_IRQ
}
#define PB1176_UART0_IRQ { IRQ_DC1176_UART0
, NO_IRQ
}
#define PB1176_UART1_IRQ { IRQ_DC1176_UART1
, NO_IRQ
}
#define PB1176_UART2_IRQ { IRQ_DC1176_UART2
, NO_IRQ
}
#define PB1176_UART3_IRQ { IRQ_DC1176_UART3
, NO_IRQ
}
#define PB1176_UART4_IRQ { IRQ_PB1176_UART4
, NO_IRQ
}
#define PB1176_SSP_IRQ { IRQ_DC1176_SSP
, NO_IRQ
}
#define KMI0_IRQ { IRQ_PB1176_KMI0 }
#define KMI1_IRQ { IRQ_PB1176_KMI1 }
#define PB1176_SMC_IRQ { }
#define MPMC_IRQ { }
#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD }
#define SCTL_IRQ { }
#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG }
#define PB1176_GPIO0_IRQ { IRQ_
DC1176_GPIO0
}
#define GPIO1_IRQ { IRQ_PB1176_GPIO1 }
#define PB1176_RTC_IRQ { IRQ_DC1176_RTC }
#define SCI_IRQ { IRQ_PB1176_SCI }
#define PB1176_UART0_IRQ { IRQ_DC1176_UART0 }
#define PB1176_UART1_IRQ { IRQ_DC1176_UART1 }
#define PB1176_UART2_IRQ { IRQ_DC1176_UART2 }
#define PB1176_UART3_IRQ { IRQ_DC1176_UART3 }
#define PB1176_UART4_IRQ { IRQ_PB1176_UART4 }
#define PB1176_SSP_IRQ { IRQ_DC1176_SSP }
/* FPGA Primecells */
A
MBA
_DEVICE
(
aaci
,
"fpga:aaci"
,
AACI
,
NULL
);
A
MBA
_DEVICE
(
mmc0
,
"fpga:mmc0"
,
MMCI0
,
&
realview_mmc0_plat_data
);
A
MBA
_DEVICE
(
kmi0
,
"fpga:kmi0"
,
KMI0
,
NULL
);
A
MBA
_DEVICE
(
kmi1
,
"fpga:kmi1"
,
KMI1
,
NULL
);
A
MBA
_DEVICE
(
uart4
,
"fpga:uart4"
,
PB1176_UART4
,
NULL
);
A
PB
_DEVICE
(
aaci
,
"fpga:aaci"
,
AACI
,
NULL
);
A
PB
_DEVICE
(
mmc0
,
"fpga:mmc0"
,
MMCI0
,
&
realview_mmc0_plat_data
);
A
PB
_DEVICE
(
kmi0
,
"fpga:kmi0"
,
KMI0
,
NULL
);
A
PB
_DEVICE
(
kmi1
,
"fpga:kmi1"
,
KMI1
,
NULL
);
A
PB
_DEVICE
(
uart4
,
"fpga:uart4"
,
PB1176_UART4
,
NULL
);
/* DevChip Primecells */
A
MBA_DEVICE
(
smc
,
"dev:smc"
,
PB1176_SMC
,
NULL
);
A
MBA
_DEVICE
(
sctl
,
"dev:sctl"
,
SCTL
,
NULL
);
A
MBA
_DEVICE
(
wdog
,
"dev:wdog"
,
PB1176_WATCHDOG
,
NULL
);
A
MBA
_DEVICE
(
gpio0
,
"dev:gpio0"
,
PB1176_GPIO0
,
&
gpio0_plat_data
);
A
MBA
_DEVICE
(
gpio1
,
"dev:gpio1"
,
GPIO1
,
&
gpio1_plat_data
);
A
MBA
_DEVICE
(
gpio2
,
"dev:gpio2"
,
GPIO2
,
&
gpio2_plat_data
);
A
MBA_DEVICE
(
rtc
,
"dev:rtc"
,
PB1176_RTC
,
NULL
);
A
MBA
_DEVICE
(
sci0
,
"dev:sci0"
,
SCI
,
NULL
);
A
MBA
_DEVICE
(
uart0
,
"dev:uart0"
,
PB1176_UART0
,
NULL
);
A
MBA
_DEVICE
(
uart1
,
"dev:uart1"
,
PB1176_UART1
,
NULL
);
A
MBA
_DEVICE
(
uart2
,
"dev:uart2"
,
PB1176_UART2
,
NULL
);
A
MBA
_DEVICE
(
uart3
,
"dev:uart3"
,
PB1176_UART3
,
NULL
);
A
MBA
_DEVICE
(
ssp0
,
"dev:ssp0"
,
PB1176_SSP
,
&
ssp0_plat_data
);
A
MBA
_DEVICE
(
clcd
,
"dev:clcd"
,
PB1176_CLCD
,
&
clcd_plat_data
);
A
HB_DEVICE
(
smc
,
"dev:smc"
,
PB1176_SMC
,
NULL
);
A
HB
_DEVICE
(
sctl
,
"dev:sctl"
,
SCTL
,
NULL
);
A
PB
_DEVICE
(
wdog
,
"dev:wdog"
,
PB1176_WATCHDOG
,
NULL
);
A
PB
_DEVICE
(
gpio0
,
"dev:gpio0"
,
PB1176_GPIO0
,
&
gpio0_plat_data
);
A
PB
_DEVICE
(
gpio1
,
"dev:gpio1"
,
GPIO1
,
&
gpio1_plat_data
);
A
PB
_DEVICE
(
gpio2
,
"dev:gpio2"
,
GPIO2
,
&
gpio2_plat_data
);
A
PB_DEVICE
(
rtc
,
"dev:rtc"
,
PB1176_RTC
,
NULL
);
A
PB
_DEVICE
(
sci0
,
"dev:sci0"
,
SCI
,
NULL
);
A
PB
_DEVICE
(
uart0
,
"dev:uart0"
,
PB1176_UART0
,
NULL
);
A
PB
_DEVICE
(
uart1
,
"dev:uart1"
,
PB1176_UART1
,
NULL
);
A
PB
_DEVICE
(
uart2
,
"dev:uart2"
,
PB1176_UART2
,
NULL
);
A
PB
_DEVICE
(
uart3
,
"dev:uart3"
,
PB1176_UART3
,
NULL
);
A
PB
_DEVICE
(
ssp0
,
"dev:ssp0"
,
PB1176_SSP
,
&
ssp0_plat_data
);
A
HB
_DEVICE
(
clcd
,
"dev:clcd"
,
PB1176_CLCD
,
&
clcd_plat_data
);
static
struct
amba_device
*
amba_devs
[]
__initdata
=
{
&
uart0_device
,
...
...
arch/arm/mach-realview/realview_pb11mp.c
View file @
dcf81c1a
...
...
@@ -132,52 +132,52 @@ static struct pl022_ssp_controller ssp0_plat_data = {
* RealView PB11MPCore AMBA devices
*/
#define GPIO2_IRQ { IRQ_PB11MP_GPIO2
, NO_IRQ
}
#define GPIO3_IRQ { IRQ_PB11MP_GPIO3
, NO_IRQ
}
#define AACI_IRQ { IRQ_TC11MP_AACI
, NO_IRQ
}
#define GPIO2_IRQ { IRQ_PB11MP_GPIO2 }
#define GPIO3_IRQ { IRQ_PB11MP_GPIO3 }
#define AACI_IRQ { IRQ_TC11MP_AACI }
#define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
#define KMI0_IRQ { IRQ_TC11MP_KMI0
, NO_IRQ
}
#define KMI1_IRQ { IRQ_TC11MP_KMI1
, NO_IRQ
}
#define PB11MP_SMC_IRQ {
NO_IRQ, NO_IRQ
}
#define MPMC_IRQ {
NO_IRQ, NO_IRQ
}
#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD
, NO_IRQ
}
#define DMAC_IRQ { IRQ_PB11MP_DMAC
, NO_IRQ
}
#define SCTL_IRQ {
NO_IRQ, NO_IRQ
}
#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG
, NO_IRQ
}
#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0
, NO_IRQ
}
#define GPIO1_IRQ { IRQ_PB11MP_GPIO1
, NO_IRQ
}
#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC
, NO_IRQ
}
#define SCI_IRQ { IRQ_PB11MP_SCI
, NO_IRQ
}
#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0
, NO_IRQ
}
#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1
, NO_IRQ
}
#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2
, NO_IRQ
}
#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3
, NO_IRQ
}
#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP
, NO_IRQ
}
#define KMI0_IRQ { IRQ_TC11MP_KMI0 }
#define KMI1_IRQ { IRQ_TC11MP_KMI1 }
#define PB11MP_SMC_IRQ { }
#define MPMC_IRQ { }
#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD }
#define DMAC_IRQ { IRQ_PB11MP_DMAC }
#define SCTL_IRQ { }
#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG }
#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0 }
#define GPIO1_IRQ { IRQ_PB11MP_GPIO1 }
#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC }
#define SCI_IRQ { IRQ_PB11MP_SCI }
#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0 }
#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1 }
#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2 }
#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3 }
#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP }
/* FPGA Primecells */
A
MBA
_DEVICE
(
aaci
,
"fpga:aaci"
,
AACI
,
NULL
);
A
MBA
_DEVICE
(
mmc0
,
"fpga:mmc0"
,
MMCI0
,
&
realview_mmc0_plat_data
);
A
MBA
_DEVICE
(
kmi0
,
"fpga:kmi0"
,
KMI0
,
NULL
);
A
MBA
_DEVICE
(
kmi1
,
"fpga:kmi1"
,
KMI1
,
NULL
);
A
MBA
_DEVICE
(
uart3
,
"fpga:uart3"
,
PB11MP_UART3
,
NULL
);
A
PB
_DEVICE
(
aaci
,
"fpga:aaci"
,
AACI
,
NULL
);
A
PB
_DEVICE
(
mmc0
,
"fpga:mmc0"
,
MMCI0
,
&
realview_mmc0_plat_data
);
A
PB
_DEVICE
(
kmi0
,
"fpga:kmi0"
,
KMI0
,
NULL
);
A
PB
_DEVICE
(
kmi1
,
"fpga:kmi1"
,
KMI1
,
NULL
);
A
PB
_DEVICE
(
uart3
,
"fpga:uart3"
,
PB11MP_UART3
,
NULL
);
/* DevChip Primecells */
A
MBA_DEVICE
(
smc
,
"dev:smc"
,
PB11MP_SMC
,
NULL
);
A
MBA
_DEVICE
(
sctl
,
"dev:sctl"
,
SCTL
,
NULL
);
A
MBA
_DEVICE
(
wdog
,
"dev:wdog"
,
PB11MP_WATCHDOG
,
NULL
);
A
MBA
_DEVICE
(
gpio0
,
"dev:gpio0"
,
PB11MP_GPIO0
,
&
gpio0_plat_data
);
A
MBA
_DEVICE
(
gpio1
,
"dev:gpio1"
,
GPIO1
,
&
gpio1_plat_data
);
A
MBA
_DEVICE
(
gpio2
,
"dev:gpio2"
,
GPIO2
,
&
gpio2_plat_data
);
A
MBA_DEVICE
(
rtc
,
"dev:rtc"
,
PB11MP_RTC
,
NULL
);
A
MBA
_DEVICE
(
sci0
,
"dev:sci0"
,
SCI
,
NULL
);
A
MBA
_DEVICE
(
uart0
,
"dev:uart0"
,
PB11MP_UART0
,
NULL
);
A
MBA
_DEVICE
(
uart1
,
"dev:uart1"
,
PB11MP_UART1
,
NULL
);
A
MBA
_DEVICE
(
uart2
,
"dev:uart2"
,
PB11MP_UART2
,
NULL
);
A
MBA
_DEVICE
(
ssp0
,
"dev:ssp0"
,
PB11MP_SSP
,
&
ssp0_plat_data
);
A
HB_DEVICE
(
smc
,
"dev:smc"
,
PB11MP_SMC
,
NULL
);
A
HB
_DEVICE
(
sctl
,
"dev:sctl"
,
SCTL
,
NULL
);
A
PB
_DEVICE
(
wdog
,
"dev:wdog"
,
PB11MP_WATCHDOG
,
NULL
);
A
PB
_DEVICE
(
gpio0
,
"dev:gpio0"
,
PB11MP_GPIO0
,
&
gpio0_plat_data
);
A
PB
_DEVICE
(
gpio1
,
"dev:gpio1"
,
GPIO1
,
&
gpio1_plat_data
);
A
PB
_DEVICE
(
gpio2
,
"dev:gpio2"
,
GPIO2
,
&
gpio2_plat_data
);
A
PB_DEVICE
(
rtc
,
"dev:rtc"
,
PB11MP_RTC
,
NULL
);
A
PB
_DEVICE
(
sci0
,
"dev:sci0"
,
SCI
,
NULL
);
A
PB
_DEVICE
(
uart0
,
"dev:uart0"
,
PB11MP_UART0
,
NULL
);
A
PB
_DEVICE
(
uart1
,
"dev:uart1"
,
PB11MP_UART1
,
NULL
);
A
PB
_DEVICE
(
uart2
,
"dev:uart2"
,
PB11MP_UART2
,
NULL
);
A
PB
_DEVICE
(
ssp0
,
"dev:ssp0"
,
PB11MP_SSP
,
&
ssp0_plat_data
);
/* Primecells on the NEC ISSP chip */
A
MBA
_DEVICE
(
clcd
,
"issp:clcd"
,
PB11MP_CLCD
,
&
clcd_plat_data
);
A
MBA
_DEVICE
(
dmac
,
"issp:dmac"
,
DMAC
,
NULL
);
A
HB
_DEVICE
(
clcd
,
"issp:clcd"
,
PB11MP_CLCD
,
&
clcd_plat_data
);
A
HB
_DEVICE
(
dmac
,
"issp:dmac"
,
DMAC
,
NULL
);
static
struct
amba_device
*
amba_devs
[]
__initdata
=
{
&
dmac_device
,
...
...
arch/arm/mach-realview/realview_pba8.c
View file @
dcf81c1a
...
...
@@ -122,52 +122,52 @@ static struct pl022_ssp_controller ssp0_plat_data = {
* RealView PBA8Core AMBA devices
*/
#define GPIO2_IRQ { IRQ_PBA8_GPIO2
, NO_IRQ
}
#define GPIO3_IRQ { IRQ_PBA8_GPIO3
, NO_IRQ
}
#define AACI_IRQ { IRQ_PBA8_AACI
, NO_IRQ
}
#define GPIO2_IRQ { IRQ_PBA8_GPIO2 }
#define GPIO3_IRQ { IRQ_PBA8_GPIO3 }
#define AACI_IRQ { IRQ_PBA8_AACI }
#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
#define KMI0_IRQ { IRQ_PBA8_KMI0
, NO_IRQ
}
#define KMI1_IRQ { IRQ_PBA8_KMI1
, NO_IRQ
}
#define PBA8_SMC_IRQ {
NO_IRQ, NO_IRQ
}
#define MPMC_IRQ {
NO_IRQ, NO_IRQ
}
#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD
, NO_IRQ
}
#define DMAC_IRQ { IRQ_PBA8_DMAC
, NO_IRQ
}
#define SCTL_IRQ {
NO_IRQ, NO_IRQ
}
#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG
, NO_IRQ
}
#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0
, NO_IRQ
}
#define GPIO1_IRQ { IRQ_PBA8_GPIO1
, NO_IRQ
}
#define PBA8_RTC_IRQ { IRQ_PBA8_RTC
, NO_IRQ
}
#define SCI_IRQ { IRQ_PBA8_SCI
, NO_IRQ
}
#define PBA8_UART0_IRQ { IRQ_PBA8_UART0
, NO_IRQ
}
#define PBA8_UART1_IRQ { IRQ_PBA8_UART1
, NO_IRQ
}
#define PBA8_UART2_IRQ { IRQ_PBA8_UART2
, NO_IRQ
}
#define PBA8_UART3_IRQ { IRQ_PBA8_UART3
, NO_IRQ
}
#define PBA8_SSP_IRQ { IRQ_PBA8_SSP
, NO_IRQ
}
#define KMI0_IRQ { IRQ_PBA8_KMI0 }
#define KMI1_IRQ { IRQ_PBA8_KMI1 }
#define PBA8_SMC_IRQ { }
#define MPMC_IRQ { }
#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD }
#define DMAC_IRQ { IRQ_PBA8_DMAC }
#define SCTL_IRQ { }
#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG }
#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0 }
#define GPIO1_IRQ { IRQ_PBA8_GPIO1 }
#define PBA8_RTC_IRQ { IRQ_PBA8_RTC }
#define SCI_IRQ { IRQ_PBA8_SCI }
#define PBA8_UART0_IRQ { IRQ_PBA8_UART0 }
#define PBA8_UART1_IRQ { IRQ_PBA8_UART1 }
#define PBA8_UART2_IRQ { IRQ_PBA8_UART2 }
#define PBA8_UART3_IRQ { IRQ_PBA8_UART3 }
#define PBA8_SSP_IRQ { IRQ_PBA8_SSP }
/* FPGA Primecells */
A
MBA
_DEVICE
(
aaci
,
"fpga:aaci"
,
AACI
,
NULL
);
A
MBA
_DEVICE
(
mmc0
,
"fpga:mmc0"
,
MMCI0
,
&
realview_mmc0_plat_data
);
A
MBA
_DEVICE
(
kmi0
,
"fpga:kmi0"
,
KMI0
,
NULL
);
A
MBA
_DEVICE
(
kmi1
,
"fpga:kmi1"
,
KMI1
,
NULL
);
A
MBA
_DEVICE
(
uart3
,
"fpga:uart3"
,
PBA8_UART3
,
NULL
);
A
PB
_DEVICE
(
aaci
,
"fpga:aaci"
,
AACI
,
NULL
);
A
PB
_DEVICE
(
mmc0
,
"fpga:mmc0"
,
MMCI0
,
&
realview_mmc0_plat_data
);
A
PB
_DEVICE
(
kmi0
,
"fpga:kmi0"
,
KMI0
,
NULL
);
A
PB
_DEVICE
(
kmi1
,
"fpga:kmi1"
,
KMI1
,
NULL
);
A
PB
_DEVICE
(
uart3
,
"fpga:uart3"
,
PBA8_UART3
,
NULL
);
/* DevChip Primecells */
A
MBA_DEVICE
(
smc
,
"dev:smc"
,
PBA8_SMC
,
NULL
);
A
MBA
_DEVICE
(
sctl
,
"dev:sctl"
,
SCTL
,
NULL
);
A
MBA
_DEVICE
(
wdog
,
"dev:wdog"
,
PBA8_WATCHDOG
,
NULL
);
A
MBA
_DEVICE
(
gpio0
,
"dev:gpio0"
,
PBA8_GPIO0
,
&
gpio0_plat_data
);
A
MBA
_DEVICE
(
gpio1
,
"dev:gpio1"
,
GPIO1
,
&
gpio1_plat_data
);
A
MBA
_DEVICE
(
gpio2
,
"dev:gpio2"
,
GPIO2
,
&
gpio2_plat_data
);
A
MBA_DEVICE
(
rtc
,
"dev:rtc"
,
PBA8_RTC
,
NULL
);
A
MBA
_DEVICE
(
sci0
,
"dev:sci0"
,
SCI
,
NULL
);
A
MBA
_DEVICE
(
uart0
,
"dev:uart0"
,
PBA8_UART0
,
NULL
);
A
MBA
_DEVICE
(
uart1
,
"dev:uart1"
,
PBA8_UART1
,
NULL
);
A
MBA
_DEVICE
(
uart2
,
"dev:uart2"
,
PBA8_UART2
,
NULL
);
A
MBA
_DEVICE
(
ssp0
,
"dev:ssp0"
,
PBA8_SSP
,
&
ssp0_plat_data
);
A
HB_DEVICE
(
smc
,
"dev:smc"
,
PBA8_SMC
,
NULL
);
A
HB
_DEVICE
(
sctl
,
"dev:sctl"
,
SCTL
,
NULL
);
A
PB
_DEVICE
(
wdog
,
"dev:wdog"
,
PBA8_WATCHDOG
,
NULL
);
A
PB
_DEVICE
(
gpio0
,
"dev:gpio0"
,
PBA8_GPIO0
,
&
gpio0_plat_data
);
A
PB
_DEVICE
(
gpio1
,
"dev:gpio1"
,
GPIO1
,
&
gpio1_plat_data
);
A
PB
_DEVICE
(
gpio2
,
"dev:gpio2"
,
GPIO2
,
&
gpio2_plat_data
);
A
PB_DEVICE
(
rtc
,
"dev:rtc"
,
PBA8_RTC
,
NULL
);
A
PB
_DEVICE
(
sci0
,
"dev:sci0"
,
SCI
,
NULL
);
A
PB
_DEVICE
(
uart0
,
"dev:uart0"
,
PBA8_UART0
,
NULL
);
A
PB
_DEVICE
(
uart1
,
"dev:uart1"
,
PBA8_UART1
,
NULL
);
A
PB
_DEVICE
(
uart2
,
"dev:uart2"
,
PBA8_UART2
,
NULL
);
A
PB
_DEVICE
(
ssp0
,
"dev:ssp0"
,
PBA8_SSP
,
&
ssp0_plat_data
);
/* Primecells on the NEC ISSP chip */
A
MBA
_DEVICE
(
clcd
,
"issp:clcd"
,
PBA8_CLCD
,
&
clcd_plat_data
);
A
MBA
_DEVICE
(
dmac
,
"issp:dmac"
,
DMAC
,
NULL
);
A
HB
_DEVICE
(
clcd
,
"issp:clcd"
,
PBA8_CLCD
,
&
clcd_plat_data
);
A
HB
_DEVICE
(
dmac
,
"issp:dmac"
,
DMAC
,
NULL
);
static
struct
amba_device
*
amba_devs
[]
__initdata
=
{
&
dmac_device
,
...
...
arch/arm/mach-realview/realview_pbx.c
View file @
dcf81c1a
...
...
@@ -144,52 +144,52 @@ static struct pl022_ssp_controller ssp0_plat_data = {
* RealView PBXCore AMBA devices
*/
#define GPIO2_IRQ { IRQ_PBX_GPIO2
, NO_IRQ
}
#define GPIO3_IRQ { IRQ_PBX_GPIO3
, NO_IRQ
}
#define AACI_IRQ { IRQ_PBX_AACI
, NO_IRQ
}
#define GPIO2_IRQ { IRQ_PBX_GPIO2 }
#define GPIO3_IRQ { IRQ_PBX_GPIO3 }
#define AACI_IRQ { IRQ_PBX_AACI }
#define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B }
#define KMI0_IRQ { IRQ_PBX_KMI0
, NO_IRQ
}
#define KMI1_IRQ { IRQ_PBX_KMI1
, NO_IRQ
}
#define PBX_SMC_IRQ {
NO_IRQ, NO_IRQ
}
#define MPMC_IRQ {
NO_IRQ, NO_IRQ
}
#define PBX_CLCD_IRQ { IRQ_PBX_CLCD
, NO_IRQ
}
#define DMAC_IRQ { IRQ_PBX_DMAC
, NO_IRQ
}
#define SCTL_IRQ {
NO_IRQ, NO_IRQ
}
#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG
, NO_IRQ
}
#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0
, NO_IRQ
}
#define GPIO1_IRQ { IRQ_PBX_GPIO1
, NO_IRQ
}
#define PBX_RTC_IRQ { IRQ_PBX_RTC
, NO_IRQ
}
#define SCI_IRQ { IRQ_PBX_SCI
, NO_IRQ
}
#define PBX_UART0_IRQ { IRQ_PBX_UART0
, NO_IRQ
}
#define PBX_UART1_IRQ { IRQ_PBX_UART1
, NO_IRQ
}
#define PBX_UART2_IRQ { IRQ_PBX_UART2
, NO_IRQ
}
#define PBX_UART3_IRQ { IRQ_PBX_UART3
, NO_IRQ
}
#define PBX_SSP_IRQ { IRQ_PBX_SSP
, NO_IRQ
}
#define KMI0_IRQ { IRQ_PBX_KMI0 }
#define KMI1_IRQ { IRQ_PBX_KMI1 }
#define PBX_SMC_IRQ { }
#define MPMC_IRQ { }
#define PBX_CLCD_IRQ { IRQ_PBX_CLCD }
#define DMAC_IRQ { IRQ_PBX_DMAC }
#define SCTL_IRQ { }
#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG }
#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0 }
#define GPIO1_IRQ { IRQ_PBX_GPIO1 }
#define PBX_RTC_IRQ { IRQ_PBX_RTC }
#define SCI_IRQ { IRQ_PBX_SCI }
#define PBX_UART0_IRQ { IRQ_PBX_UART0 }
#define PBX_UART1_IRQ { IRQ_PBX_UART1 }
#define PBX_UART2_IRQ { IRQ_PBX_UART2 }
#define PBX_UART3_IRQ { IRQ_PBX_UART3 }
#define PBX_SSP_IRQ { IRQ_PBX_SSP }
/* FPGA Primecells */
A
MBA
_DEVICE
(
aaci
,
"fpga:aaci"
,
AACI
,
NULL
);
A
MBA
_DEVICE
(
mmc0
,
"fpga:mmc0"
,
MMCI0
,
&
realview_mmc0_plat_data
);
A
MBA
_DEVICE
(
kmi0
,
"fpga:kmi0"
,
KMI0
,
NULL
);
A
MBA
_DEVICE
(
kmi1
,
"fpga:kmi1"
,
KMI1
,
NULL
);
A
MBA
_DEVICE
(
uart3
,
"fpga:uart3"
,
PBX_UART3
,
NULL
);
A
PB
_DEVICE
(
aaci
,
"fpga:aaci"
,
AACI
,
NULL
);
A
PB
_DEVICE
(
mmc0
,
"fpga:mmc0"
,
MMCI0
,
&
realview_mmc0_plat_data
);
A
PB
_DEVICE
(
kmi0
,
"fpga:kmi0"
,
KMI0
,
NULL
);
A
PB
_DEVICE
(
kmi1
,
"fpga:kmi1"
,
KMI1
,
NULL
);
A
PB
_DEVICE
(
uart3
,
"fpga:uart3"
,
PBX_UART3
,
NULL
);
/* DevChip Primecells */
A
MBA
_DEVICE
(
smc
,
"dev:smc"
,
PBX_SMC
,
NULL
);
A
MBA
_DEVICE
(
sctl
,
"dev:sctl"
,
SCTL
,
NULL
);
A
MBA
_DEVICE
(
wdog
,
"dev:wdog"
,
PBX_WATCHDOG
,
NULL
);
A
MBA
_DEVICE
(
gpio0
,
"dev:gpio0"
,
PBX_GPIO0
,
&
gpio0_plat_data
);
A
MBA
_DEVICE
(
gpio1
,
"dev:gpio1"
,
GPIO1
,
&
gpio1_plat_data
);
A
MBA
_DEVICE
(
gpio2
,
"dev:gpio2"
,
GPIO2
,
&
gpio2_plat_data
);
A
MBA_DEVICE
(
rtc
,
"dev:rtc"
,
PBX_RTC
,
NULL
);
A
MBA
_DEVICE
(
sci0
,
"dev:sci0"
,
SCI
,
NULL
);
A
MBA
_DEVICE
(
uart0
,
"dev:uart0"
,
PBX_UART0
,
NULL
);
A
MBA
_DEVICE
(
uart1
,
"dev:uart1"
,
PBX_UART1
,
NULL
);
A
MBA
_DEVICE
(
uart2
,
"dev:uart2"
,
PBX_UART2
,
NULL
);
A
MBA
_DEVICE
(
ssp0
,
"dev:ssp0"
,
PBX_SSP
,
&
ssp0_plat_data
);
A
HB
_DEVICE
(
smc
,
"dev:smc"
,
PBX_SMC
,
NULL
);
A
HB
_DEVICE
(
sctl
,
"dev:sctl"
,
SCTL
,
NULL
);
A
PB
_DEVICE
(
wdog
,
"dev:wdog"
,
PBX_WATCHDOG
,
NULL
);
A
PB
_DEVICE
(
gpio0
,
"dev:gpio0"
,
PBX_GPIO0
,
&
gpio0_plat_data
);
A
PB
_DEVICE
(
gpio1
,
"dev:gpio1"
,
GPIO1
,
&
gpio1_plat_data
);
A
PB
_DEVICE
(
gpio2
,
"dev:gpio2"
,
GPIO2
,
&
gpio2_plat_data
);
A
PB_DEVICE
(
rtc
,
"dev:rtc"
,
PBX_RTC
,
NULL
);
A
PB
_DEVICE
(
sci0
,
"dev:sci0"
,
SCI
,
NULL
);
A
PB
_DEVICE
(
uart0
,
"dev:uart0"
,
PBX_UART0
,
NULL
);
A
PB
_DEVICE
(
uart1
,
"dev:uart1"
,
PBX_UART1
,
NULL
);
A
PB
_DEVICE
(
uart2
,
"dev:uart2"
,
PBX_UART2
,
NULL
);
A
PB
_DEVICE
(
ssp0
,
"dev:ssp0"
,
PBX_SSP
,
&
ssp0_plat_data
);
/* Primecells on the NEC ISSP chip */
A
MBA
_DEVICE
(
clcd
,
"issp:clcd"
,
PBX_CLCD
,
&
clcd_plat_data
);
A
MBA
_DEVICE
(
dmac
,
"issp:dmac"
,
DMAC
,
NULL
);
A
HB
_DEVICE
(
clcd
,
"issp:clcd"
,
PBX_CLCD
,
&
clcd_plat_data
);
A
HB
_DEVICE
(
dmac
,
"issp:dmac"
,
DMAC
,
NULL
);
static
struct
amba_device
*
amba_devs
[]
__initdata
=
{
&
dmac_device
,
...
...
arch/arm/mach-s5p64x0/dma.c
View file @
dcf81c1a
...
...
@@ -108,34 +108,22 @@ struct dma_pl330_platdata s5p6450_pdma_pdata = {
.
peri_id
=
s5p6450_pdma_peri
,
};
struct
amba_device
s5p64x0_device_pdma
=
{
.
dev
=
{
.
init_name
=
"dma-pl330"
,
.
dma_mask
=
&
dma_dmamask
,
.
coherent_dma_mask
=
DMA_BIT_MASK
(
32
),
},
.
res
=
{
.
start
=
S5P64X0_PA_PDMA
,
.
end
=
S5P64X0_PA_PDMA
+
SZ_4K
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_DMA0
,
NO_IRQ
},
.
periphid
=
0x00041330
,
};
AMBA_AHB_DEVICE
(
s5p64x0_pdma
,
"dma-pl330"
,
0x00041330
,
S5P64X0_PA_PDMA
,
{
IRQ_DMA0
},
NULL
);
static
int
__init
s5p64x0_dma_init
(
void
)
{
if
(
soc_is_s5p6450
())
{
dma_cap_set
(
DMA_SLAVE
,
s5p6450_pdma_pdata
.
cap_mask
);
dma_cap_set
(
DMA_CYCLIC
,
s5p6450_pdma_pdata
.
cap_mask
);
s5p64x0_
device_pdma
.
dev
.
platform_data
=
&
s5p6450_pdma_pdata
;
s5p64x0_
pdma_device
.
dev
.
platform_data
=
&
s5p6450_pdma_pdata
;
}
else
{
dma_cap_set
(
DMA_SLAVE
,
s5p6440_pdma_pdata
.
cap_mask
);
dma_cap_set
(
DMA_CYCLIC
,
s5p6440_pdma_pdata
.
cap_mask
);
s5p64x0_
device_pdma
.
dev
.
platform_data
=
&
s5p6440_pdma_pdata
;
s5p64x0_
pdma_device
.
dev
.
platform_data
=
&
s5p6440_pdma_pdata
;
}
amba_device_register
(
&
s5p64x0_
device_pdma
,
&
iomem_resource
);
amba_device_register
(
&
s5p64x0_
pdma_device
,
&
iomem_resource
);
return
0
;
}
...
...
arch/arm/mach-s5pc100/dma.c
View file @
dcf81c1a
...
...
@@ -73,21 +73,8 @@ struct dma_pl330_platdata s5pc100_pdma0_pdata = {
.
peri_id
=
pdma0_peri
,
};
struct
amba_device
s5pc100_device_pdma0
=
{
.
dev
=
{
.
init_name
=
"dma-pl330.0"
,
.
dma_mask
=
&
dma_dmamask
,
.
coherent_dma_mask
=
DMA_BIT_MASK
(
32
),
.
platform_data
=
&
s5pc100_pdma0_pdata
,
},
.
res
=
{
.
start
=
S5PC100_PA_PDMA0
,
.
end
=
S5PC100_PA_PDMA0
+
SZ_4K
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_PDMA0
,
NO_IRQ
},
.
periphid
=
0x00041330
,
};
AMBA_AHB_DEVICE
(
s5pc100_pdma0
,
"dma-pl330.0"
,
0x00041330
,
S5PC100_PA_PDMA0
,
{
IRQ_PDMA0
},
&
s5pc100_pdma0_pdata
);
u8
pdma1_peri
[]
=
{
DMACH_UART0_RX
,
...
...
@@ -127,31 +114,18 @@ struct dma_pl330_platdata s5pc100_pdma1_pdata = {
.
peri_id
=
pdma1_peri
,
};
struct
amba_device
s5pc100_device_pdma1
=
{
.
dev
=
{
.
init_name
=
"dma-pl330.1"
,
.
dma_mask
=
&
dma_dmamask
,
.
coherent_dma_mask
=
DMA_BIT_MASK
(
32
),
.
platform_data
=
&
s5pc100_pdma1_pdata
,
},
.
res
=
{
.
start
=
S5PC100_PA_PDMA1
,
.
end
=
S5PC100_PA_PDMA1
+
SZ_4K
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_PDMA1
,
NO_IRQ
},
.
periphid
=
0x00041330
,
};
AMBA_AHB_DEVICE
(
s5pc100_pdma1
,
"dma-pl330.1"
,
0x00041330
,
S5PC100_PA_PDMA1
,
{
IRQ_PDMA1
},
&
s5pc100_pdma1_pdata
);
static
int
__init
s5pc100_dma_init
(
void
)
{
dma_cap_set
(
DMA_SLAVE
,
s5pc100_pdma0_pdata
.
cap_mask
);
dma_cap_set
(
DMA_CYCLIC
,
s5pc100_pdma0_pdata
.
cap_mask
);
amba_device_register
(
&
s5pc100_
device_pdma0
,
&
iomem_resource
);
amba_device_register
(
&
s5pc100_
pdma0_device
,
&
iomem_resource
);
dma_cap_set
(
DMA_SLAVE
,
s5pc100_pdma1_pdata
.
cap_mask
);
dma_cap_set
(
DMA_CYCLIC
,
s5pc100_pdma1_pdata
.
cap_mask
);
amba_device_register
(
&
s5pc100_
device_pdma1
,
&
iomem_resource
);
amba_device_register
(
&
s5pc100_
pdma1_device
,
&
iomem_resource
);
return
0
;
}
...
...
arch/arm/mach-s5pv210/dma.c
View file @
dcf81c1a
...
...
@@ -71,21 +71,8 @@ struct dma_pl330_platdata s5pv210_pdma0_pdata = {
.
peri_id
=
pdma0_peri
,
};
struct
amba_device
s5pv210_device_pdma0
=
{
.
dev
=
{
.
init_name
=
"dma-pl330.0"
,
.
dma_mask
=
&
dma_dmamask
,
.
coherent_dma_mask
=
DMA_BIT_MASK
(
32
),
.
platform_data
=
&
s5pv210_pdma0_pdata
,
},
.
res
=
{
.
start
=
S5PV210_PA_PDMA0
,
.
end
=
S5PV210_PA_PDMA0
+
SZ_4K
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_PDMA0
,
NO_IRQ
},
.
periphid
=
0x00041330
,
};
AMBA_AHB_DEVICE
(
s5pv210_pdma0
,
"dma-pl330.0"
,
0x00041330
,
S5PV210_PA_PDMA0
,
{
IRQ_PDMA0
},
&
s5pv210_pdma0_pdata
);
u8
pdma1_peri
[]
=
{
DMACH_UART0_RX
,
...
...
@@ -127,31 +114,18 @@ struct dma_pl330_platdata s5pv210_pdma1_pdata = {
.
peri_id
=
pdma1_peri
,
};
struct
amba_device
s5pv210_device_pdma1
=
{
.
dev
=
{
.
init_name
=
"dma-pl330.1"
,
.
dma_mask
=
&
dma_dmamask
,
.
coherent_dma_mask
=
DMA_BIT_MASK
(
32
),
.
platform_data
=
&
s5pv210_pdma1_pdata
,
},
.
res
=
{
.
start
=
S5PV210_PA_PDMA1
,
.
end
=
S5PV210_PA_PDMA1
+
SZ_4K
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_PDMA1
,
NO_IRQ
},
.
periphid
=
0x00041330
,
};
AMBA_AHB_DEVICE
(
s5pv210_pdma1
,
"dma-pl330.1"
,
0x00041330
,
S5PV210_PA_PDMA1
,
{
IRQ_PDMA1
},
&
s5pv210_pdma1_pdata
);
static
int
__init
s5pv210_dma_init
(
void
)
{
dma_cap_set
(
DMA_SLAVE
,
s5pv210_pdma0_pdata
.
cap_mask
);
dma_cap_set
(
DMA_CYCLIC
,
s5pv210_pdma0_pdata
.
cap_mask
);
amba_device_register
(
&
s5pv210_
device_pdma0
,
&
iomem_resource
);
amba_device_register
(
&
s5pv210_
pdma0_device
,
&
iomem_resource
);
dma_cap_set
(
DMA_SLAVE
,
s5pv210_pdma1_pdata
.
cap_mask
);
dma_cap_set
(
DMA_CYCLIC
,
s5pv210_pdma1_pdata
.
cap_mask
);
amba_device_register
(
&
s5pv210_
device_pdma1
,
&
iomem_resource
);
amba_device_register
(
&
s5pv210_
pdma1_device
,
&
iomem_resource
);
return
0
;
}
...
...
arch/arm/mach-spear3xx/spear300.c
View file @
dcf81c1a
...
...
@@ -430,18 +430,8 @@ static struct pl061_platform_data gpio1_plat_data = {
.
irq_base
=
SPEAR300_GPIO1_INT_BASE
,
};
struct
amba_device
spear300_gpio1_device
=
{
.
dev
=
{
.
init_name
=
"gpio1"
,
.
platform_data
=
&
gpio1_plat_data
,
},
.
res
=
{
.
start
=
SPEAR300_GPIO_BASE
,
.
end
=
SPEAR300_GPIO_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
SPEAR300_VIRQ_GPIO1
,
NO_IRQ
},
};
AMBA_APB_DEVICE
(
spear300_gpio1
,
"gpio1"
,
0
,
SPEAR300_GPIO_BASE
,
{
SPEAR300_VIRQ_GPIO1
},
&
gpio1_plat_data
);
/* spear300 routines */
void
__init
spear300_init
(
struct
pmx_mode
*
pmx_mode
,
struct
pmx_dev
**
pmx_devs
,
...
...
arch/arm/mach-spear3xx/spear3xx.c
View file @
dcf81c1a
...
...
@@ -28,31 +28,12 @@ static struct pl061_platform_data gpio_plat_data = {
.
irq_base
=
SPEAR3XX_GPIO_INT_BASE
,
};
struct
amba_device
spear3xx_gpio_device
=
{
.
dev
=
{
.
init_name
=
"gpio"
,
.
platform_data
=
&
gpio_plat_data
,
},
.
res
=
{
.
start
=
SPEAR3XX_ICM3_GPIO_BASE
,
.
end
=
SPEAR3XX_ICM3_GPIO_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
SPEAR3XX_IRQ_BASIC_GPIO
,
NO_IRQ
},
};
AMBA_APB_DEVICE
(
spear3xx_gpio
,
"gpio"
,
0
,
SPEAR3XX_ICM3_GPIO_BASE
,
{
SPEAR3XX_IRQ_BASIC_GPIO
},
&
gpio_plat_data
);
/* uart device registration */
struct
amba_device
spear3xx_uart_device
=
{
.
dev
=
{
.
init_name
=
"uart"
,
},
.
res
=
{
.
start
=
SPEAR3XX_ICM1_UART_BASE
,
.
end
=
SPEAR3XX_ICM1_UART_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
SPEAR3XX_IRQ_UART
,
NO_IRQ
},
};
AMBA_APB_DEVICE
(
spear3xx_uart
,
"uart"
,
0
,
SPEAR3XX_ICM1_UART_BASE
,
{
SPEAR3XX_IRQ_UART
},
NULL
);
/* Do spear3xx familiy common initialization part here */
void
__init
spear3xx_init
(
void
)
...
...
arch/arm/mach-spear6xx/spear6xx.c
View file @
dcf81c1a
...
...
@@ -34,7 +34,7 @@ struct amba_device uart_device[] = {
.
end
=
SPEAR6XX_ICM1_UART0_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_UART_0
,
NO_IRQ
},
.
irq
=
{
IRQ_UART_0
},
},
{
.
dev
=
{
.
init_name
=
"uart1"
,
...
...
@@ -44,7 +44,7 @@ struct amba_device uart_device[] = {
.
end
=
SPEAR6XX_ICM1_UART1_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_UART_1
,
NO_IRQ
},
.
irq
=
{
IRQ_UART_1
},
}
};
...
...
@@ -73,7 +73,7 @@ struct amba_device gpio_device[] = {
.
end
=
SPEAR6XX_CPU_GPIO_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_LOCAL_GPIO
,
NO_IRQ
},
.
irq
=
{
IRQ_LOCAL_GPIO
},
},
{
.
dev
=
{
.
init_name
=
"gpio1"
,
...
...
@@ -84,7 +84,7 @@ struct amba_device gpio_device[] = {
.
end
=
SPEAR6XX_ICM3_GPIO_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_BASIC_GPIO
,
NO_IRQ
},
.
irq
=
{
IRQ_BASIC_GPIO
},
},
{
.
dev
=
{
.
init_name
=
"gpio2"
,
...
...
@@ -95,7 +95,7 @@ struct amba_device gpio_device[] = {
.
end
=
SPEAR6XX_ICM2_GPIO_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_APPL_GPIO
,
NO_IRQ
},
.
irq
=
{
IRQ_APPL_GPIO
},
}
};
...
...
arch/arm/mach-u300/core.c
View file @
dcf81c1a
...
...
@@ -94,19 +94,9 @@ static struct amba_pl011_data uart0_plat_data = {
#endif
};
static
struct
amba_device
uart0_device
=
{
.
dev
=
{
.
coherent_dma_mask
=
~
0
,
.
init_name
=
"uart0"
,
/* Slow device at 0x3000 offset */
.
platform_data
=
&
uart0_plat_data
,
},
.
res
=
{
.
start
=
U300_UART0_BASE
,
.
end
=
U300_UART0_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_U300_UART0
,
NO_IRQ
},
};
/* Slow device at 0x3000 offset */
static
AMBA_APB_DEVICE
(
uart0
,
"uart0"
,
0
,
U300_UART0_BASE
,
{
IRQ_U300_UART0
},
&
uart0_plat_data
);
/* The U335 have an additional UART1 on the APP CPU */
#ifdef CONFIG_MACH_U300_BS335
...
...
@@ -118,71 +108,28 @@ static struct amba_pl011_data uart1_plat_data = {
#endif
};
static
struct
amba_device
uart1_device
=
{
.
dev
=
{
.
coherent_dma_mask
=
~
0
,
.
init_name
=
"uart1"
,
/* Fast device at 0x7000 offset */
.
platform_data
=
&
uart1_plat_data
,
},
.
res
=
{
.
start
=
U300_UART1_BASE
,
.
end
=
U300_UART1_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_U300_UART1
,
NO_IRQ
},
};
/* Fast device at 0x7000 offset */
static
AMBA_APB_DEVICE
(
uart1
,
"uart1"
,
0
,
U300_UART1_BASE
,
{
IRQ_U300_UART1
},
&
uart1_plat_data
);
#endif
static
struct
amba_device
pl172_device
=
{
.
dev
=
{
.
init_name
=
"pl172"
,
/* AHB device at 0x4000 offset */
.
platform_data
=
NULL
,
},
.
res
=
{
.
start
=
U300_EMIF_CFG_BASE
,
.
end
=
U300_EMIF_CFG_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
};
/* AHB device at 0x4000 offset */
static
AMBA_APB_DEVICE
(
pl172
,
"pl172"
,
0
,
U300_EMIF_CFG_BASE
,
{
},
NULL
);
/*
* Everything within this next ifdef deals with external devices connected to
* the APP SPI bus.
*/
static
struct
amba_device
pl022_device
=
{
.
dev
=
{
.
coherent_dma_mask
=
~
0
,
.
init_name
=
"pl022"
,
/* Fast device at 0x6000 offset */
},
.
res
=
{
.
start
=
U300_SPI_BASE
,
.
end
=
U300_SPI_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_U300_SPI
,
NO_IRQ
},
/*
* This device has a DMA channel but the Linux driver does not use
* it currently.
*/
};
/* Fast device at 0x6000 offset */
static
AMBA_APB_DEVICE
(
pl022
,
"pl022"
,
0
,
U300_SPI_BASE
,
{
IRQ_U300_SPI
},
NULL
);
static
struct
amba_device
mmcsd_device
=
{
.
dev
=
{
.
init_name
=
"mmci"
,
/* Fast device at 0x1000 offset */
.
platform_data
=
NULL
,
/* Added later */
},
.
res
=
{
.
start
=
U300_MMCSD_BASE
,
.
end
=
U300_MMCSD_BASE
+
SZ_4K
-
1
,
.
flags
=
IORESOURCE_MEM
,
},
.
irq
=
{
IRQ_U300_MMCSD_MCIINTR0
,
IRQ_U300_MMCSD_MCIINTR1
},
/*
* This device has a DMA channel but the Linux driver does not use
* it currently.
*/
};
/* Fast device at 0x1000 offset */
#define U300_MMCSD_IRQS { IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 }
static
AMBA_APB_DEVICE
(
mmcsd
,
"mmci"
,
0
,
U300_MMCSD_BASE
,
U300_MMCSD_IRQS
,
NULL
);
/*
* The order of device declaration may be important, since some devices
...
...
arch/arm/mach-ux500/devices-common.c
View file @
dcf81c1a
...
...
@@ -26,29 +26,22 @@ dbx500_add_amba_device(const char *name, resource_size_t base,
struct
amba_device
*
dev
;
int
ret
;
dev
=
kzalloc
(
sizeof
*
dev
,
GFP_KERNEL
);
dev
=
amba_device_alloc
(
name
,
base
,
SZ_4K
);
if
(
!
dev
)
return
ERR_PTR
(
-
ENOMEM
);
dev
->
dev
.
init_name
=
name
;
dev
->
res
.
start
=
base
;
dev
->
res
.
end
=
base
+
SZ_4K
-
1
;
dev
->
res
.
flags
=
IORESOURCE_MEM
;
dev
->
dma_mask
=
DMA_BIT_MASK
(
32
);
dev
->
dev
.
coherent_dma_mask
=
DMA_BIT_MASK
(
32
);
dev
->
irq
[
0
]
=
irq
;
dev
->
irq
[
1
]
=
NO_IRQ
;
dev
->
periphid
=
periphid
;
dev
->
dev
.
platform_data
=
pdata
;
ret
=
amba_device_
register
(
dev
,
&
iomem_resource
);
ret
=
amba_device_
add
(
dev
,
&
iomem_resource
);
if
(
ret
)
{
kfree
(
dev
);
amba_device_put
(
dev
);
return
ERR_PTR
(
ret
);
}
...
...
arch/arm/mach-versatile/core.c
View file @
dcf81c1a
...
...
@@ -582,58 +582,58 @@ static struct pl022_ssp_controller ssp0_plat_data = {
.
num_chipselect
=
1
,
};
#define AACI_IRQ { IRQ_AACI
, NO_IRQ
}
#define AACI_IRQ { IRQ_AACI }
#define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B }
#define KMI0_IRQ { IRQ_SIC_KMI0
, NO_IRQ
}
#define KMI1_IRQ { IRQ_SIC_KMI1
, NO_IRQ
}
#define KMI0_IRQ { IRQ_SIC_KMI0 }
#define KMI1_IRQ { IRQ_SIC_KMI1 }
/*
* These devices are connected directly to the multi-layer AHB switch
*/
#define SMC_IRQ {
NO_IRQ, NO_IRQ
}
#define MPMC_IRQ {
NO_IRQ, NO_IRQ
}
#define CLCD_IRQ { IRQ_CLCDINT
, NO_IRQ
}
#define DMAC_IRQ { IRQ_DMAINT
, NO_IRQ
}
#define SMC_IRQ { }
#define MPMC_IRQ { }
#define CLCD_IRQ { IRQ_CLCDINT }
#define DMAC_IRQ { IRQ_DMAINT }
/*
* These devices are connected via the core APB bridge
*/
#define SCTL_IRQ {
NO_IRQ, NO_IRQ
}
#define WATCHDOG_IRQ { IRQ_WDOGINT
, NO_IRQ
}
#define GPIO0_IRQ { IRQ_GPIOINT0
, NO_IRQ
}
#define GPIO1_IRQ { IRQ_GPIOINT1
, NO_IRQ
}
#define RTC_IRQ { IRQ_RTCINT
, NO_IRQ
}
#define SCTL_IRQ { }
#define WATCHDOG_IRQ { IRQ_WDOGINT }
#define GPIO0_IRQ { IRQ_GPIOINT0 }
#define GPIO1_IRQ { IRQ_GPIOINT1 }
#define RTC_IRQ { IRQ_RTCINT }
/*
* These devices are connected via the DMA APB bridge
*/
#define SCI_IRQ { IRQ_SCIINT
, NO_IRQ
}
#define UART0_IRQ { IRQ_UARTINT0
, NO_IRQ
}
#define UART1_IRQ { IRQ_UARTINT1
, NO_IRQ
}
#define UART2_IRQ { IRQ_UARTINT2
, NO_IRQ
}
#define SSP_IRQ { IRQ_SSPINT
, NO_IRQ
}
#define SCI_IRQ { IRQ_SCIINT }
#define UART0_IRQ { IRQ_UARTINT0 }
#define UART1_IRQ { IRQ_UARTINT1 }
#define UART2_IRQ { IRQ_UARTINT2 }
#define SSP_IRQ { IRQ_SSPINT }
/* FPGA Primecells */
A
MBA
_DEVICE
(
aaci
,
"fpga:04"
,
AACI
,
NULL
);
A
MBA
_DEVICE
(
mmc0
,
"fpga:05"
,
MMCI0
,
&
mmc0_plat_data
);
A
MBA
_DEVICE
(
kmi0
,
"fpga:06"
,
KMI0
,
NULL
);
A
MBA
_DEVICE
(
kmi1
,
"fpga:07"
,
KMI1
,
NULL
);
A
PB
_DEVICE
(
aaci
,
"fpga:04"
,
AACI
,
NULL
);
A
PB
_DEVICE
(
mmc0
,
"fpga:05"
,
MMCI0
,
&
mmc0_plat_data
);
A
PB
_DEVICE
(
kmi0
,
"fpga:06"
,
KMI0
,
NULL
);
A
PB
_DEVICE
(
kmi1
,
"fpga:07"
,
KMI1
,
NULL
);
/* DevChip Primecells */
A
MBA
_DEVICE
(
smc
,
"dev:00"
,
SMC
,
NULL
);
A
MBA
_DEVICE
(
mpmc
,
"dev:10"
,
MPMC
,
NULL
);
A
MBA
_DEVICE
(
clcd
,
"dev:20"
,
CLCD
,
&
clcd_plat_data
);
A
MBA
_DEVICE
(
dmac
,
"dev:30"
,
DMAC
,
NULL
);
A
MBA
_DEVICE
(
sctl
,
"dev:e0"
,
SCTL
,
NULL
);
A
MBA
_DEVICE
(
wdog
,
"dev:e1"
,
WATCHDOG
,
NULL
);
A
MBA
_DEVICE
(
gpio0
,
"dev:e4"
,
GPIO0
,
&
gpio0_plat_data
);
A
MBA
_DEVICE
(
gpio1
,
"dev:e5"
,
GPIO1
,
&
gpio1_plat_data
);
A
MBA
_DEVICE
(
rtc
,
"dev:e8"
,
RTC
,
NULL
);
A
MBA
_DEVICE
(
sci0
,
"dev:f0"
,
SCI
,
NULL
);
A
MBA
_DEVICE
(
uart0
,
"dev:f1"
,
UART0
,
NULL
);
A
MBA
_DEVICE
(
uart1
,
"dev:f2"
,
UART1
,
NULL
);
A
MBA
_DEVICE
(
uart2
,
"dev:f3"
,
UART2
,
NULL
);
A
MBA
_DEVICE
(
ssp0
,
"dev:f4"
,
SSP
,
&
ssp0_plat_data
);
A
HB
_DEVICE
(
smc
,
"dev:00"
,
SMC
,
NULL
);
A
HB
_DEVICE
(
mpmc
,
"dev:10"
,
MPMC
,
NULL
);
A
HB
_DEVICE
(
clcd
,
"dev:20"
,
CLCD
,
&
clcd_plat_data
);
A
HB
_DEVICE
(
dmac
,
"dev:30"
,
DMAC
,
NULL
);
A
PB
_DEVICE
(
sctl
,
"dev:e0"
,
SCTL
,
NULL
);
A
PB
_DEVICE
(
wdog
,
"dev:e1"
,
WATCHDOG
,
NULL
);
A
PB
_DEVICE
(
gpio0
,
"dev:e4"
,
GPIO0
,
&
gpio0_plat_data
);
A
PB
_DEVICE
(
gpio1
,
"dev:e5"
,
GPIO1
,
&
gpio1_plat_data
);
A
PB
_DEVICE
(
rtc
,
"dev:e8"
,
RTC
,
NULL
);
A
PB
_DEVICE
(
sci0
,
"dev:f0"
,
SCI
,
NULL
);
A
PB
_DEVICE
(
uart0
,
"dev:f1"
,
UART0
,
NULL
);
A
PB
_DEVICE
(
uart1
,
"dev:f2"
,
UART1
,
NULL
);
A
PB
_DEVICE
(
uart2
,
"dev:f3"
,
UART2
,
NULL
);
A
PB
_DEVICE
(
ssp0
,
"dev:f4"
,
SSP
,
&
ssp0_plat_data
);
static
struct
amba_device
*
amba_devs
[]
__initdata
=
{
&
dmac_device
,
...
...
arch/arm/mach-versatile/core.h
View file @
dcf81c1a
...
...
@@ -36,20 +36,10 @@ extern unsigned int mmc_status(struct device *dev);
extern
struct
of_dev_auxdata
versatile_auxdata_lookup
[];
#endif
#define AMBA_DEVICE(name,busid,base,plat) \
static struct amba_device name##_device = { \
.dev = { \
.coherent_dma_mask = ~0, \
.init_name = busid, \
.platform_data = plat, \
}, \
.res = { \
.start = VERSATILE_##base##_BASE, \
.end = (VERSATILE_##base##_BASE) + SZ_4K - 1,\
.flags = IORESOURCE_MEM, \
}, \
.dma_mask = ~0, \
.irq = base##_IRQ, \
}
#define APB_DEVICE(name, busid, base, plat) \
static AMBA_APB_DEVICE(name, busid, 0, VERSATILE_##base##_BASE, base##_IRQ, plat)
#define AHB_DEVICE(name, busid, base, plat) \
static AMBA_AHB_DEVICE(name, busid, 0, VERSATILE_##base##_BASE, base##_IRQ, plat)
#endif
arch/arm/mach-versatile/versatile_pb.c
View file @
dcf81c1a
...
...
@@ -58,28 +58,28 @@ static struct pl061_platform_data gpio3_plat_data = {
.
irq_base
=
IRQ_GPIO3_START
,
};
#define UART3_IRQ { IRQ_SIC_UART3
, NO_IRQ
}
#define SCI1_IRQ { IRQ_SIC_SCI3
, NO_IRQ
}
#define UART3_IRQ { IRQ_SIC_UART3 }
#define SCI1_IRQ { IRQ_SIC_SCI3 }
#define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B }
/*
* These devices are connected via the core APB bridge
*/
#define GPIO2_IRQ { IRQ_GPIOINT2
, NO_IRQ
}
#define GPIO3_IRQ { IRQ_GPIOINT3
, NO_IRQ
}
#define GPIO2_IRQ { IRQ_GPIOINT2 }
#define GPIO3_IRQ { IRQ_GPIOINT3 }
/*
* These devices are connected via the DMA APB bridge
*/
/* FPGA Primecells */
A
MBA
_DEVICE
(
uart3
,
"fpga:09"
,
UART3
,
NULL
);
A
MBA
_DEVICE
(
sci1
,
"fpga:0a"
,
SCI1
,
NULL
);
A
MBA
_DEVICE
(
mmc1
,
"fpga:0b"
,
MMCI1
,
&
mmc1_plat_data
);
A
PB
_DEVICE
(
uart3
,
"fpga:09"
,
UART3
,
NULL
);
A
PB
_DEVICE
(
sci1
,
"fpga:0a"
,
SCI1
,
NULL
);
A
PB
_DEVICE
(
mmc1
,
"fpga:0b"
,
MMCI1
,
&
mmc1_plat_data
);
/* DevChip Primecells */
A
MBA
_DEVICE
(
gpio2
,
"dev:e6"
,
GPIO2
,
&
gpio2_plat_data
);
A
MBA
_DEVICE
(
gpio3
,
"dev:e7"
,
GPIO3
,
&
gpio3_plat_data
);
A
PB
_DEVICE
(
gpio2
,
"dev:e6"
,
GPIO2
,
&
gpio2_plat_data
);
A
PB
_DEVICE
(
gpio3
,
"dev:e7"
,
GPIO3
,
&
gpio3_plat_data
);
static
struct
amba_device
*
amba_devs
[]
__initdata
=
{
&
uart3_device
,
...
...
arch/arm/mach-vexpress/core.h
View file @
dcf81c1a
#define __MMIO_P2V(x) (((x) & 0xfffff) | (((x) & 0x0f000000) >> 4) | 0xf8000000)
#define MMIO_P2V(x) ((void __iomem *)__MMIO_P2V(x))
#define AMBA_DEVICE(name,busid,base,plat) \
struct amba_device name##_device = { \
.dev = { \
.coherent_dma_mask = ~0UL, \
.init_name = busid, \
.platform_data = plat, \
}, \
.res = { \
.start = base, \
.end = base + SZ_4K - 1, \
.flags = IORESOURCE_MEM, \
}, \
.dma_mask = ~0UL, \
.irq = IRQ_##base, \
/* .dma = DMA_##base,*/
\
}
arch/arm/mach-vexpress/ct-ca9x4.c
View file @
dcf81c1a
...
...
@@ -109,10 +109,10 @@ static struct clcd_board ct_ca9x4_clcd_data = {
.
remove
=
versatile_clcd_remove_dma
,
};
static
AMBA_
DEVICE
(
clcd
,
"ct:clcd"
,
CT_CA9X4_CLCDC
,
&
ct_ca9x4_clcd_data
);
static
AMBA_
DEVICE
(
dmc
,
"ct:dmc"
,
CT_CA9X4_DMC
,
NULL
);
static
AMBA_
DEVICE
(
smc
,
"ct:smc"
,
CT_CA9X4_SMC
,
NULL
);
static
AMBA_
DEVICE
(
gpio
,
"ct:gpio"
,
CT_CA9X4_GPIO
,
NULL
);
static
AMBA_
AHB_DEVICE
(
clcd
,
"ct:clcd"
,
0
,
CT_CA9X4_CLCDC
,
IRQ_
CT_CA9X4_CLCDC
,
&
ct_ca9x4_clcd_data
);
static
AMBA_
APB_DEVICE
(
dmc
,
"ct:dmc"
,
0
,
CT_CA9X4_DMC
,
IRQ_
CT_CA9X4_DMC
,
NULL
);
static
AMBA_
APB_DEVICE
(
smc
,
"ct:smc"
,
0
,
CT_CA9X4_SMC
,
IRQ_
CT_CA9X4_SMC
,
NULL
);
static
AMBA_
APB_DEVICE
(
gpio
,
"ct:gpio"
,
0
,
CT_CA9X4_GPIO
,
IRQ_
CT_CA9X4_GPIO
,
NULL
);
static
struct
amba_device
*
ct_ca9x4_amba_devs
[]
__initdata
=
{
&
clcd_device
,
...
...
arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
View file @
dcf81c1a
...
...
@@ -35,7 +35,7 @@
* Interrupts. Those in {} are for AMBA devices
*/
#define IRQ_CT_CA9X4_CLCDC { 76 }
#define IRQ_CT_CA9X4_DMC {
-1
}
#define IRQ_CT_CA9X4_DMC {
0
}
#define IRQ_CT_CA9X4_SMC { 77, 78 }
#define IRQ_CT_CA9X4_TIMER0 80
#define IRQ_CT_CA9X4_TIMER1 81
...
...
arch/arm/mach-vexpress/v2m.c
View file @
dcf81c1a
...
...
@@ -266,16 +266,16 @@ static struct mmci_platform_data v2m_mmci_data = {
.
status
=
v2m_mmci_status
,
};
static
AMBA_
DEVICE
(
aaci
,
"mb:aaci"
,
V2M_AACI
,
NULL
);
static
AMBA_
DEVICE
(
mmci
,
"mb:mmci"
,
V2M_MMCI
,
&
v2m_mmci_data
);
static
AMBA_
DEVICE
(
kmi0
,
"mb:kmi0"
,
V2M_KMI0
,
NULL
);
static
AMBA_
DEVICE
(
kmi1
,
"mb:kmi1"
,
V2M_KMI1
,
NULL
);
static
AMBA_
DEVICE
(
uart0
,
"mb:uart0"
,
V2M_UART0
,
NULL
);
static
AMBA_
DEVICE
(
uart1
,
"mb:uart1"
,
V2M_UART1
,
NULL
);
static
AMBA_
DEVICE
(
uart2
,
"mb:uart2"
,
V2M_UART2
,
NULL
);
static
AMBA_
DEVICE
(
uart3
,
"mb:uart3"
,
V2M_UART3
,
NULL
);
static
AMBA_
DEVICE
(
wdt
,
"mb:wdt"
,
V2M_WDT
,
NULL
);
static
AMBA_
DEVICE
(
rtc
,
"mb:rtc"
,
V2M_RTC
,
NULL
);
static
AMBA_
APB_DEVICE
(
aaci
,
"mb:aaci"
,
0
,
V2M_AACI
,
IRQ_
V2M_AACI
,
NULL
);
static
AMBA_
APB_DEVICE
(
mmci
,
"mb:mmci"
,
0
,
V2M_MMCI
,
IRQ_
V2M_MMCI
,
&
v2m_mmci_data
);
static
AMBA_
APB_DEVICE
(
kmi0
,
"mb:kmi0"
,
0
,
V2M_KMI0
,
IRQ_
V2M_KMI0
,
NULL
);
static
AMBA_
APB_DEVICE
(
kmi1
,
"mb:kmi1"
,
0
,
V2M_KMI1
,
IRQ_
V2M_KMI1
,
NULL
);
static
AMBA_
APB_DEVICE
(
uart0
,
"mb:uart0"
,
0
,
V2M_UART0
,
IRQ_
V2M_UART0
,
NULL
);
static
AMBA_
APB_DEVICE
(
uart1
,
"mb:uart1"
,
0
,
V2M_UART1
,
IRQ_
V2M_UART1
,
NULL
);
static
AMBA_
APB_DEVICE
(
uart2
,
"mb:uart2"
,
0
,
V2M_UART2
,
IRQ_
V2M_UART2
,
NULL
);
static
AMBA_
APB_DEVICE
(
uart3
,
"mb:uart3"
,
0
,
V2M_UART3
,
IRQ_
V2M_UART3
,
NULL
);
static
AMBA_
APB_DEVICE
(
wdt
,
"mb:wdt"
,
0
,
V2M_WDT
,
IRQ_
V2M_WDT
,
NULL
);
static
AMBA_
APB_DEVICE
(
rtc
,
"mb:rtc"
,
0
,
V2M_RTC
,
IRQ_
V2M_RTC
,
NULL
);
static
struct
amba_device
*
v2m_amba_devs
[]
__initdata
=
{
&
aaci_device
,
...
...
drivers/amba/bus.c
View file @
dcf81c1a
...
...
@@ -497,37 +497,22 @@ static void amba_device_release(struct device *dev)
}
/**
* amba_device_
register - register an AMBA devic
e
* @dev: AMBA device
to register
* @parent:
parent memory resource
* amba_device_
add - add a previously allocated AMBA device structur
e
* @dev: AMBA device
allocated by amba_device_alloc
* @parent:
resource parent for this devices resources
*
*
Setup the AMBA device, reading the cell ID if present.
*
Claim the resource, and register the AMBA device with
*
the Linux device
manager.
*
Claim the resource, and read the device cell ID if not already
*
initialized. Register the AMBA device with the Linux device
* manager.
*/
int
amba_device_
register
(
struct
amba_device
*
dev
,
struct
resource
*
parent
)
int
amba_device_
add
(
struct
amba_device
*
dev
,
struct
resource
*
parent
)
{
u32
size
;
void
__iomem
*
tmp
;
int
i
,
ret
;
device_initialize
(
&
dev
->
dev
);
/*
* Copy from device_add
*/
if
(
dev
->
dev
.
init_name
)
{
dev_set_name
(
&
dev
->
dev
,
"%s"
,
dev
->
dev
.
init_name
);
dev
->
dev
.
init_name
=
NULL
;
}
dev
->
dev
.
release
=
amba_device_release
;
dev
->
dev
.
bus
=
&
amba_bustype
;
dev
->
dev
.
dma_mask
=
&
dev
->
dma_mask
;
dev
->
res
.
name
=
dev_name
(
&
dev
->
dev
);
if
(
!
dev
->
dev
.
coherent_dma_mask
&&
dev
->
dma_mask
)
dev_warn
(
&
dev
->
dev
,
"coherent dma mask is unset
\n
"
);
WARN_ON
(
dev
->
irq
[
0
]
==
(
unsigned
int
)
-
1
);
WARN_ON
(
dev
->
irq
[
1
]
==
(
unsigned
int
)
-
1
);
ret
=
request_resource
(
parent
,
&
dev
->
res
);
if
(
ret
)
...
...
@@ -582,9 +567,9 @@ int amba_device_register(struct amba_device *dev, struct resource *parent)
if
(
ret
)
goto
err_release
;
if
(
dev
->
irq
[
0
]
!=
NO_IRQ
)
if
(
dev
->
irq
[
0
]
&&
dev
->
irq
[
0
]
!=
NO_IRQ
)
ret
=
device_create_file
(
&
dev
->
dev
,
&
dev_attr_irq0
);
if
(
ret
==
0
&&
dev
->
irq
[
1
]
!=
NO_IRQ
)
if
(
ret
==
0
&&
dev
->
irq
[
1
]
&&
dev
->
irq
[
1
]
!=
NO_IRQ
)
ret
=
device_create_file
(
&
dev
->
dev
,
&
dev_attr_irq1
);
if
(
ret
==
0
)
return
ret
;
...
...
@@ -596,6 +581,74 @@ int amba_device_register(struct amba_device *dev, struct resource *parent)
err_out:
return
ret
;
}
EXPORT_SYMBOL_GPL
(
amba_device_add
);
static
void
amba_device_initialize
(
struct
amba_device
*
dev
,
const
char
*
name
)
{
device_initialize
(
&
dev
->
dev
);
if
(
name
)
dev_set_name
(
&
dev
->
dev
,
"%s"
,
name
);
dev
->
dev
.
release
=
amba_device_release
;
dev
->
dev
.
bus
=
&
amba_bustype
;
dev
->
dev
.
dma_mask
=
&
dev
->
dma_mask
;
dev
->
res
.
name
=
dev_name
(
&
dev
->
dev
);
}
/**
* amba_device_alloc - allocate an AMBA device
* @name: sysfs name of the AMBA device
* @base: base of AMBA device
* @size: size of AMBA device
*
* Allocate and initialize an AMBA device structure. Returns %NULL
* on failure.
*/
struct
amba_device
*
amba_device_alloc
(
const
char
*
name
,
resource_size_t
base
,
size_t
size
)
{
struct
amba_device
*
dev
;
dev
=
kzalloc
(
sizeof
(
*
dev
),
GFP_KERNEL
);
if
(
dev
)
{
amba_device_initialize
(
dev
,
name
);
dev
->
res
.
start
=
base
;
dev
->
res
.
end
=
base
+
size
-
1
;
dev
->
res
.
flags
=
IORESOURCE_MEM
;
}
return
dev
;
}
EXPORT_SYMBOL_GPL
(
amba_device_alloc
);
/**
* amba_device_register - register an AMBA device
* @dev: AMBA device to register
* @parent: parent memory resource
*
* Setup the AMBA device, reading the cell ID if present.
* Claim the resource, and register the AMBA device with
* the Linux device manager.
*/
int
amba_device_register
(
struct
amba_device
*
dev
,
struct
resource
*
parent
)
{
amba_device_initialize
(
dev
,
dev
->
dev
.
init_name
);
dev
->
dev
.
init_name
=
NULL
;
if
(
!
dev
->
dev
.
coherent_dma_mask
&&
dev
->
dma_mask
)
dev_warn
(
&
dev
->
dev
,
"coherent dma mask is unset
\n
"
);
return
amba_device_add
(
dev
,
parent
);
}
/**
* amba_device_put - put an AMBA device
* @dev: AMBA device to put
*/
void
amba_device_put
(
struct
amba_device
*
dev
)
{
put_device
(
&
dev
->
dev
);
}
EXPORT_SYMBOL_GPL
(
amba_device_put
);
/**
* amba_device_unregister - unregister an AMBA device
...
...
drivers/mmc/host/mmci.c
View file @
dcf81c1a
...
...
@@ -1325,7 +1325,7 @@ static int __devinit mmci_probe(struct amba_device *dev,
if
(
ret
)
goto
unmap
;
if
(
dev
->
irq
[
1
]
==
NO_IRQ
)
if
(
dev
->
irq
[
1
]
==
NO_IRQ
||
!
dev
->
irq
[
1
]
)
host
->
singleirq
=
true
;
else
{
ret
=
request_irq
(
dev
->
irq
[
1
],
mmci_pio_irq
,
IRQF_SHARED
,
...
...
drivers/of/platform.c
View file @
dcf81c1a
...
...
@@ -253,7 +253,7 @@ static struct amba_device *of_amba_device_create(struct device_node *node,
if
(
!
of_device_is_available
(
node
))
return
NULL
;
dev
=
kzalloc
(
sizeof
(
*
dev
),
GFP_KERNEL
);
dev
=
amba_device_alloc
(
NULL
,
0
,
0
);
if
(
!
dev
)
return
NULL
;
...
...
@@ -283,14 +283,14 @@ static struct amba_device *of_amba_device_create(struct device_node *node,
if
(
ret
)
goto
err_free
;
ret
=
amba_device_
register
(
dev
,
&
iomem_resource
);
ret
=
amba_device_
add
(
dev
,
&
iomem_resource
);
if
(
ret
)
goto
err_free
;
return
dev
;
err_free:
kfree
(
dev
);
amba_device_put
(
dev
);
return
NULL
;
}
#else
/* CONFIG_ARM_AMBA */
...
...
include/linux/amba/bus.h
View file @
dcf81c1a
...
...
@@ -60,6 +60,9 @@ extern struct bus_type amba_bustype;
int
amba_driver_register
(
struct
amba_driver
*
);
void
amba_driver_unregister
(
struct
amba_driver
*
);
struct
amba_device
*
amba_device_alloc
(
const
char
*
,
resource_size_t
,
size_t
);
void
amba_device_put
(
struct
amba_device
*
);
int
amba_device_add
(
struct
amba_device
*
,
struct
resource
*
);
int
amba_device_register
(
struct
amba_device
*
,
struct
resource
*
);
void
amba_device_unregister
(
struct
amba_device
*
);
struct
amba_device
*
amba_find_device
(
const
char
*
,
struct
device
*
,
unsigned
int
,
unsigned
int
);
...
...
@@ -89,4 +92,37 @@ void amba_release_regions(struct amba_device *);
#define amba_manf(d) AMBA_MANF_BITS((d)->periphid)
#define amba_part(d) AMBA_PART_BITS((d)->periphid)
#define __AMBA_DEV(busid, data, mask) \
{ \
.coherent_dma_mask = mask, \
.init_name = busid, \
.platform_data = data, \
}
/*
* APB devices do not themselves have the ability to address memory,
* so DMA masks should be zero (much like USB peripheral devices.)
* The DMA controller DMA masks should be used instead (much like
* USB host controllers in conventional PCs.)
*/
#define AMBA_APB_DEVICE(name, busid, id, base, irqs, data) \
struct amba_device name##_device = { \
.dev = __AMBA_DEV(busid, data, 0), \
.res = DEFINE_RES_MEM(base, SZ_4K), \
.irq = irqs, \
.periphid = id, \
}
/*
* AHB devices are DMA capable, so set their DMA masks
*/
#define AMBA_AHB_DEVICE(name, busid, id, base, irqs, data) \
struct amba_device name##_device = { \
.dev = __AMBA_DEV(busid, data, ~0ULL), \
.res = DEFINE_RES_MEM(base, SZ_4K), \
.dma_mask = ~0ULL, \
.irq = irqs, \
.periphid = id, \
}
#endif
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