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Commit ddacbaac authored by Kumar Gala's avatar Kumar Gala Committed by Linus Torvalds
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[PATCH] ppc32: convert boards from using OCP to platform_device 

Convert MPC8540 ADS, MPC8560 ADS, MPC8555 CDS and SBC8560 reference boards
from using OCP to platform_device.
Signed-off-by: default avatarKumar Gala <kumar.gala@freescale.com>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 59ed6a6e
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Inline Side-by-side
Showing with 93 additions and 191 deletions
arch/ppc/platforms/85xx/mpc8540_ads.c
View file @ ddacbaac
...@@ -32,6 +32,7 @@ ...@@ -32,6 +32,7 @@
#include <linux/serial_core.h> #include <linux/serial_core.h>
#include <linux/initrd.h> #include <linux/initrd.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/fsl_devices.h>
#include <asm/system.h> #include <asm/system.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
...@@ -48,50 +49,11 @@ ...@@ -48,50 +49,11 @@
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/immap_85xx.h> #include <asm/immap_85xx.h>
#include <asm/kgdb.h> #include <asm/kgdb.h>
#include <asm/ocp.h> #include <asm/ppc_sys.h>
#include <mm/mmu_decl.h> #include <mm/mmu_decl.h>
#include <syslib/ppc85xx_common.h>
#include <syslib/ppc85xx_setup.h> #include <syslib/ppc85xx_setup.h>
struct ocp_gfar_data mpc85xx_tsec1_def = {
.interruptTransmit = MPC85xx_IRQ_TSEC1_TX,
.interruptError = MPC85xx_IRQ_TSEC1_ERROR,
.interruptReceive = MPC85xx_IRQ_TSEC1_RX,
.interruptPHY = MPC85xx_IRQ_EXT5,
.flags = (GFAR_HAS_GIGABIT | GFAR_HAS_MULTI_INTR
| GFAR_HAS_RMON
| GFAR_HAS_PHY_INTR | GFAR_HAS_COALESCE),
.phyid = 0,
.phyregidx = 0,
};
struct ocp_gfar_data mpc85xx_tsec2_def = {
.interruptTransmit = MPC85xx_IRQ_TSEC2_TX,
.interruptError = MPC85xx_IRQ_TSEC2_ERROR,
.interruptReceive = MPC85xx_IRQ_TSEC2_RX,
.interruptPHY = MPC85xx_IRQ_EXT5,
.flags = (GFAR_HAS_GIGABIT | GFAR_HAS_MULTI_INTR
| GFAR_HAS_RMON
| GFAR_HAS_PHY_INTR | GFAR_HAS_COALESCE),
.phyid = 1,
.phyregidx = 0,
};
struct ocp_gfar_data mpc85xx_fec_def = {
.interruptTransmit = MPC85xx_IRQ_FEC,
.interruptError = MPC85xx_IRQ_FEC,
.interruptReceive = MPC85xx_IRQ_FEC,
.interruptPHY = MPC85xx_IRQ_EXT5,
.flags = 0,
.phyid = 3,
.phyregidx = 0,
};
struct ocp_fs_i2c_data mpc85xx_i2c1_def = {
.flags = FS_I2C_SEPARATE_DFSRR,
};
/* ************************************************************************ /* ************************************************************************
* *
* Setup the architecture * Setup the architecture
...@@ -100,10 +62,9 @@ struct ocp_fs_i2c_data mpc85xx_i2c1_def = { ...@@ -100,10 +62,9 @@ struct ocp_fs_i2c_data mpc85xx_i2c1_def = {
static void __init static void __init
mpc8540ads_setup_arch(void) mpc8540ads_setup_arch(void)
{ {
struct ocp_def *def;
struct ocp_gfar_data *einfo;
bd_t *binfo = (bd_t *) __res; bd_t *binfo = (bd_t *) __res;
unsigned int freq; unsigned int freq;
struct gianfar_platform_data *pdata;
/* get the core frequency */ /* get the core frequency */
freq = binfo->bi_intfreq; freq = binfo->bi_intfreq;
...@@ -130,23 +91,30 @@ mpc8540ads_setup_arch(void) ...@@ -130,23 +91,30 @@ mpc8540ads_setup_arch(void)
invalidate_tlbcam_entry(NUM_TLBCAMS - 1); invalidate_tlbcam_entry(NUM_TLBCAMS - 1);
#endif #endif
def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 0); /* setup the board related information for the enet controllers */
if (def) { pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
einfo = (struct ocp_gfar_data *) def->additions; pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
memcpy(einfo->mac_addr, binfo->bi_enetaddr, 6); pdata->interruptPHY = MPC85xx_IRQ_EXT5;
} pdata->phyid = 0;
/* fixup phy address */
def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 1); pdata->phy_reg_addr += binfo->bi_immr_base;
if (def) { memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
einfo = (struct ocp_gfar_data *) def->additions;
memcpy(einfo->mac_addr, binfo->bi_enet1addr, 6); pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
} pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
pdata->interruptPHY = MPC85xx_IRQ_EXT5;
def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 2); pdata->phyid = 1;
if (def) { /* fixup phy address */
einfo = (struct ocp_gfar_data *) def->additions; pdata->phy_reg_addr += binfo->bi_immr_base;
memcpy(einfo->mac_addr, binfo->bi_enet2addr, 6); memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
}
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC);
pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
pdata->interruptPHY = MPC85xx_IRQ_EXT5;
pdata->phyid = 3;
/* fixup phy address */
pdata->phy_reg_addr += binfo->bi_immr_base;
memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6);
#ifdef CONFIG_BLK_DEV_INITRD #ifdef CONFIG_BLK_DEV_INITRD
if (initrd_start) if (initrd_start)
...@@ -158,8 +126,6 @@ mpc8540ads_setup_arch(void) ...@@ -158,8 +126,6 @@ mpc8540ads_setup_arch(void)
#else #else
ROOT_DEV = Root_HDA1; ROOT_DEV = Root_HDA1;
#endif #endif
ocp_for_each_device(mpc85xx_update_paddr_ocp, &(binfo->bi_immr_base));
} }
/* ************************************************************************ */ /* ************************************************************************ */
...@@ -206,6 +172,8 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, ...@@ -206,6 +172,8 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
strcpy(cmd_line, (char *) (r6 + KERNELBASE)); strcpy(cmd_line, (char *) (r6 + KERNELBASE));
} }
identify_ppc_sys_by_id(mfspr(SVR));
/* setup the PowerPC module struct */ /* setup the PowerPC module struct */
ppc_md.setup_arch = mpc8540ads_setup_arch; ppc_md.setup_arch = mpc8540ads_setup_arch;
ppc_md.show_cpuinfo = mpc85xx_ads_show_cpuinfo; ppc_md.show_cpuinfo = mpc85xx_ads_show_cpuinfo;
......
arch/ppc/platforms/85xx/mpc8555_cds.h
View file @ ddacbaac
...@@ -18,7 +18,7 @@ ...@@ -18,7 +18,7 @@
#define __MACH_MPC8555CDS_H__ #define __MACH_MPC8555CDS_H__
#include <linux/config.h> #include <linux/config.h>
#include <linux/serial.h> #include <syslib/ppc85xx_setup.h>
#include <platforms/85xx/mpc85xx_cds_common.h> #include <platforms/85xx/mpc85xx_cds_common.h>
#define CPM_MAP_ADDR (CCSRBAR + MPC85xx_CPM_OFFSET) #define CPM_MAP_ADDR (CCSRBAR + MPC85xx_CPM_OFFSET)
......
arch/ppc/platforms/85xx/mpc8560_ads.c
View file @ ddacbaac
...@@ -32,6 +32,7 @@ ...@@ -32,6 +32,7 @@
#include <linux/serial_core.h> #include <linux/serial_core.h>
#include <linux/initrd.h> #include <linux/initrd.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/fsl_devices.h>
#include <asm/system.h> #include <asm/system.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
...@@ -48,7 +49,7 @@ ...@@ -48,7 +49,7 @@
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/immap_85xx.h> #include <asm/immap_85xx.h>
#include <asm/kgdb.h> #include <asm/kgdb.h>
#include <asm/ocp.h> #include <asm/ppc_sys.h>
#include <asm/cpm2.h> #include <asm/cpm2.h>
#include <mm/mmu_decl.h> #include <mm/mmu_decl.h>
...@@ -58,34 +59,6 @@ ...@@ -58,34 +59,6 @@
extern void cpm2_reset(void); extern void cpm2_reset(void);
struct ocp_gfar_data mpc85xx_tsec1_def = {
.interruptTransmit = MPC85xx_IRQ_TSEC1_TX,
.interruptError = MPC85xx_IRQ_TSEC1_ERROR,
.interruptReceive = MPC85xx_IRQ_TSEC1_RX,
.interruptPHY = MPC85xx_IRQ_EXT5,
.flags = (GFAR_HAS_GIGABIT | GFAR_HAS_MULTI_INTR
| GFAR_HAS_RMON | GFAR_HAS_COALESCE
| GFAR_HAS_PHY_INTR),
.phyid = 0,
.phyregidx = 0,
};
struct ocp_gfar_data mpc85xx_tsec2_def = {
.interruptTransmit = MPC85xx_IRQ_TSEC2_TX,
.interruptError = MPC85xx_IRQ_TSEC2_ERROR,
.interruptReceive = MPC85xx_IRQ_TSEC2_RX,
.interruptPHY = MPC85xx_IRQ_EXT5,
.flags = (GFAR_HAS_GIGABIT | GFAR_HAS_MULTI_INTR
| GFAR_HAS_RMON | GFAR_HAS_COALESCE
| GFAR_HAS_PHY_INTR),
.phyid = 1,
.phyregidx = 0,
};
struct ocp_fs_i2c_data mpc85xx_i2c1_def = {
.flags = FS_I2C_SEPARATE_DFSRR,
};
/* ************************************************************************ /* ************************************************************************
* *
* Setup the architecture * Setup the architecture
...@@ -95,10 +68,9 @@ struct ocp_fs_i2c_data mpc85xx_i2c1_def = { ...@@ -95,10 +68,9 @@ struct ocp_fs_i2c_data mpc85xx_i2c1_def = {
static void __init static void __init
mpc8560ads_setup_arch(void) mpc8560ads_setup_arch(void)
{ {
struct ocp_def *def;
struct ocp_gfar_data *einfo;
bd_t *binfo = (bd_t *) __res; bd_t *binfo = (bd_t *) __res;
unsigned int freq; unsigned int freq;
struct gianfar_platform_data *pdata;
cpm2_reset(); cpm2_reset();
...@@ -117,17 +89,22 @@ mpc8560ads_setup_arch(void) ...@@ -117,17 +89,22 @@ mpc8560ads_setup_arch(void)
mpc85xx_setup_hose(); mpc85xx_setup_hose();
#endif #endif
def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 0); /* setup the board related information for the enet controllers */
if (def) { pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
einfo = (struct ocp_gfar_data *) def->additions; pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
memcpy(einfo->mac_addr, binfo->bi_enetaddr, 6); pdata->interruptPHY = MPC85xx_IRQ_EXT5;
} pdata->phyid = 0;
/* fixup phy address */
def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 1); pdata->phy_reg_addr += binfo->bi_immr_base;
if (def) { memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
einfo = (struct ocp_gfar_data *) def->additions;
memcpy(einfo->mac_addr, binfo->bi_enet1addr, 6); pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
} pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
pdata->interruptPHY = MPC85xx_IRQ_EXT5;
pdata->phyid = 1;
/* fixup phy address */
pdata->phy_reg_addr += binfo->bi_immr_base;
memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
#ifdef CONFIG_BLK_DEV_INITRD #ifdef CONFIG_BLK_DEV_INITRD
if (initrd_start) if (initrd_start)
...@@ -139,8 +116,6 @@ mpc8560ads_setup_arch(void) ...@@ -139,8 +116,6 @@ mpc8560ads_setup_arch(void)
#else #else
ROOT_DEV = Root_HDA1; ROOT_DEV = Root_HDA1;
#endif #endif
ocp_for_each_device(mpc85xx_update_paddr_ocp, &(binfo->bi_immr_base));
} }
static irqreturn_t cpm2_cascade(int irq, void *dev_id, struct pt_regs *regs) static irqreturn_t cpm2_cascade(int irq, void *dev_id, struct pt_regs *regs)
...@@ -222,6 +197,8 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, ...@@ -222,6 +197,8 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
strcpy(cmd_line, (char *) (r6 + KERNELBASE)); strcpy(cmd_line, (char *) (r6 + KERNELBASE));
} }
identify_ppc_sys_by_id(mfspr(SVR));
/* setup the PowerPC module struct */ /* setup the PowerPC module struct */
ppc_md.setup_arch = mpc8560ads_setup_arch; ppc_md.setup_arch = mpc8560ads_setup_arch;
ppc_md.show_cpuinfo = mpc85xx_ads_show_cpuinfo; ppc_md.show_cpuinfo = mpc85xx_ads_show_cpuinfo;
......
arch/ppc/platforms/85xx/mpc85xx_ads_common.c
View file @ ddacbaac
...@@ -43,7 +43,6 @@ ...@@ -43,7 +43,6 @@
#include <asm/mpc85xx.h> #include <asm/mpc85xx.h>
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/immap_85xx.h> #include <asm/immap_85xx.h>
#include <asm/ocp.h>
#include <mm/mmu_decl.h> #include <mm/mmu_decl.h>
......
arch/ppc/platforms/85xx/mpc85xx_cds_common.c
View file @ ddacbaac
...@@ -32,6 +32,7 @@ ...@@ -32,6 +32,7 @@
#include <linux/initrd.h> #include <linux/initrd.h>
#include <linux/tty.h> #include <linux/tty.h>
#include <linux/serial_core.h> #include <linux/serial_core.h>
#include <linux/fsl_devices.h>
#include <asm/system.h> #include <asm/system.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
...@@ -48,7 +49,7 @@ ...@@ -48,7 +49,7 @@
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/immap_85xx.h> #include <asm/immap_85xx.h>
#include <asm/immap_cpm2.h> #include <asm/immap_cpm2.h>
#include <asm/ocp.h> #include <asm/ppc_sys.h>
#include <asm/kgdb.h> #include <asm/kgdb.h>
#include <mm/mmu_decl.h> #include <mm/mmu_decl.h>
...@@ -129,32 +130,6 @@ static u_char mpc85xx_cds_openpic_initsenses[] __initdata = { ...@@ -129,32 +130,6 @@ static u_char mpc85xx_cds_openpic_initsenses[] __initdata = {
#endif #endif
}; };
struct ocp_gfar_data mpc85xx_tsec1_def = {
.interruptTransmit = MPC85xx_IRQ_TSEC1_TX,
.interruptError = MPC85xx_IRQ_TSEC1_ERROR,
.interruptReceive = MPC85xx_IRQ_TSEC1_RX,
.interruptPHY = MPC85xx_IRQ_EXT5,
.flags = (GFAR_HAS_GIGABIT | GFAR_HAS_MULTI_INTR |
GFAR_HAS_PHY_INTR),
.phyid = 0,
.phyregidx = 0,
};
struct ocp_gfar_data mpc85xx_tsec2_def = {
.interruptTransmit = MPC85xx_IRQ_TSEC2_TX,
.interruptError = MPC85xx_IRQ_TSEC2_ERROR,
.interruptReceive = MPC85xx_IRQ_TSEC2_RX,
.interruptPHY = MPC85xx_IRQ_EXT5,
.flags = (GFAR_HAS_GIGABIT | GFAR_HAS_MULTI_INTR |
GFAR_HAS_PHY_INTR),
.phyid = 1,
.phyregidx = 0,
};
struct ocp_fs_i2c_data mpc85xx_i2c1_def = {
.flags = FS_I2C_SEPARATE_DFSRR,
};
/* ************************************************************************ */ /* ************************************************************************ */
int int
mpc85xx_cds_show_cpuinfo(struct seq_file *m) mpc85xx_cds_show_cpuinfo(struct seq_file *m)
...@@ -335,10 +310,9 @@ mpc85xx_exclude_device(u_char bus, u_char devfn) ...@@ -335,10 +310,9 @@ mpc85xx_exclude_device(u_char bus, u_char devfn)
static void __init static void __init
mpc85xx_cds_setup_arch(void) mpc85xx_cds_setup_arch(void)
{ {
struct ocp_def *def;
struct ocp_gfar_data *einfo;
bd_t *binfo = (bd_t *) __res; bd_t *binfo = (bd_t *) __res;
unsigned int freq; unsigned int freq;
struct gianfar_platform_data *pdata;
/* get the core frequency */ /* get the core frequency */
freq = binfo->bi_intfreq; freq = binfo->bi_intfreq;
...@@ -372,17 +346,23 @@ mpc85xx_cds_setup_arch(void) ...@@ -372,17 +346,23 @@ mpc85xx_cds_setup_arch(void)
invalidate_tlbcam_entry(NUM_TLBCAMS - 1); invalidate_tlbcam_entry(NUM_TLBCAMS - 1);
#endif #endif
def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 0); /* setup the board related information for the enet controllers */
if (def) { pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
einfo = (struct ocp_gfar_data *) def->additions; pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
memcpy(einfo->mac_addr, binfo->bi_enetaddr, 6); pdata->interruptPHY = MPC85xx_IRQ_EXT5;
} pdata->phyid = 0;
/* fixup phy address */
pdata->phy_reg_addr += binfo->bi_immr_base;
memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
pdata->interruptPHY = MPC85xx_IRQ_EXT5;
pdata->phyid = 1;
/* fixup phy address */
pdata->phy_reg_addr += binfo->bi_immr_base;
memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 1);
if (def) {
einfo = (struct ocp_gfar_data *) def->additions;
memcpy(einfo->mac_addr, binfo->bi_enet1addr, 6);
}
#ifdef CONFIG_BLK_DEV_INITRD #ifdef CONFIG_BLK_DEV_INITRD
if (initrd_start) if (initrd_start)
...@@ -394,8 +374,6 @@ mpc85xx_cds_setup_arch(void) ...@@ -394,8 +374,6 @@ mpc85xx_cds_setup_arch(void)
#else #else
ROOT_DEV = Root_HDA1; ROOT_DEV = Root_HDA1;
#endif #endif
ocp_for_each_device(mpc85xx_update_paddr_ocp, &(binfo->bi_immr_base));
} }
/* ************************************************************************ */ /* ************************************************************************ */
...@@ -444,6 +422,8 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, ...@@ -444,6 +422,8 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
strcpy(cmd_line, (char *) (r6 + KERNELBASE)); strcpy(cmd_line, (char *) (r6 + KERNELBASE));
} }
identify_ppc_sys_by_id(mfspr(SVR));
/* setup the PowerPC module struct */ /* setup the PowerPC module struct */
ppc_md.setup_arch = mpc85xx_cds_setup_arch; ppc_md.setup_arch = mpc85xx_cds_setup_arch;
ppc_md.show_cpuinfo = mpc85xx_cds_show_cpuinfo; ppc_md.show_cpuinfo = mpc85xx_cds_show_cpuinfo;
......
arch/ppc/platforms/85xx/sbc8560.c
View file @ ddacbaac
...@@ -32,6 +32,7 @@ ...@@ -32,6 +32,7 @@
#include <linux/serial_core.h> #include <linux/serial_core.h>
#include <linux/initrd.h> #include <linux/initrd.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/fsl_devices.h>
#include <asm/system.h> #include <asm/system.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
...@@ -48,37 +49,12 @@ ...@@ -48,37 +49,12 @@
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/immap_85xx.h> #include <asm/immap_85xx.h>
#include <asm/kgdb.h> #include <asm/kgdb.h>
#include <asm/ocp.h> #include <asm/ppc_sys.h>
#include <mm/mmu_decl.h> #include <mm/mmu_decl.h>
#include <syslib/ppc85xx_common.h> #include <syslib/ppc85xx_common.h>
#include <syslib/ppc85xx_setup.h> #include <syslib/ppc85xx_setup.h>
struct ocp_gfar_data mpc85xx_tsec1_def = {
.interruptTransmit = MPC85xx_IRQ_TSEC1_TX,
.interruptError = MPC85xx_IRQ_TSEC1_ERROR,
.interruptReceive = MPC85xx_IRQ_TSEC1_RX,
.interruptPHY = MPC85xx_IRQ_EXT6,
.flags = (GFAR_HAS_GIGABIT | GFAR_HAS_MULTI_INTR | GFAR_HAS_PHY_INTR),
.phyid = 25,
.phyregidx = 0,
};
struct ocp_gfar_data mpc85xx_tsec2_def = {
.interruptTransmit = MPC85xx_IRQ_TSEC2_TX,
.interruptError = MPC85xx_IRQ_TSEC2_ERROR,
.interruptReceive = MPC85xx_IRQ_TSEC2_RX,
.interruptPHY = MPC85xx_IRQ_EXT7,
.flags = (GFAR_HAS_GIGABIT | GFAR_HAS_MULTI_INTR | GFAR_HAS_PHY_INTR),
.phyid = 26,
.phyregidx = 0,
};
struct ocp_fs_i2c_data mpc85xx_i2c1_def = {
.flags = FS_I2C_SEPARATE_DFSRR,
};
#ifdef CONFIG_SERIAL_8250 #ifdef CONFIG_SERIAL_8250
static void __init static void __init
sbc8560_early_serial_map(void) sbc8560_early_serial_map(void)
...@@ -125,10 +101,9 @@ sbc8560_early_serial_map(void) ...@@ -125,10 +101,9 @@ sbc8560_early_serial_map(void)
static void __init static void __init
sbc8560_setup_arch(void) sbc8560_setup_arch(void)
{ {
struct ocp_def *def;
struct ocp_gfar_data *einfo;
bd_t *binfo = (bd_t *) __res; bd_t *binfo = (bd_t *) __res;
unsigned int freq; unsigned int freq;
struct gianfar_platform_data *pdata;
/* get the core frequency */ /* get the core frequency */
freq = binfo->bi_intfreq; freq = binfo->bi_intfreq;
...@@ -153,18 +128,22 @@ sbc8560_setup_arch(void) ...@@ -153,18 +128,22 @@ sbc8560_setup_arch(void)
invalidate_tlbcam_entry(NUM_TLBCAMS - 1); invalidate_tlbcam_entry(NUM_TLBCAMS - 1);
#endif #endif
/* Set up MAC addresses for the Ethernet devices */ /* setup the board related information for the enet controllers */
def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 0); pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
if (def) { pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
einfo = (struct ocp_gfar_data *) def->additions; pdata->interruptPHY = MPC85xx_IRQ_EXT6;
memcpy(einfo->mac_addr, binfo->bi_enetaddr, 6); pdata->phyid = 25;
} /* fixup phy address */
pdata->phy_reg_addr += binfo->bi_immr_base;
def = ocp_get_one_device(OCP_VENDOR_FREESCALE, OCP_FUNC_GFAR, 1); memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
if (def) {
einfo = (struct ocp_gfar_data *) def->additions; pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
memcpy(einfo->mac_addr, binfo->bi_enet1addr, 6); pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
} pdata->interruptPHY = MPC85xx_IRQ_EXT7;
pdata->phyid = 26;
/* fixup phy address */
pdata->phy_reg_addr += binfo->bi_immr_base;
memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
#ifdef CONFIG_BLK_DEV_INITRD #ifdef CONFIG_BLK_DEV_INITRD
if (initrd_start) if (initrd_start)
...@@ -176,8 +155,6 @@ sbc8560_setup_arch(void) ...@@ -176,8 +155,6 @@ sbc8560_setup_arch(void)
#else #else
ROOT_DEV = Root_HDA1; ROOT_DEV = Root_HDA1;
#endif #endif
ocp_for_each_device(mpc85xx_update_paddr_ocp, &(binfo->bi_immr_base));
} }
/* ************************************************************************ */ /* ************************************************************************ */
...@@ -221,6 +198,8 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, ...@@ -221,6 +198,8 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
strcpy(cmd_line, (char *) (r6 + KERNELBASE)); strcpy(cmd_line, (char *) (r6 + KERNELBASE));
} }
identify_ppc_sys_by_id(mfspr(SVR));
/* setup the PowerPC module struct */ /* setup the PowerPC module struct */
ppc_md.setup_arch = sbc8560_setup_arch; ppc_md.setup_arch = sbc8560_setup_arch;
ppc_md.show_cpuinfo = sbc8560_show_cpuinfo; ppc_md.show_cpuinfo = sbc8560_show_cpuinfo;
......
arch/ppc/platforms/85xx/sbc85xx.c
View file @ ddacbaac
...@@ -42,7 +42,6 @@ ...@@ -42,7 +42,6 @@
#include <asm/mpc85xx.h> #include <asm/mpc85xx.h>
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/immap_85xx.h> #include <asm/immap_85xx.h>
#include <asm/ocp.h>
#include <mm/mmu_decl.h> #include <mm/mmu_decl.h>
......
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