Commit df2ea3c2 authored by Yan Zhao's avatar Yan Zhao Committed by Zhenyu Wang

drm/i915/gvt: use cmd to restore in-context mmios to hw for gen9 platform

for restore-inhibit context, hardware will not load in-context mmios
(engine context part) to hardware, but hardware will save the mmio
values in hardware back to context image. So, in order to save correct
values of vGPU back to context image, values of vGPU mmios have to be
loaded into hardware first for restore-inhibit context.

In this patch, the mechanism is applied to all gen9 platform.

The reason excluding gen8 platforms is only because of lacking of testing
on those platforms.

v3: for mocs registers, goto in-context mmios save-restore path for skl
platform as well (weinan li)
v2: update vreg when scanning indirect context for inhibit context for
gen9

Cc: Weinan Li <weinan.z.li@intel.com>
Acked-by: default avatarWeinan Li <weinan.z.li@intel.com>
Signed-off-by: default avatarYan Zhao <yan.y.zhao@intel.com>
Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
parent a8c2d5ab
...@@ -896,12 +896,16 @@ static int cmd_reg_handler(struct parser_exec_state *s, ...@@ -896,12 +896,16 @@ static int cmd_reg_handler(struct parser_exec_state *s,
} }
/* TODO /* TODO
* Right now only scan LRI command on KBL and in inhibit context. * In order to let workload with inhibit context to generate
* It's good enough to support initializing mmio by lri command in * correct image data into memory, vregs values will be loaded to
* vgpu inhibit context on KBL. * hw via LRIs in the workload with inhibit context. But as
* indirect context is loaded prior to LRIs in workload, we don't
* want reg values specified in indirect context overwritten by
* LRIs in workloads. So, when scanning an indirect context, we
* update reg values in it into vregs, so LRIs in workload with
* inhibit context will restore with correct values
*/ */
if ((IS_KABYLAKE(s->vgpu->gvt->dev_priv) if (IS_GEN(gvt->dev_priv, 9) &&
|| IS_COFFEELAKE(s->vgpu->gvt->dev_priv)) &&
intel_gvt_mmio_is_in_ctx(gvt, offset) && intel_gvt_mmio_is_in_ctx(gvt, offset) &&
!strncmp(cmd, "lri", 3)) { !strncmp(cmd, "lri", 3)) {
intel_gvt_hypervisor_read_gpa(s->vgpu, intel_gvt_hypervisor_read_gpa(s->vgpu,
......
...@@ -392,10 +392,7 @@ static void switch_mocs(struct intel_vgpu *pre, struct intel_vgpu *next, ...@@ -392,10 +392,7 @@ static void switch_mocs(struct intel_vgpu *pre, struct intel_vgpu *next,
if (WARN_ON(ring_id >= ARRAY_SIZE(regs))) if (WARN_ON(ring_id >= ARRAY_SIZE(regs)))
return; return;
if (ring_id == RCS0 && if (ring_id == RCS0 && IS_GEN(dev_priv, 9))
(IS_KABYLAKE(dev_priv) ||
IS_BROXTON(dev_priv) ||
IS_COFFEELAKE(dev_priv)))
return; return;
if (!pre && !gen9_render_mocs.initialized) if (!pre && !gen9_render_mocs.initialized)
...@@ -470,11 +467,10 @@ static void switch_mmio(struct intel_vgpu *pre, ...@@ -470,11 +467,10 @@ static void switch_mmio(struct intel_vgpu *pre,
continue; continue;
/* /*
* No need to do save or restore of the mmio which is in context * No need to do save or restore of the mmio which is in context
* state image on kabylake, it's initialized by lri command and * state image on gen9, it's initialized by lri command and
* save or restore with context together. * save or restore with context together.
*/ */
if ((IS_KABYLAKE(dev_priv) || IS_BROXTON(dev_priv) if (IS_GEN(dev_priv, 9) && mmio->in_context)
|| IS_COFFEELAKE(dev_priv)) && mmio->in_context)
continue; continue;
// save // save
......
...@@ -300,9 +300,7 @@ static int copy_workload_to_ring_buffer(struct intel_vgpu_workload *workload) ...@@ -300,9 +300,7 @@ static int copy_workload_to_ring_buffer(struct intel_vgpu_workload *workload)
u32 *cs; u32 *cs;
int err; int err;
if ((IS_KABYLAKE(req->i915) || IS_BROXTON(req->i915) if (IS_GEN(req->i915, 9) && is_inhibit_context(req->hw_context))
|| IS_COFFEELAKE(req->i915))
&& is_inhibit_context(req->hw_context))
intel_vgpu_restore_inhibit_context(vgpu, req); intel_vgpu_restore_inhibit_context(vgpu, req);
/* /*
......
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