Commit df5d5a93 authored by Andrzej Hajda's avatar Andrzej Hajda Committed by Krzysztof Kozlowski

arm64: dts: exynos: Fix addresses in node names on Exynos5433

Address should not contain 0x prefix.
Signed-off-by: default avatarAndrzej Hajda <a.hajda@samsung.com>
Reviewed-by: default avatarAndi Shyti <andi.shyti@samsung.com>
Reviewed-by: default avatarJavier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
parent 83089bb9
...@@ -299,7 +299,7 @@ cmu_peric: clock-controller@14c80000 { ...@@ -299,7 +299,7 @@ cmu_peric: clock-controller@14c80000 {
#clock-cells = <1>; #clock-cells = <1>;
}; };
cmu_peris: clock-controller@0x10040000 { cmu_peris: clock-controller@10040000 {
compatible = "samsung,exynos5433-cmu-peris"; compatible = "samsung,exynos5433-cmu-peris";
reg = <0x10040000 0x1000>; reg = <0x10040000 0x1000>;
#clock-cells = <1>; #clock-cells = <1>;
...@@ -892,7 +892,7 @@ mfc: codec@152E0000 { ...@@ -892,7 +892,7 @@ mfc: codec@152E0000 {
iommu-names = "left", "right"; iommu-names = "left", "right";
}; };
sysmmu_decon0x: sysmmu@0x13a00000 { sysmmu_decon0x: sysmmu@13a00000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x13a00000 0x1000>; reg = <0x13a00000 0x1000>;
interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
...@@ -902,7 +902,7 @@ sysmmu_decon0x: sysmmu@0x13a00000 { ...@@ -902,7 +902,7 @@ sysmmu_decon0x: sysmmu@0x13a00000 {
#iommu-cells = <0>; #iommu-cells = <0>;
}; };
sysmmu_decon1x: sysmmu@0x13a10000 { sysmmu_decon1x: sysmmu@13a10000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x13a10000 0x1000>; reg = <0x13a10000 0x1000>;
interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
...@@ -912,7 +912,7 @@ sysmmu_decon1x: sysmmu@0x13a10000 { ...@@ -912,7 +912,7 @@ sysmmu_decon1x: sysmmu@0x13a10000 {
#iommu-cells = <0>; #iommu-cells = <0>;
}; };
sysmmu_gscl0: sysmmu@0x13C80000 { sysmmu_gscl0: sysmmu@13c80000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x13C80000 0x1000>; reg = <0x13C80000 0x1000>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
...@@ -922,7 +922,7 @@ sysmmu_gscl0: sysmmu@0x13C80000 { ...@@ -922,7 +922,7 @@ sysmmu_gscl0: sysmmu@0x13C80000 {
#iommu-cells = <0>; #iommu-cells = <0>;
}; };
sysmmu_gscl1: sysmmu@0x13C90000 { sysmmu_gscl1: sysmmu@13c90000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x13C90000 0x1000>; reg = <0x13C90000 0x1000>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
...@@ -932,7 +932,7 @@ sysmmu_gscl1: sysmmu@0x13C90000 { ...@@ -932,7 +932,7 @@ sysmmu_gscl1: sysmmu@0x13C90000 {
#iommu-cells = <0>; #iommu-cells = <0>;
}; };
sysmmu_gscl2: sysmmu@0x13CA0000 { sysmmu_gscl2: sysmmu@13ca0000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x13CA0000 0x1000>; reg = <0x13CA0000 0x1000>;
interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>;
...@@ -942,7 +942,7 @@ sysmmu_gscl2: sysmmu@0x13CA0000 { ...@@ -942,7 +942,7 @@ sysmmu_gscl2: sysmmu@0x13CA0000 {
#iommu-cells = <0>; #iommu-cells = <0>;
}; };
sysmmu_jpeg: sysmmu@0x15060000 { sysmmu_jpeg: sysmmu@15060000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x15060000 0x1000>; reg = <0x15060000 0x1000>;
interrupts = <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
...@@ -952,7 +952,7 @@ sysmmu_jpeg: sysmmu@0x15060000 { ...@@ -952,7 +952,7 @@ sysmmu_jpeg: sysmmu@0x15060000 {
#iommu-cells = <0>; #iommu-cells = <0>;
}; };
sysmmu_mfc_0: sysmmu@0x15200000 { sysmmu_mfc_0: sysmmu@15200000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x15200000 0x1000>; reg = <0x15200000 0x1000>;
interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
...@@ -962,7 +962,7 @@ sysmmu_mfc_0: sysmmu@0x15200000 { ...@@ -962,7 +962,7 @@ sysmmu_mfc_0: sysmmu@0x15200000 {
#iommu-cells = <0>; #iommu-cells = <0>;
}; };
sysmmu_mfc_1: sysmmu@0x15210000 { sysmmu_mfc_1: sysmmu@15210000 {
compatible = "samsung,exynos-sysmmu"; compatible = "samsung,exynos-sysmmu";
reg = <0x15210000 0x1000>; reg = <0x15210000 0x1000>;
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
......
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