Commit df8b1a5e authored by Paul Burton's avatar Paul Burton Committed by Ralf Baechle

MIPS: Add M6250 PRID & cpu_type_enum values

Define the processor ID for the M6250 CPU and add a value to the enum
cpu_type_enum for the core.

[ralf@linux-mips.org: Fix merge conflict.]
Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Cc: Joshua Kinard <kumba@gentoo.org>
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12373/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent eba20a3a
...@@ -122,6 +122,7 @@ ...@@ -122,6 +122,7 @@
#define PRID_IMP_M5150 0xa700 #define PRID_IMP_M5150 0xa700
#define PRID_IMP_P5600 0xa800 #define PRID_IMP_P5600 0xa800
#define PRID_IMP_I6400 0xa900 #define PRID_IMP_I6400 0xa900
#define PRID_IMP_M6250 0xab00
/* /*
* These are the PRID's for when 23:16 == PRID_COMP_SIBYTE * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE
...@@ -311,7 +312,7 @@ enum cpu_type_enum { ...@@ -311,7 +312,7 @@ enum cpu_type_enum {
CPU_ALCHEMY, CPU_PR4450, CPU_BMIPS32, CPU_BMIPS3300, CPU_BMIPS4350, CPU_ALCHEMY, CPU_PR4450, CPU_BMIPS32, CPU_BMIPS3300, CPU_BMIPS4350,
CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC, CPU_LOONGSON1, CPU_M14KC, CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC, CPU_LOONGSON1, CPU_M14KC,
CPU_M14KEC, CPU_INTERAPTIV, CPU_P5600, CPU_PROAPTIV, CPU_1074K, CPU_M14KEC, CPU_INTERAPTIV, CPU_P5600, CPU_PROAPTIV, CPU_1074K,
CPU_M5150, CPU_I6400, CPU_P6600, CPU_M5150, CPU_I6400, CPU_P6600, CPU_M6250,
/* /*
* MIPS64 class processors * MIPS64 class processors
......
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