Commit dfce1bab authored by Marcin Wojtas's avatar Marcin Wojtas Committed by David S. Miller

net: mvpp2: enable using phylink with ACPI

Now that the MDIO and phylink are supported in the ACPI
world, enable to use them in the mvpp2 driver. Ensure a backward
compatibility with the firmware whose ACPI description does
not contain the necessary elements for the proper phy handling
and fall back to relying on the link interrupts instead.
Signed-off-by: default avatarMarcin Wojtas <mw@semihalf.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent c54da4c1
...@@ -4793,9 +4793,8 @@ static int mvpp2_open(struct net_device *dev) ...@@ -4793,9 +4793,8 @@ static int mvpp2_open(struct net_device *dev)
goto err_cleanup_txqs; goto err_cleanup_txqs;
} }
/* Phylink isn't supported yet in ACPI mode */ if (port->phylink) {
if (port->of_node) { err = phylink_fwnode_phy_connect(port->phylink, port->fwnode, 0);
err = phylink_of_phy_connect(port->phylink, port->of_node, 0);
if (err) { if (err) {
netdev_err(port->dev, "could not attach PHY (%d)\n", netdev_err(port->dev, "could not attach PHY (%d)\n",
err); err);
...@@ -6703,6 +6702,19 @@ static void mvpp2_acpi_start(struct mvpp2_port *port) ...@@ -6703,6 +6702,19 @@ static void mvpp2_acpi_start(struct mvpp2_port *port)
SPEED_UNKNOWN, DUPLEX_UNKNOWN, false, false); SPEED_UNKNOWN, DUPLEX_UNKNOWN, false, false);
} }
/* In order to ensure backward compatibility for ACPI, check if the port
* firmware node comprises the necessary description allowing to use phylink.
*/
static bool mvpp2_use_acpi_compat_mode(struct fwnode_handle *port_fwnode)
{
if (!is_acpi_node(port_fwnode))
return false;
return (!fwnode_property_present(port_fwnode, "phy-handle") &&
!fwnode_property_present(port_fwnode, "managed") &&
!fwnode_get_named_child_node(port_fwnode, "fixed-link"));
}
/* Ports initialization */ /* Ports initialization */
static int mvpp2_port_probe(struct platform_device *pdev, static int mvpp2_port_probe(struct platform_device *pdev,
struct fwnode_handle *port_fwnode, struct fwnode_handle *port_fwnode,
...@@ -6921,8 +6933,7 @@ static int mvpp2_port_probe(struct platform_device *pdev, ...@@ -6921,8 +6933,7 @@ static int mvpp2_port_probe(struct platform_device *pdev,
dev->max_mtu = MVPP2_BM_JUMBO_PKT_SIZE; dev->max_mtu = MVPP2_BM_JUMBO_PKT_SIZE;
dev->dev.of_node = port_node; dev->dev.of_node = port_node;
/* Phylink isn't used w/ ACPI as of now */ if (!mvpp2_use_acpi_compat_mode(port_fwnode)) {
if (port_node) {
port->phylink_config.dev = &dev->dev; port->phylink_config.dev = &dev->dev;
port->phylink_config.type = PHYLINK_NETDEV; port->phylink_config.type = PHYLINK_NETDEV;
...@@ -6934,6 +6945,7 @@ static int mvpp2_port_probe(struct platform_device *pdev, ...@@ -6934,6 +6945,7 @@ static int mvpp2_port_probe(struct platform_device *pdev,
} }
port->phylink = phylink; port->phylink = phylink;
} else { } else {
dev_warn(&pdev->dev, "Use link irqs for port#%d. FW update required\n", port->id);
port->phylink = NULL; port->phylink = NULL;
} }
......
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