Commit dfe2a4cf authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'uniphier-dt64-v5.9' of...

Merge tag 'uniphier-dt64-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into arm/dt

UniPhier ARM64 SoC DT updates for v5.9

- add missing interrupts property to support card serial

- fix node names to follow the DT schema

- add clock-names and reset-names to pcie-phy

* tag 'uniphier-dt64-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
  arm64: dts: uniphier: Add missing clock-names and reset-names to pcie-phy
  arm64: dts: uniphier: Rename ethphy node to ethernet-phy
  arm64: dts: uniphier: give fixed port number to support card serial
  arm64: dts: uniphier: add interrupts to support card serial

Link: https://lore.kernel.org/r/CAK7LNARK4SKhSW-xwgc3vq7FO7N864jPgzm8NtsGOv8wVFVyBQ@mail.gmail.comSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 056a7ecf e6bd81a2
......@@ -157,7 +157,7 @@ &eth {
};
&mdio {
ethphy: ethphy@1 {
ethphy: ethernet-phy@1 {
reg = <1>;
};
};
......
......@@ -20,7 +20,7 @@ chosen {
aliases {
serial0 = &serial0;
serial1 = &serial1;
serial1 = &serialsc;
serial2 = &serial2;
serial3 = &serial3;
i2c0 = &i2c0;
......@@ -42,6 +42,10 @@ &ethsc {
interrupts = <0 8>;
};
&serialsc {
interrupts = <0 8>;
};
&serial0 {
status = "okay";
};
......@@ -76,7 +80,7 @@ &eth {
};
&mdio {
ethphy: ethphy@1 {
ethphy: ethernet-phy@1 {
reg = <1>;
};
};
......@@ -153,7 +153,7 @@ &eth {
};
&mdio {
ethphy: ethphy@0 {
ethphy: ethernet-phy@0 {
reg = <0>;
};
};
......
......@@ -141,7 +141,7 @@ &eth {
};
&mdio {
ethphy: ethphy@1 {
ethphy: ethernet-phy@1 {
reg = <1>;
};
};
......
......@@ -20,7 +20,7 @@ chosen {
aliases {
serial0 = &serial0;
serial1 = &serial1;
serial1 = &serialsc;
serial2 = &serial2;
serial3 = &serial3;
i2c0 = &i2c0;
......@@ -42,6 +42,10 @@ &ethsc {
interrupts = <0 8>;
};
&serialsc {
interrupts = <0 8>;
};
&serial0 {
status = "okay";
};
......@@ -64,7 +68,7 @@ &eth {
};
&mdio {
ethphy: ethphy@0 {
ethphy: ethernet-phy@0 {
reg = <0>;
};
};
......
......@@ -936,7 +936,9 @@ pcie_phy: phy@66038000 {
compatible = "socionext,uniphier-ld20-pcie-phy";
reg = <0x66038000 0x4000>;
#phy-cells = <0>;
clock-names = "link";
clocks = <&sys_clk 24>;
reset-names = "link";
resets = <&sys_rst 24>;
socionext,syscon = <&soc_glue>;
};
......
......@@ -19,7 +19,7 @@ chosen {
aliases {
serial0 = &serial0;
serial1 = &serial1;
serial1 = &serialsc;
serial2 = &serial2;
serial3 = &serial3;
i2c0 = &i2c0;
......@@ -43,6 +43,10 @@ &ethsc {
interrupts = <4 8>;
};
&serialsc {
interrupts = <4 8>;
};
&spi0 {
status = "okay";
};
......@@ -97,7 +101,7 @@ &eth0 {
};
&mdio0 {
ethphy0: ethphy@0 {
ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
......@@ -108,7 +112,7 @@ &eth1 {
};
&mdio1 {
ethphy1: ethphy@0 {
ethphy1: ethernet-phy@0 {
reg = <0>;
};
};
......
......@@ -833,7 +833,9 @@ pcie_phy: phy@66038000 {
compatible = "socionext,uniphier-pxs3-pcie-phy";
reg = <0x66038000 0x4000>;
#phy-cells = <0>;
clock-names = "link";
clocks = <&sys_clk 24>;
reset-names = "link";
resets = <&sys_rst 24>;
socionext,syscon = <&soc_glue>;
};
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment