Commit e18b8295 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Bjorn Andersson

arm64: dts: qcom: drop redundant line breaks

Remove trailing, redundant line breaks.
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230306081430.28491-2-krzysztof.kozlowski@linaro.org
parent e225d560
...@@ -1137,7 +1137,6 @@ &usb3phy { ...@@ -1137,7 +1137,6 @@ &usb3phy {
vdda-phy-supply = <&vreg_l28a_0p925>; vdda-phy-supply = <&vreg_l28a_0p925>;
vdda-pll-supply = <&vreg_l12a_1p8>; vdda-pll-supply = <&vreg_l12a_1p8>;
}; };
&venus { &venus {
......
...@@ -2180,7 +2180,6 @@ modem_alert0: trip-point0 { ...@@ -2180,7 +2180,6 @@ modem_alert0: trip-point0 {
}; };
}; };
}; };
}; };
timer { timer {
......
...@@ -1882,7 +1882,6 @@ pcie0: pcie@600000 { ...@@ -1882,7 +1882,6 @@ pcie0: pcie@600000 {
"cfg", "cfg",
"bus_master", "bus_master",
"bus_slave"; "bus_slave";
}; };
pcie1: pcie@608000 { pcie1: pcie@608000 {
...@@ -3471,7 +3470,6 @@ q6routing: routing { ...@@ -3471,7 +3470,6 @@ q6routing: routing {
}; };
}; };
}; };
}; };
}; };
......
...@@ -3027,7 +3027,6 @@ opp-460000000 { ...@@ -3027,7 +3027,6 @@ opp-460000000 {
required-opps = <&rpmhpd_opp_nom>; required-opps = <&rpmhpd_opp_nom>;
}; };
}; };
}; };
dsi0: dsi@ae94000 { dsi0: dsi@ae94000 {
......
...@@ -943,7 +943,6 @@ opp-384000000 { ...@@ -943,7 +943,6 @@ opp-384000000 {
opp-avg-kBps = <390000 0>; opp-avg-kBps = <390000 0>;
}; };
}; };
}; };
gpi_dma0: dma-controller@900000 { gpi_dma0: dma-controller@900000 {
...@@ -3298,7 +3297,6 @@ opp-202000000 { ...@@ -3298,7 +3297,6 @@ opp-202000000 {
opp-avg-kBps = <200000 0>; opp-avg-kBps = <200000 0>;
}; };
}; };
}; };
usb_1_hsphy: phy@88e3000 { usb_1_hsphy: phy@88e3000 {
...@@ -3767,7 +3765,6 @@ opp-460000048 { ...@@ -3767,7 +3765,6 @@ opp-460000048 {
required-opps = <&rpmhpd_opp_turbo>; required-opps = <&rpmhpd_opp_turbo>;
}; };
}; };
}; };
videocc: clock-controller@aaf0000 { videocc: clock-controller@aaf0000 {
......
...@@ -2781,7 +2781,6 @@ data-pins { ...@@ -2781,7 +2781,6 @@ data-pins {
drive-strength = <2>; drive-strength = <2>;
slew-rate = <1>; slew-rate = <1>;
bias-bus-hold; bias-bus-hold;
}; };
}; };
...@@ -4413,7 +4412,6 @@ opp-810000000 { ...@@ -4413,7 +4412,6 @@ opp-810000000 {
required-opps = <&rpmhpd_opp_nom>; required-opps = <&rpmhpd_opp_nom>;
}; };
}; };
}; };
mdss1_dp1: displayport-controller@22098000 { mdss1_dp1: displayport-controller@22098000 {
......
...@@ -395,7 +395,6 @@ vreg_bob: bob { ...@@ -395,7 +395,6 @@ vreg_bob: bob {
regulator-enable-ramp-delay = <500>; regulator-enable-ramp-delay = <500>;
}; };
}; };
}; };
&gcc { &gcc {
......
...@@ -45,7 +45,6 @@ &sound { ...@@ -45,7 +45,6 @@ &sound {
"AMIC3", "MIC BIAS4", "AMIC3", "MIC BIAS4",
"AMIC4", "MIC BIAS1", "AMIC4", "MIC BIAS1",
"AMIC5", "MIC BIAS3"; "AMIC5", "MIC BIAS3";
}; };
/* /*
......
...@@ -233,7 +233,6 @@ pm6150l_l6: ldo6 { ...@@ -233,7 +233,6 @@ pm6150l_l6: ldo6 {
regulator-allow-set-load; regulator-allow-set-load;
regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>; RPMH_REGULATOR_MODE_HPM>;
}; };
pm6150l_l7: ldo7 { pm6150l_l7: ldo7 {
...@@ -255,7 +254,6 @@ pm6150l_l9: ldo9 { ...@@ -255,7 +254,6 @@ pm6150l_l9: ldo9 {
regulator-allow-set-load; regulator-allow-set-load;
regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>; RPMH_REGULATOR_MODE_HPM>;
}; };
pm6150l_l10: ldo10 { pm6150l_l10: ldo10 {
......
...@@ -176,7 +176,6 @@ L2_500: l2-cache { ...@@ -176,7 +176,6 @@ L2_500: l2-cache {
cache-level = <2>; cache-level = <2>;
next-level-cache = <&L3_0>; next-level-cache = <&L3_0>;
}; };
}; };
CPU6: cpu@600 { CPU6: cpu@600 {
...@@ -888,7 +887,6 @@ i2c10: i2c@990000 { ...@@ -888,7 +887,6 @@ i2c10: i2c@990000 {
interconnect-names = "qup-core", "qup-config", "qup-memory"; interconnect-names = "qup-core", "qup-config", "qup-memory";
status = "disabled"; status = "disabled";
}; };
}; };
config_noc: interconnect@1500000 { config_noc: interconnect@1500000 {
......
...@@ -139,7 +139,6 @@ L2_500: l2-cache { ...@@ -139,7 +139,6 @@ L2_500: l2-cache {
compatible = "cache"; compatible = "cache";
next-level-cache = <&L3_0>; next-level-cache = <&L3_0>;
}; };
}; };
CPU6: cpu@600 { CPU6: cpu@600 {
......
...@@ -92,7 +92,6 @@ L2_100: l2-cache { ...@@ -92,7 +92,6 @@ L2_100: l2-cache {
cache-level = <2>; cache-level = <2>;
next-level-cache = <&L3_0>; next-level-cache = <&L3_0>;
}; };
}; };
CPU2: cpu@200 { CPU2: cpu@200 {
......
...@@ -247,7 +247,6 @@ L2_500: l2-cache { ...@@ -247,7 +247,6 @@ L2_500: l2-cache {
cache-unified; cache-unified;
next-level-cache = <&L3_0>; next-level-cache = <&L3_0>;
}; };
}; };
CPU6: cpu@600 { CPU6: cpu@600 {
...@@ -2428,7 +2427,6 @@ data-pins { ...@@ -2428,7 +2427,6 @@ data-pins {
drive-strength = <2>; drive-strength = <2>;
slew-rate = <1>; slew-rate = <1>;
bias-bus-hold; bias-bus-hold;
}; };
}; };
...@@ -2447,7 +2445,6 @@ data-pins { ...@@ -2447,7 +2445,6 @@ data-pins {
drive-strength = <2>; drive-strength = <2>;
input-enable; input-enable;
bias-pull-down; bias-pull-down;
}; };
}; };
...@@ -3022,7 +3019,6 @@ funnel_swao_in_funnel_merg: endpoint { ...@@ -3022,7 +3019,6 @@ funnel_swao_in_funnel_merg: endpoint {
}; };
}; };
}; };
}; };
etf@6b05000 { etf@6b05000 {
......
...@@ -678,7 +678,6 @@ wake-pins { ...@@ -678,7 +678,6 @@ wake-pins {
bias-pull-up; bias-pull-up;
}; };
}; };
}; };
&uart2 { &uart2 {
......
...@@ -155,7 +155,6 @@ L2_500: l2-cache { ...@@ -155,7 +155,6 @@ L2_500: l2-cache {
cache-level = <2>; cache-level = <2>;
next-level-cache = <&L3_0>; next-level-cache = <&L3_0>;
}; };
}; };
CPU6: cpu@600 { CPU6: cpu@600 {
......
...@@ -377,7 +377,6 @@ vreg_l3h_0p91: ldo3 { ...@@ -377,7 +377,6 @@ vreg_l3h_0p91: ldo3 {
regulator-max-microvolt = <912000>; regulator-max-microvolt = <912000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
}; };
}; };
regulators-3 { regulators-3 {
......
...@@ -282,7 +282,6 @@ vreg_l3h_0p91: ldo3 { ...@@ -282,7 +282,6 @@ vreg_l3h_0p91: ldo3 {
regulator-max-microvolt = <912000>; regulator-max-microvolt = <912000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
}; };
}; };
regulators-3 { regulators-3 {
......
...@@ -154,7 +154,6 @@ L2_500: l2-cache { ...@@ -154,7 +154,6 @@ L2_500: l2-cache {
cache-level = <2>; cache-level = <2>;
next-level-cache = <&L3_0>; next-level-cache = <&L3_0>;
}; };
}; };
CPU6: cpu@600 { CPU6: cpu@600 {
...@@ -2762,7 +2761,6 @@ dpu_intf2_out: endpoint { ...@@ -2762,7 +2761,6 @@ dpu_intf2_out: endpoint {
remote-endpoint = <&mdss_dsi1_in>; remote-endpoint = <&mdss_dsi1_in>;
}; };
}; };
}; };
mdp_opp_table: opp-table { mdp_opp_table: opp-table {
...@@ -3569,7 +3567,6 @@ qup_uart20_default: qup-uart20-default-state { ...@@ -3569,7 +3567,6 @@ qup_uart20_default: qup-uart20-default-state {
pins = "gpio76", "gpio77", "gpio78", "gpio79"; pins = "gpio76", "gpio77", "gpio78", "gpio79";
function = "qup20"; function = "qup20";
}; };
}; };
lpass_tlmm: pinctrl@3440000 { lpass_tlmm: pinctrl@3440000 {
......
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