Commit e1d91dda authored by Sherry Sun's avatar Sherry Sun Committed by Greg Kroah-Hartman

tty: serial: fsl_lpuart: only enable Idle Line Interrupt for non-dma case

For the lpuart driver, the Idle Line Interrupt Enable now is only needed
for the CPU mode, so enable the UARTCTRL_ILIE at the correct place, and
clear it when shutdown.

Also need to configure the suitable UARTCTRL_IDLECFG, now the value is
0x7, represent 128 idle characters will trigger the Idle Line Interrupt.
Signed-off-by: default avatarSherry Sun <sherry.sun@nxp.com>
Link: https://lore.kernel.org/r/20221125101953.18753-2-sherry.sun@nxp.comSigned-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 7370a25f
...@@ -5,6 +5,8 @@ ...@@ -5,6 +5,8 @@
* Copyright 2012-2014 Freescale Semiconductor, Inc. * Copyright 2012-2014 Freescale Semiconductor, Inc.
*/ */
#include <linux/bitfield.h>
#include <linux/bits.h>
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/console.h> #include <linux/console.h>
#include <linux/delay.h> #include <linux/delay.h>
...@@ -181,7 +183,7 @@ ...@@ -181,7 +183,7 @@
#define UARTCTRL_SBK 0x00010000 #define UARTCTRL_SBK 0x00010000
#define UARTCTRL_MA1IE 0x00008000 #define UARTCTRL_MA1IE 0x00008000
#define UARTCTRL_MA2IE 0x00004000 #define UARTCTRL_MA2IE 0x00004000
#define UARTCTRL_IDLECFG 0x00000100 #define UARTCTRL_IDLECFG GENMASK(10, 8)
#define UARTCTRL_LOOPS 0x00000080 #define UARTCTRL_LOOPS 0x00000080
#define UARTCTRL_DOZEEN 0x00000040 #define UARTCTRL_DOZEEN 0x00000040
#define UARTCTRL_RSRC 0x00000020 #define UARTCTRL_RSRC 0x00000020
...@@ -1523,7 +1525,7 @@ static void lpuart32_setup_watermark(struct lpuart_port *sport) ...@@ -1523,7 +1525,7 @@ static void lpuart32_setup_watermark(struct lpuart_port *sport)
ctrl = lpuart32_read(&sport->port, UARTCTRL); ctrl = lpuart32_read(&sport->port, UARTCTRL);
ctrl_saved = ctrl; ctrl_saved = ctrl;
ctrl &= ~(UARTCTRL_TIE | UARTCTRL_TCIE | UARTCTRL_TE | ctrl &= ~(UARTCTRL_TIE | UARTCTRL_TCIE | UARTCTRL_TE |
UARTCTRL_RIE | UARTCTRL_RE); UARTCTRL_RIE | UARTCTRL_RE | UARTCTRL_ILIE);
lpuart32_write(&sport->port, ctrl, UARTCTRL); lpuart32_write(&sport->port, ctrl, UARTCTRL);
/* enable FIFO mode */ /* enable FIFO mode */
...@@ -1547,7 +1549,8 @@ static void lpuart32_setup_watermark_enable(struct lpuart_port *sport) ...@@ -1547,7 +1549,8 @@ static void lpuart32_setup_watermark_enable(struct lpuart_port *sport)
lpuart32_setup_watermark(sport); lpuart32_setup_watermark(sport);
temp = lpuart32_read(&sport->port, UARTCTRL); temp = lpuart32_read(&sport->port, UARTCTRL);
temp |= UARTCTRL_RE | UARTCTRL_TE | UARTCTRL_ILIE; temp |= UARTCTRL_RE | UARTCTRL_TE;
temp |= FIELD_PREP(UARTCTRL_IDLECFG, 0x7);
lpuart32_write(&sport->port, temp, UARTCTRL); lpuart32_write(&sport->port, temp, UARTCTRL);
} }
...@@ -1691,7 +1694,7 @@ static void lpuart32_configure(struct lpuart_port *sport) ...@@ -1691,7 +1694,7 @@ static void lpuart32_configure(struct lpuart_port *sport)
} }
temp = lpuart32_read(&sport->port, UARTCTRL); temp = lpuart32_read(&sport->port, UARTCTRL);
if (!sport->lpuart_dma_rx_use) if (!sport->lpuart_dma_rx_use)
temp |= UARTCTRL_RIE; temp |= UARTCTRL_RIE | UARTCTRL_ILIE;
if (!sport->lpuart_dma_tx_use) if (!sport->lpuart_dma_tx_use)
temp |= UARTCTRL_TIE; temp |= UARTCTRL_TIE;
lpuart32_write(&sport->port, temp, UARTCTRL); lpuart32_write(&sport->port, temp, UARTCTRL);
...@@ -1798,7 +1801,7 @@ static void lpuart32_shutdown(struct uart_port *port) ...@@ -1798,7 +1801,7 @@ static void lpuart32_shutdown(struct uart_port *port)
/* disable Rx/Tx and interrupts */ /* disable Rx/Tx and interrupts */
temp = lpuart32_read(port, UARTCTRL); temp = lpuart32_read(port, UARTCTRL);
temp &= ~(UARTCTRL_TE | UARTCTRL_RE | temp &= ~(UARTCTRL_TE | UARTCTRL_RE | UARTCTRL_ILIE |
UARTCTRL_TIE | UARTCTRL_TCIE | UARTCTRL_RIE); UARTCTRL_TIE | UARTCTRL_TCIE | UARTCTRL_RIE);
lpuart32_write(port, temp, UARTCTRL); lpuart32_write(port, temp, UARTCTRL);
......
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