Commit e1e2f6e4 authored by Florian Fainelli's avatar Florian Fainelli Committed by Russell King

ARM: 8276/1: Make CPU_DCACHE_DISABLE depend on !SMP

Enabling CPU_DCACHE_DISABLE on a SMP capable system will prevent the
kernel from booting because of the following ldrex instruction in
arch_spin_lock:

(gdb) x/10i $pc
=> 0xc053cfa8 <_raw_spin_lock+4>:       ldrex   r3, [r0]
   0xc053cfac <_raw_spin_lock+8>:       add     r2, r3, #65536  ; 0x10000

which is taken by the very first printk call:

    at /home/fainelli/work/linux/arch/arm/include/asm/spinlock.h:65
    fmt=0xc0637650 " 01 66Booting Linux on physical CPU 0x%xn", args=<incomplete type>)
    at kernel/printk/printk.c:1525
    fmt=0xc05370f4 <printk+52> " 24320215342 04340235344 20320215342 36377/341 17") at kernel/printk/printk.c:1688

ldrex requires exclusive monitor(s) (local or global) which are no longer
working when the Data cache is disabled in CP15 and will just hang the CPU
there.
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 49f28aa6
...@@ -738,7 +738,7 @@ config CPU_ICACHE_DISABLE ...@@ -738,7 +738,7 @@ config CPU_ICACHE_DISABLE
config CPU_DCACHE_DISABLE config CPU_DCACHE_DISABLE
bool "Disable D-Cache (C-bit)" bool "Disable D-Cache (C-bit)"
depends on CPU_CP15 depends on CPU_CP15 && !SMP
help help
Say Y here to disable the processor data cache. Unless Say Y here to disable the processor data cache. Unless
you have a reason not to or are unsure, say N. you have a reason not to or are unsure, say N.
......
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