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Kirill Smelkov
linux
Commits
e1ff5fe0
Commit
e1ff5fe0
authored
May 24, 2004
by
Linus Torvalds
Browse files
Options
Browse Files
Download
Plain Diff
Merge
bk://bk.arm.linux.org.uk/linux-2.6-rmk
into ppc970.osdl.org:/home/torvalds/v2.6/linux
parents
91d7f4e3
9878e2f8
Changes
32
Hide whitespace changes
Inline
Side-by-side
Showing
32 changed files
with
287 additions
and
245 deletions
+287
-245
arch/arm/Kconfig
arch/arm/Kconfig
+8
-8
arch/arm/common/dmabounce.c
arch/arm/common/dmabounce.c
+1
-0
arch/arm/kernel/arch.c
arch/arm/kernel/arch.c
+0
-1
arch/arm/mach-adifcc/irq.c
arch/arm/mach-adifcc/irq.c
+0
-2
arch/arm/mach-iop3xx/iop310-irq.c
arch/arm/mach-iop3xx/iop310-irq.c
+0
-2
arch/arm/mach-iop3xx/iop321-time.c
arch/arm/mach-iop3xx/iop321-time.c
+0
-1
arch/arm/mach-iop3xx/iq80310-irq.c
arch/arm/mach-iop3xx/iq80310-irq.c
+0
-2
arch/arm/mach-iop3xx/iq80310-time.c
arch/arm/mach-iop3xx/iq80310-time.c
+0
-1
arch/arm/mach-iop3xx/mm-321.c
arch/arm/mach-iop3xx/mm-321.c
+0
-1
arch/arm/mach-iop3xx/mm.c
arch/arm/mach-iop3xx/mm.c
+0
-1
arch/arm/mach-iop3xx/xs80200-irq.c
arch/arm/mach-iop3xx/xs80200-irq.c
+0
-2
arch/arm/mach-ixp4xx/common.c
arch/arm/mach-ixp4xx/common.c
+0
-1
arch/arm/mach-omap/bus.c
arch/arm/mach-omap/bus.c
+0
-1
arch/arm/mach-pxa/generic.c
arch/arm/mach-pxa/generic.c
+1
-0
arch/arm/mach-pxa/lubbock.c
arch/arm/mach-pxa/lubbock.c
+33
-1
arch/arm/mach-s3c2410/s3c2410.c
arch/arm/mach-s3c2410/s3c2410.c
+0
-1
drivers/input/serio/sa1111ps2.c
drivers/input/serio/sa1111ps2.c
+1
-4
drivers/pcmcia/pxa2xx_lubbock.c
drivers/pcmcia/pxa2xx_lubbock.c
+170
-155
drivers/pcmcia/sa1111_generic.c
drivers/pcmcia/sa1111_generic.c
+1
-1
drivers/pcmcia/sa1111_generic.h
drivers/pcmcia/sa1111_generic.h
+1
-1
drivers/serial/pxa.c
drivers/serial/pxa.c
+11
-12
drivers/usb/gadget/pxa2xx_udc.c
drivers/usb/gadget/pxa2xx_udc.c
+1
-0
drivers/video/pxafb.c
drivers/video/pxafb.c
+20
-15
include/asm-arm/arch-ixp4xx/uncompress.h
include/asm-arm/arch-ixp4xx/uncompress.h
+1
-1
include/asm-arm/arch-lh7a40x/hardware.h
include/asm-arm/arch-lh7a40x/hardware.h
+0
-2
include/asm-arm/arch-omap/hardware.h
include/asm-arm/arch-omap/hardware.h
+0
-1
include/asm-arm/arch-omap/uncompress.h
include/asm-arm/arch-omap/uncompress.h
+0
-1
include/asm-arm/arch-pxa/hardware.h
include/asm-arm/arch-pxa/hardware.h
+0
-3
include/asm-arm/arch-pxa/lubbock.h
include/asm-arm/arch-pxa/lubbock.h
+3
-0
include/asm-arm/hardware/sa1111.h
include/asm-arm/hardware/sa1111.h
+0
-16
include/asm-arm/system.h
include/asm-arm/system.h
+34
-8
include/asm-arm/unistd.h
include/asm-arm/unistd.h
+1
-0
No files found.
arch/arm/Kconfig
View file @
e1ff5fe0
...
...
@@ -84,9 +84,6 @@ config ARCH_CLPS711X
config ARCH_CO285
bool "Co-EBSA285"
config ARCH_PXA
bool "PXA2xx-based"
config ARCH_EBSA110
bool "EBSA-110"
help
...
...
@@ -126,6 +123,9 @@ config ARCH_L7200
If you have any questions or comments about the Linux kernel port
to this board, send e-mail to sjhill@cotw.com.
config ARCH_PXA
bool "PXA2xx-based"
config ARCH_RPC
bool "RiscPC"
help
...
...
@@ -135,9 +135,6 @@ config ARCH_RPC
config ARCH_SA1100
bool "SA1100-based"
config ARCH_SHARK
bool "Shark"
config ARCH_S3C2410
bool "Samsung S3C2410"
help
...
...
@@ -145,8 +142,8 @@ config ARCH_S3C2410
BAST (http://www.simtec.co.uk/products/EB110ITX/), the IPAQ 1940 or
the Samsung SMDK2410 development board (and derviatives).
config ARCH_
OMAP
bool "
TI OMAP
"
config ARCH_
SHARK
bool "
Shark
"
config ARCH_LH7A40X
bool "Sharp LH7A40X"
...
...
@@ -156,6 +153,9 @@ config ARCH_LH7A40X
core with a wide array of integrated devices for
hand-held and low-power applications.
config ARCH_OMAP
bool "TI OMAP"
config ARCH_VERSATILE_PB
bool "Versatile PB"
help
...
...
arch/arm/common/dmabounce.c
View file @
e1ff5fe0
...
...
@@ -100,6 +100,7 @@ find_dmabounce_dev(struct device *dev)
if
(
d
->
dev
==
dev
)
return
d
;
}
return
NULL
;
}
...
...
arch/arm/kernel/arch.c
View file @
e1ff5fe0
...
...
@@ -10,7 +10,6 @@
#include <asm/elf.h>
#include <asm/page.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
unsigned
int
vram_size
;
...
...
arch/arm/mach-adifcc/irq.c
View file @
e1ff5fe0
...
...
@@ -19,8 +19,6 @@
#include <asm/irq.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
static
void
xs80200_irq_mask
(
unsigned
int
irq
)
{
long
INTCTL
;
...
...
arch/arm/mach-iop3xx/iop310-irq.c
View file @
e1ff5fe0
...
...
@@ -21,8 +21,6 @@
#include <asm/irq.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
extern
void
xs80200_irq_mask
(
unsigned
int
);
extern
void
xs80200_irq_unmask
(
unsigned
int
);
extern
void
xs80200_init_irq
(
void
);
...
...
arch/arm/mach-iop3xx/iop321-time.c
View file @
e1ff5fe0
...
...
@@ -23,7 +23,6 @@
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/uaccess.h>
#include <asm/mach-types.h>
#include <asm/mach/irq.h>
static
unsigned
long
iop321_gettimeoffset
(
void
)
...
...
arch/arm/mach-iop3xx/iq80310-irq.c
View file @
e1ff5fe0
...
...
@@ -22,8 +22,6 @@
#include <asm/hardware.h>
#include <asm/system.h>
#include <asm/mach-types.h>
extern
void
iop310_init_irq
(
void
);
extern
void
iop310_irq_demux
(
unsigned
int
,
struct
irqdesc
*
,
struct
pt_regs
*
);
...
...
arch/arm/mach-iop3xx/iq80310-time.c
View file @
e1ff5fe0
...
...
@@ -21,7 +21,6 @@
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/uaccess.h>
#include <asm/mach-types.h>
#include <asm/mach/irq.h>
static
void
iq80310_write_timer
(
u_long
val
)
...
...
arch/arm/mach-iop3xx/mm-321.c
View file @
e1ff5fe0
...
...
@@ -21,7 +21,6 @@
#include <asm/page.h>
#include <asm/mach/map.h>
#include <asm/mach-types.h>
/*
...
...
arch/arm/mach-iop3xx/mm.c
View file @
e1ff5fe0
...
...
@@ -23,7 +23,6 @@
#include <asm/page.h>
#include <asm/mach/map.h>
#include <asm/mach-types.h>
#ifdef CONFIG_IOP310_MU
#include "message.h"
...
...
arch/arm/mach-iop3xx/xs80200-irq.c
View file @
e1ff5fe0
...
...
@@ -17,8 +17,6 @@
#include <asm/irq.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
static
void
xs80200_irq_mask
(
unsigned
int
irq
)
{
unsigned
long
intctl
;
...
...
arch/arm/mach-ixp4xx/common.c
View file @
e1ff5fe0
...
...
@@ -30,7 +30,6 @@
#include <asm/hardware.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/mach-types.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/irq.h>
...
...
arch/arm/mach-omap/bus.c
View file @
e1ff5fe0
...
...
@@ -39,7 +39,6 @@
#include <linux/spinlock.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach/irq.h>
...
...
arch/arm/mach-pxa/generic.c
View file @
e1ff5fe0
...
...
@@ -104,6 +104,7 @@ static struct platform_device pxamci_device = {
.
id
=
0
,
.
dev
=
{
.
dma_mask
=
&
pxamci_dmamask
,
.
coherent_dma_mask
=
0xffffffff
,
},
.
num_resources
=
ARRAY_SIZE
(
pxamci_resources
),
.
resource
=
pxamci_resources
,
...
...
arch/arm/mach-pxa/lubbock.c
View file @
e1ff5fe0
...
...
@@ -11,11 +11,12 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/major.h>
#include <linux/f
s
.h>
#include <linux/f
b
.h>
#include <linux/interrupt.h>
#include <asm/setup.h>
...
...
@@ -29,11 +30,22 @@
#include <asm/mach/irq.h>
#include <asm/arch/udc.h>
#include <asm/arch/pxafb.h>
#include <asm/hardware/sa1111.h>
#include "generic.h"
void
lubbock_set_misc_wr
(
unsigned
int
mask
,
unsigned
int
set
)
{
unsigned
long
flags
;
local_irq_save
(
flags
);
LUB_MISC_WR
=
(
LUB_MISC_WR
&
~
mask
)
|
(
set
&
mask
);
local_irq_restore
(
flags
);
}
EXPORT_SYMBOL
(
lubbock_set_misc_wr
);
static
unsigned
long
lubbock_irq_enabled
;
static
void
lubbock_mask_irq
(
unsigned
int
irq
)
...
...
@@ -148,9 +160,29 @@ static struct platform_device *devices[] __initdata = {
&
smc91x_device
,
};
static
struct
pxafb_mach_info
sharp_lm8v31
__initdata
=
{
.
pixclock
=
270000
,
.
xres
=
640
,
.
yres
=
480
,
.
bpp
=
16
,
.
hsync_len
=
1
,
.
left_margin
=
3
,
.
right_margin
=
3
,
.
vsync_len
=
1
,
.
upper_margin
=
0
,
.
lower_margin
=
0
,
.
sync
=
FB_SYNC_HOR_HIGH_ACT
|
FB_SYNC_VERT_HIGH_ACT
,
.
cmap_greyscale
=
0
,
.
cmap_inverse
=
0
,
.
cmap_static
=
0
,
.
lccr0
=
LCCR0_SDS
,
.
lccr3
=
LCCR3_PCP
|
LCCR3_Acb
(
255
),
};
static
void
__init
lubbock_init
(
void
)
{
pxa_set_udc_info
(
&
udc_info
);
set_pxa_fb_info
(
&
sharp_lm8v31
);
(
void
)
platform_add_devices
(
devices
,
ARRAY_SIZE
(
devices
));
}
...
...
arch/arm/mach-s3c2410/s3c2410.c
View file @
e1ff5fe0
...
...
@@ -31,7 +31,6 @@
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <asm/arch/regs-clock.h>
#include <asm/arch/regs-serial.h>
...
...
drivers/input/serio/sa1111ps2.c
View file @
e1ff5fe0
...
...
@@ -45,7 +45,6 @@ static irqreturn_t ps2_rxint(int irq, void *dev_id, struct pt_regs *regs)
{
struct
ps2if
*
ps2if
=
dev_id
;
unsigned
int
scancode
,
flag
,
status
;
int
handled
=
IRQ_NONE
;
status
=
sa1111_readl
(
ps2if
->
base
+
SA1111_PS2STAT
);
while
(
status
&
PS2STAT_RXF
)
{
...
...
@@ -63,11 +62,9 @@ static irqreturn_t ps2_rxint(int irq, void *dev_id, struct pt_regs *regs)
serio_interrupt
(
&
ps2if
->
io
,
scancode
,
flag
,
regs
);
status
=
sa1111_readl
(
ps2if
->
base
+
SA1111_PS2STAT
);
handled
=
IRQ_HANDLED
;
}
return
handled
;
return
IRQ_HANDLED
;
}
/*
...
...
drivers/pcmcia/pxa2xx_lubbock.c
View file @
e1ff5fe0
...
...
@@ -20,9 +20,11 @@
#include <linux/device.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <asm/hardware.h>
#include <asm/hardware/sa1111.h>
#include <asm/mach-types.h>
#include "sa1111_generic.h"
...
...
@@ -30,156 +32,170 @@ static int
lubbock_pcmcia_configure_socket
(
struct
soc_pcmcia_socket
*
skt
,
const
socket_state_t
*
state
)
{
unsigned
long
flags
,
gpio
,
misc_wr
;
int
ret
=
1
;
struct
pcmcia_state
new_state
;
local_irq_save
(
flags
);
gpio
=
PA_DWR
;
misc_wr
=
LUB_MISC_WR
;
/* Lubbock uses the Maxim MAX1602, with the following connections:
*
* Socket 0 (PCMCIA):
* MAX1602 Lubbock Register
* Pin Signal
* ----- ------- ----------------------
* A0VPP S0_PWR0 SA-1111 GPIO A<0>
* A1VPP S0_PWR1 SA-1111 GPIO A<1>
* A0VCC S0_PWR2 SA-1111 GPIO A<2>
* A1VCC S0_PWR3 SA-1111 GPIO A<3>
* VX VCC
* VY +3.3V
* 12IN +12V
* CODE +3.3V Cirrus Code, CODE = High (VY)
*
* Socket 1 (CF):
* MAX1602 Lubbock Register
* Pin Signal
* ----- ------- ----------------------
* A0VPP GND VPP is not connected
* A1VPP GND VPP is not connected
* A0VCC S1_PWR0 MISC_WR<14>
* A1VCC S1_PWR0 MISC_WR<15>
* VX VCC
* VY +3.3V
* 12IN GND VPP is not connected
* CODE +3.3V Cirrus Code, CODE = High (VY)
*
*/
again:
switch
(
skt
->
nr
){
case
0
:
switch
(
state
->
Vcc
){
case
0
:
gpio
&=
~
(
GPIO_bit
(
2
)
|
GPIO_bit
(
3
));
break
;
case
33
:
gpio
=
(
gpio
&
~
(
GPIO_bit
(
2
)
|
GPIO_bit
(
3
)))
|
GPIO_bit
(
3
);
break
;
case
50
:
gpio
=
(
gpio
&
~
(
GPIO_bit
(
2
)
|
GPIO_bit
(
3
)))
|
GPIO_bit
(
2
);
break
;
default:
printk
(
KERN_ERR
"%s(): unrecognized Vcc %u
\n
"
,
__FUNCTION__
,
state
->
Vcc
);
ret
=
-
1
;
}
switch
(
state
->
Vpp
){
case
0
:
gpio
&=
~
(
GPIO_bit
(
0
)
|
GPIO_bit
(
1
));
break
;
case
120
:
gpio
=
(
gpio
&
~
(
GPIO_bit
(
0
)
|
GPIO_bit
(
1
)))
|
GPIO_bit
(
1
);
break
;
default:
/* REVISIT: I'm not sure about this? Is this correct?
Is it always safe or do we have potential problems
with bogus combinations of Vcc and Vpp settings? */
if
(
state
->
Vpp
==
state
->
Vcc
)
gpio
=
(
gpio
&
~
(
GPIO_bit
(
0
)
|
GPIO_bit
(
1
)))
|
GPIO_bit
(
0
);
else
{
printk
(
KERN_ERR
"%s(): unrecognized Vpp %u
\n
"
,
__FUNCTION__
,
state
->
Vpp
);
ret
=
-
1
;
break
;
}
}
break
;
case
1
:
switch
(
state
->
Vcc
){
case
0
:
misc_wr
&=
~
((
1
<<
15
)
|
(
1
<<
14
));
break
;
case
33
:
misc_wr
=
(
misc_wr
&
~
(
1
<<
15
))
|
(
1
<<
14
);
gpio
=
(
gpio
&
~
(
GPIO_bit
(
2
)
|
GPIO_bit
(
3
)))
|
GPIO_bit
(
2
);
break
;
case
50
:
misc_wr
=
(
misc_wr
&
~
(
1
<<
15
))
|
(
1
<<
14
);
break
;
default:
printk
(
KERN_ERR
"%s(): unrecognized Vcc %u
\n
"
,
__FUNCTION__
,
state
->
Vcc
);
ret
=
-
1
;
break
;
}
if
(
state
->
Vpp
!=
state
->
Vcc
&&
state
->
Vpp
!=
0
){
printk
(
KERN_ERR
"%s(): CF slot cannot support Vpp %u
\n
"
,
__FUNCTION__
,
state
->
Vpp
);
ret
=
-
1
;
break
;
}
break
;
default:
ret
=
-
1
;
}
if
(
ret
>=
0
)
{
sa1111_pcmcia_configure_socket
(
skt
,
state
);
LUB_MISC_WR
=
misc_wr
;
PA_DWR
=
gpio
;
}
if
(
ret
>
0
)
{
ret
=
0
;
unsigned
int
pa_dwr_mask
,
pa_dwr_set
,
misc_mask
,
misc_set
;
int
ret
=
0
;
pa_dwr_mask
=
pa_dwr_set
=
misc_mask
=
misc_set
=
0
;
/* Lubbock uses the Maxim MAX1602, with the following connections:
*
* Socket 0 (PCMCIA):
* MAX1602 Lubbock Register
* Pin Signal
* ----- ------- ----------------------
* A0VPP S0_PWR0 SA-1111 GPIO A<0>
* A1VPP S0_PWR1 SA-1111 GPIO A<1>
* A0VCC S0_PWR2 SA-1111 GPIO A<2>
* A1VCC S0_PWR3 SA-1111 GPIO A<3>
* VX VCC
* VY +3.3V
* 12IN +12V
* CODE +3.3V Cirrus Code, CODE = High (VY)
*
* Socket 1 (CF):
* MAX1602 Lubbock Register
* Pin Signal
* ----- ------- ----------------------
* A0VPP GND VPP is not connected
* A1VPP GND VPP is not connected
* A0VCC S1_PWR0 MISC_WR<14>
* A1VCC S1_PWR1 MISC_WR<15>
* VX VCC
* VY +3.3V
* 12IN GND VPP is not connected
* CODE +3.3V Cirrus Code, CODE = High (VY)
*
*/
again:
switch
(
skt
->
nr
)
{
case
0
:
pa_dwr_mask
=
GPIO_A0
|
GPIO_A1
|
GPIO_A2
|
GPIO_A3
;
switch
(
state
->
Vcc
)
{
case
0
:
/* Hi-Z */
break
;
case
33
:
/* VY */
pa_dwr_set
|=
GPIO_A3
;
break
;
case
50
:
/* VX */
pa_dwr_set
|=
GPIO_A2
;
break
;
default:
printk
(
KERN_ERR
"%s(): unrecognized Vcc %u
\n
"
,
__FUNCTION__
,
state
->
Vcc
);
ret
=
-
1
;
}
switch
(
state
->
Vpp
)
{
case
0
:
/* Hi-Z */
break
;
case
120
:
/* 12IN */
pa_dwr_set
|=
GPIO_A1
;
break
;
default:
/* VCC */
if
(
state
->
Vpp
==
state
->
Vcc
)
pa_dwr_set
|=
GPIO_A0
;
else
{
printk
(
KERN_ERR
"%s(): unrecognized Vpp %u
\n
"
,
__FUNCTION__
,
state
->
Vpp
);
ret
=
-
1
;
break
;
}
}
break
;
case
1
:
misc_mask
=
(
1
<<
15
)
|
(
1
<<
14
);
switch
(
state
->
Vcc
)
{
case
0
:
/* Hi-Z */
break
;
case
33
:
/* VY */
misc_set
|=
1
<<
15
;
break
;
case
50
:
/* VX */
misc_set
|=
1
<<
14
;
break
;
default:
printk
(
KERN_ERR
"%s(): unrecognized Vcc %u
\n
"
,
__FUNCTION__
,
state
->
Vcc
);
ret
=
-
1
;
break
;
}
if
(
state
->
Vpp
!=
state
->
Vcc
&&
state
->
Vpp
!=
0
)
{
printk
(
KERN_ERR
"%s(): CF slot cannot support Vpp %u
\n
"
,
__FUNCTION__
,
state
->
Vpp
);
ret
=
-
1
;
break
;
}
break
;
default:
ret
=
-
1
;
}
if
(
ret
==
0
)
ret
=
sa1111_pcmcia_configure_socket
(
skt
,
state
);
if
(
ret
==
0
)
{
lubbock_set_misc_wr
(
misc_mask
,
misc_set
);
sa1111_set_io
(
SA1111_DEV
(
skt
->
dev
),
pa_dwr_mask
,
pa_dwr_set
);
}
#if 1
/*
* HACK ALERT:
* We can't sense the voltage properly on Lubbock before actually
* applying some power to the socket (catch 22).
* Resense the socket Voltage Sense pins after applying socket power.
*/
sa1111_pcmcia_socket_state
(
skt
,
&
new_state
);
if
(
state
->
Vcc
==
33
&&
!
new_state
.
vs_3v
&&
!
new_state
.
vs_Xv
)
{
/* Switch to 5V, Configure socket with 5V voltage */
PA_DWR
&=
~
(
GPIO_bit
(
0
)
|
GPIO_bit
(
1
)
|
GPIO_bit
(
2
)
|
GPIO_bit
(
3
));
PA_DDR
&=
~
(
GPIO_bit
(
0
)
|
GPIO_bit
(
1
)
|
GPIO_bit
(
2
)
|
GPIO_bit
(
3
));
/* We need to hack around the const qualifier as well to keep this
ugly workaround localized and not force it to the rest of the code.
Barf bags avaliable in the seat pocket in front of you! */
((
socket_state_t
*
)
state
)
->
Vcc
=
50
;
((
socket_state_t
*
)
state
)
->
Vpp
=
50
;
goto
again
;
}
if
(
ret
==
0
&&
state
->
Vcc
==
33
)
{
struct
pcmcia_state
new_state
;
/*
* HACK ALERT:
* We can't sense the voltage properly on Lubbock before
* actually applying some power to the socket (catch 22).
* Resense the socket Voltage Sense pins after applying
* socket power.
*
* Note: It takes about 2.5ms for the MAX1602 VCC output
* to rise.
*/
mdelay
(
3
);
sa1111_pcmcia_socket_state
(
skt
,
&
new_state
);
if
(
!
new_state
.
vs_3v
&&
!
new_state
.
vs_Xv
)
{
/*
* Switch to 5V, Configure socket with 5V voltage
*/
lubbock_set_misc_wr
(
misc_mask
,
0
);
sa1111_set_io
(
SA1111_DEV
(
skt
->
dev
),
pa_dwr_mask
,
0
);
/*
* It takes about 100ms to turn off Vcc.
*/
mdelay
(
100
);
/*
* We need to hack around the const qualifier as
* well to keep this ugly workaround localized and
* not force it to the rest of the code. Barf bags
* avaliable in the seat pocket in front of you!
*/
((
socket_state_t
*
)
state
)
->
Vcc
=
50
;
((
socket_state_t
*
)
state
)
->
Vpp
=
50
;
goto
again
;
}
}
#endif
}
local_irq_restore
(
flags
);
return
ret
;
return
ret
;
}
static
struct
pcmcia_low_level
lubbock_pcmcia_ops
=
{
...
...
@@ -196,7 +212,7 @@ static struct pcmcia_low_level lubbock_pcmcia_ops = {
#include "pxa2xx_base.h"
int
__init
pcmcia_lubbock_init
(
struct
device
*
dev
)
int
__init
pcmcia_lubbock_init
(
struct
sa1111_dev
*
sa
dev
)
{
int
ret
=
-
ENODEV
;
...
...
@@ -205,16 +221,15 @@ int __init pcmcia_lubbock_init(struct device *dev)
* Set GPIO_A<3:0> to be outputs for the MAX1600,
* and switch to standby mode.
*/
PA_DWR
=
0
;
PA_DDR
=
0
;
PA_SDR
=
0
;
PA_SSR
=
0
;
sa1111_set_io_dir
(
sadev
,
GPIO_A0
|
GPIO_A1
|
GPIO_A2
|
GPIO_A3
,
0
,
0
);
sa1111_set_io
(
sadev
,
GPIO_A0
|
GPIO_A1
|
GPIO_A2
|
GPIO_A3
,
0
);
sa1111_set_sleep_io
(
sadev
,
GPIO_A0
|
GPIO_A1
|
GPIO_A2
|
GPIO_A3
,
0
);
/* Set CF Socket 1 power to standby mode. */
LUB_MISC_WR
&=
~
(
GPIO_bit
(
15
)
|
GPIO_bit
(
14
)
);
lubbock_set_misc_wr
((
1
<<
15
)
|
(
1
<<
14
),
0
);
dev
->
platform_data
=
&
lubbock_pcmcia_ops
;
ret
=
pxa2xx_drv_pcmcia_probe
(
dev
);
sadev
->
dev
.
platform_data
=
&
lubbock_pcmcia_ops
;
ret
=
pxa2xx_drv_pcmcia_probe
(
&
sadev
->
dev
);
}
return
ret
;
...
...
drivers/pcmcia/sa1111_generic.c
View file @
e1ff5fe0
...
...
@@ -149,7 +149,7 @@ static int pcmcia_probe(struct sa1111_dev *dev)
pcmcia_jornada720_init
(
&
dev
->
dev
);
#endif
#ifdef CONFIG_ARCH_LUBBOCK
pcmcia_lubbock_init
(
&
dev
->
dev
);
pcmcia_lubbock_init
(
dev
);
#endif
#ifdef CONFIG_ASSABET_NEPONSET
pcmcia_neponset_init
(
dev
);
...
...
drivers/pcmcia/sa1111_generic.h
View file @
e1ff5fe0
...
...
@@ -10,6 +10,6 @@ extern void sa1111_pcmcia_socket_suspend(struct soc_pcmcia_socket *);
extern
int
pcmcia_badge4_init
(
struct
device
*
);
extern
int
pcmcia_jornada720_init
(
struct
device
*
);
extern
int
pcmcia_lubbock_init
(
struct
device
*
);
extern
int
pcmcia_lubbock_init
(
struct
sa1111_dev
*
);
extern
int
pcmcia_neponset_init
(
struct
sa1111_dev
*
);
drivers/serial/pxa.c
View file @
e1ff5fe0
...
...
@@ -33,7 +33,6 @@
#include <linux/sysrq.h>
#include <linux/serial_reg.h>
#include <linux/circ_buf.h>
#include <linux/serial.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
...
...
@@ -386,9 +385,6 @@ static int serial_pxa_startup(struct uart_port *port)
if
(
retval
)
return
retval
;
CKEN
|=
up
->
cken
;
udelay
(
1
);
/*
* Clear the FIFO buffers and disable them.
* (they will be reenabled in set_termios())
...
...
@@ -461,8 +457,6 @@ static void serial_pxa_shutdown(struct uart_port *port)
UART_FCR_CLEAR_RCVR
|
UART_FCR_CLEAR_XMIT
);
serial_out
(
up
,
UART_FCR
,
0
);
CKEN
&=
~
up
->
cken
;
}
static
void
...
...
@@ -576,10 +570,14 @@ static void
serial_pxa_pm
(
struct
uart_port
*
port
,
unsigned
int
state
,
unsigned
int
oldstate
)
{
struct
uart_pxa_port
*
up
=
(
struct
uart_pxa_port
*
)
port
;
if
(
state
)
{
/* sleep */
CKEN
&=
~
up
->
cken
;
}
else
{
/* wake */
CKEN
|=
up
->
cken
;
udelay
(
1
);
}
}
...
...
@@ -760,13 +758,12 @@ static struct uart_pxa_port serial_pxa_ports[] = {
.
cken
=
CKEN6_FFUART
,
.
port
=
{
.
type
=
PORT_PXA
,
.
iotype
=
SERIAL_
IO_MEM
,
.
iotype
=
UP
IO_MEM
,
.
membase
=
(
void
*
)
&
FFUART
,
.
mapbase
=
__PREG
(
FFUART
),
.
irq
=
IRQ_FFUART
,
.
uartclk
=
921600
*
16
,
.
fifosize
=
64
,
.
flags
=
ASYNC_SKIP_TEST
,
.
ops
=
&
serial_pxa_pops
,
.
line
=
0
,
},
...
...
@@ -775,13 +772,12 @@ static struct uart_pxa_port serial_pxa_ports[] = {
.
cken
=
CKEN7_BTUART
,
.
port
=
{
.
type
=
PORT_PXA
,
.
iotype
=
SERIAL_
IO_MEM
,
.
iotype
=
UP
IO_MEM
,
.
membase
=
(
void
*
)
&
BTUART
,
.
mapbase
=
__PREG
(
BTUART
),
.
irq
=
IRQ_BTUART
,
.
uartclk
=
921600
*
16
,
.
fifosize
=
64
,
.
flags
=
ASYNC_SKIP_TEST
,
.
ops
=
&
serial_pxa_pops
,
.
line
=
1
,
},
...
...
@@ -790,13 +786,12 @@ static struct uart_pxa_port serial_pxa_ports[] = {
.
cken
=
CKEN5_STUART
,
.
port
=
{
.
type
=
PORT_PXA
,
.
iotype
=
SERIAL_
IO_MEM
,
.
iotype
=
UP
IO_MEM
,
.
membase
=
(
void
*
)
&
STUART
,
.
mapbase
=
__PREG
(
STUART
),
.
irq
=
IRQ_STUART
,
.
uartclk
=
921600
*
16
,
.
fifosize
=
64
,
.
flags
=
ASYNC_SKIP_TEST
,
.
ops
=
&
serial_pxa_pops
,
.
line
=
2
,
},
...
...
@@ -830,6 +825,10 @@ static int __init serial_pxa_init(void)
static
void
__exit
serial_pxa_exit
(
void
)
{
int
i
;
for
(
i
=
0
;
i
<
ARRAY_SIZE
(
serial_pxa_ports
);
i
++
)
uart_remove_one_port
(
&
serial_pxa_reg
,
&
serial_pxa_ports
[
i
].
port
);
uart_unregister_driver
(
&
serial_pxa_reg
);
}
...
...
drivers/usb/gadget/pxa2xx_udc.c
View file @
e1ff5fe0
...
...
@@ -51,6 +51,7 @@
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/system.h>
#include <asm/mach-types.h>
#include <asm/unaligned.h>
#include <asm/hardware.h>
...
...
drivers/video/pxafb.c
View file @
e1ff5fe0
...
...
@@ -153,7 +153,7 @@ pxafb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
* 12 or 16-bit True Colour. We encode the RGB value
* according to the RGB bitfield information.
*/
if
(
regno
<
=
16
)
{
if
(
regno
<
16
)
{
u32
*
pal
=
fbi
->
fb
.
pseudo_palette
;
val
=
chan_to_field
(
red
,
&
fbi
->
fb
.
var
.
red
);
...
...
@@ -448,7 +448,7 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var, struct pxafb_info *
{
struct
pxafb_lcd_reg
new_regs
;
u_long
flags
;
u_int
pcd
=
get_pcd
(
var
->
pixclock
);
u_int
lines_per_panel
,
pcd
=
get_pcd
(
var
->
pixclock
);
DPRINTK
(
"Configuring PXA LCD
\n
"
);
...
...
@@ -509,8 +509,16 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var, struct pxafb_info *
LCCR1_BegLnDel
(
var
->
left_margin
)
+
LCCR1_EndLnDel
(
var
->
right_margin
);
/*
* If we have a dual scan LCD, we need to halve
* the YRES parameter.
*/
lines_per_panel
=
var
->
yres
;
if
(
fbi
->
lccr0
&
LCCR0_SDS
)
lines_per_panel
/=
2
;
new_regs
.
lccr2
=
LCCR2_DisHght
(
var
->
yres
)
+
LCCR2_DisHght
(
lines_per_panel
)
+
LCCR2_VrtSnchWdth
(
var
->
vsync_len
)
+
LCCR2_BegFrmDel
(
var
->
upper_margin
)
+
LCCR2_EndFrmDel
(
var
->
lower_margin
);
...
...
@@ -540,9 +548,7 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var, struct pxafb_info *
fbi
->
dmadesc_fbhigh_dma
=
fbi
->
palette_dma
-
2
*
16
;
fbi
->
dmadesc_palette_dma
=
fbi
->
palette_dma
-
1
*
16
;
#define BYTES_PER_PANEL ((fbi->lccr0 & LCCR0_SDS) == LCCR0_Dual ? \
(var->xres * var->yres * var->bits_per_pixel / 8 / 2) : \
(var->xres * var->yres * var->bits_per_pixel / 8))
#define BYTES_PER_PANEL (lines_per_panel * fbi->fb.fix.line_length)
/* populate descriptors */
fbi
->
dmadesc_fblow_cpu
->
fdadr
=
fbi
->
dmadesc_fblow_dma
;
...
...
@@ -733,8 +739,7 @@ static void pxafb_disable_controller(struct pxafb_info *fbi)
LCSR
=
0xffffffff
;
/* Clear LCD Status Register */
LCCR0
&=
~
LCCR0_LDM
;
/* Enable LCD Disable Done Interrupt */
//TODO?enable_irq(IRQ_LCD); /* Enable LCD IRQ */
LCCR0
&=
~
LCCR0_ENB
;
/* Disable LCD Controller */
LCCR0
|=
LCCR0_DIS
;
/* Disable LCD Controller */
schedule_timeout
(
20
*
HZ
/
1000
);
remove_wait_queue
(
&
fbi
->
ctrlr_wait
,
&
wait
);
...
...
@@ -1137,25 +1142,25 @@ static int __init pxafb_parse_options(struct device *dev, char *options)
}
}
else
if
(
!
strncmp
(
this_opt
,
"pixclock:"
,
9
))
{
inf
->
pixclock
=
simple_strtoul
(
this_opt
+
9
,
NULL
,
0
);
dev_info
(
dev
,
"override pixclock: %u
ld
\n
"
,
inf
->
pixclock
);
dev_info
(
dev
,
"override pixclock: %u
\n
"
,
inf
->
pixclock
);
}
else
if
(
!
strncmp
(
this_opt
,
"left:"
,
5
))
{
inf
->
left_margin
=
simple_strtoul
(
this_opt
+
5
,
NULL
,
0
);
dev_info
(
dev
,
"override left: %
d
\n
"
,
inf
->
left_margin
);
dev_info
(
dev
,
"override left: %
u
\n
"
,
inf
->
left_margin
);
}
else
if
(
!
strncmp
(
this_opt
,
"right:"
,
6
))
{
inf
->
right_margin
=
simple_strtoul
(
this_opt
+
6
,
NULL
,
0
);
dev_info
(
dev
,
"override right: %
d
\n
"
,
inf
->
right_margin
);
dev_info
(
dev
,
"override right: %
u
\n
"
,
inf
->
right_margin
);
}
else
if
(
!
strncmp
(
this_opt
,
"upper:"
,
6
))
{
inf
->
upper_margin
=
simple_strtoul
(
this_opt
+
6
,
NULL
,
0
);
dev_info
(
dev
,
"override upper: %
d
\n
"
,
inf
->
upper_margin
);
dev_info
(
dev
,
"override upper: %
u
\n
"
,
inf
->
upper_margin
);
}
else
if
(
!
strncmp
(
this_opt
,
"lower:"
,
6
))
{
inf
->
lower_margin
=
simple_strtoul
(
this_opt
+
6
,
NULL
,
0
);
dev_info
(
dev
,
"override lower: %
d
\n
"
,
inf
->
lower_margin
);
dev_info
(
dev
,
"override lower: %
u
\n
"
,
inf
->
lower_margin
);
}
else
if
(
!
strncmp
(
this_opt
,
"hsynclen:"
,
9
))
{
inf
->
hsync_len
=
simple_strtoul
(
this_opt
+
9
,
NULL
,
0
);
dev_info
(
dev
,
"override hsynclen: %
d
\n
"
,
inf
->
hsync_len
);
dev_info
(
dev
,
"override hsynclen: %
u
\n
"
,
inf
->
hsync_len
);
}
else
if
(
!
strncmp
(
this_opt
,
"vsynclen:"
,
9
))
{
inf
->
vsync_len
=
simple_strtoul
(
this_opt
+
9
,
NULL
,
0
);
dev_info
(
dev
,
"override vsynclen: %
d
\n
"
,
inf
->
vsync_len
);
dev_info
(
dev
,
"override vsynclen: %
u
\n
"
,
inf
->
vsync_len
);
}
else
if
(
!
strncmp
(
this_opt
,
"hsync:"
,
6
))
{
if
(
simple_strtoul
(
this_opt
+
6
,
NULL
,
0
)
==
0
)
{
dev_info
(
dev
,
"override hsync: Active Low
\n
"
);
...
...
include/asm-arm/arch-ixp4xx/uncompress.h
View file @
e1ff5fe0
...
...
@@ -48,7 +48,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
/*
* Coyote only has UART2 connected
*/
if
(
__machine_arch_type
==
MACH_TYPE_ADI_COYOTE
)
if
(
machine_is_adi_coyote
()
)
uart_base
=
(
volatile
u32
*
)
IXP4XX_UART2_BASE_PHYS
;
else
uart_base
=
(
volatile
u32
*
)
IXP4XX_UART1_BASE_PHYS
;
...
...
include/asm-arm/arch-lh7a40x/hardware.h
View file @
e1ff5fe0
...
...
@@ -13,8 +13,6 @@
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
#include <asm/mach-types.h>
#define io_p2v(x) (0xf0000000 | (((x) & 0xfff00000) >> 4) | ((x) & 0x0000ffff))
#define io_v2p(x) ( (((x) & 0x0fff0000) << 4) | ((x) & 0x0000ffff))
...
...
include/asm-arm/arch-omap/hardware.h
View file @
e1ff5fe0
...
...
@@ -40,7 +40,6 @@
#ifndef __ASSEMBLER__
#include <asm/types.h>
#endif
#include <asm/mach-types.h>
/*
* ----------------------------------------------------------------------------
...
...
include/asm-arm/arch-omap/uncompress.h
View file @
e1ff5fe0
...
...
@@ -20,7 +20,6 @@
#include <linux/config.h>
#include <linux/types.h>
#include <linux/serial_reg.h>
#include <asm/mach-types.h>
#include <asm/hardware.h>
#include <asm/arch/serial.h>
...
...
include/asm-arm/arch-pxa/hardware.h
View file @
e1ff5fe0
...
...
@@ -13,9 +13,6 @@
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
#include <asm/mach-types.h>
/*
* We requires absolute addresses.
*/
...
...
include/asm-arm/arch-pxa/lubbock.h
View file @
e1ff5fe0
...
...
@@ -35,3 +35,6 @@
#define LUB_IRQ_SET_CLR __LUB_REG(LUBBOCK_FPGA_PHYS + 0x0d0)
#define LUB_GP __LUB_REG(LUBBOCK_FPGA_PHYS + 0x100)
#ifndef __ASSEMBLY__
extern
void
lubbock_set_misc_wr
(
unsigned
int
mask
,
unsigned
int
set
);
#endif
include/asm-arm/hardware/sa1111.h
View file @
e1ff5fe0
...
...
@@ -405,22 +405,6 @@
#define GPIO_C6 (1 << 22)
#define GPIO_C7 (1 << 23)
#define PA_DDR __CCREG(0x1000)
#define PA_DRR __CCREG(0x1004)
#define PA_DWR __CCREG(0x1004)
#define PA_SDR __CCREG(0x1008)
#define PA_SSR __CCREG(0x100c)
#define PB_DDR __CCREG(0x1010)
#define PB_DRR __CCREG(0x1014)
#define PB_DWR __CCREG(0x1014)
#define PB_SDR __CCREG(0x1018)
#define PB_SSR __CCREG(0x101c)
#define PC_DDR __CCREG(0x1020)
#define PC_DRR __CCREG(0x1024)
#define PC_DWR __CCREG(0x1024)
#define PC_SDR __CCREG(0x1028)
#define PC_SSR __CCREG(0x102c)
/*
* Interrupt Controller
*
...
...
include/asm-arm/system.h
View file @
e1ff5fe0
...
...
@@ -137,22 +137,48 @@ extern unsigned int user_debug;
#define set_wmb(var, value) do { var = value; wmb(); } while (0)
#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
#define prepare_to_switch() do { } while(0)
#ifdef CONFIG_SMP
/*
* Define our own context switch locking. This allows us to enable
* interrupts over the context switch, otherwise we end up with high
* interrupt latency. The real problem area is switch_mm() which may
* do a full cache flush.
*/
#define prepare_arch_switch(rq,next) \
do { \
spin_lock(&(next)->switch_lock); \
spin_unlock_irq(&(rq)->lock); \
} while (0)
#define finish_arch_switch(rq,prev) \
spin_unlock(&(prev)->switch_lock)
#define task_running(rq,p) \
((rq)->curr == (p) || spin_is_locked(&(p)->switch_lock))
#else
/*
* Our UP-case is more simple, but we assume knowledge of how
* spin_unlock_irq() and friends are implemented. This avoids
* us needlessly decrementing and incrementing the preempt count.
*/
#define prepare_arch_switch(rq,next) local_irq_enable()
#define finish_arch_switch(rq,prev) spin_unlock(&(rq)->lock)
#define task_running(rq,p) ((rq)->curr == (p))
#endif
/*
* switch_to(prev, next) should switch from task `prev' to `next'
* `prev' will never be the same as `next'.
*
The `mb' is to tell GCC not to cache `current' across this call
.
* `prev' will never be the same as `next'.
schedule() itself
*
contains the memory barrier to tell GCC not to cache `current'
.
*/
struct
thread_info
;
struct
task_struct
;
extern
struct
task_struct
*
__switch_to
(
struct
task_struct
*
,
struct
thread_info
*
,
struct
thread_info
*
);
#define switch_to(prev,next,last) \
do { \
last = __switch_to(prev,prev->thread_info,next->thread_info); \
mb(); \
} while (0)
#define switch_to(prev,next,last) \
do { \
last = __switch_to(prev,prev->thread_info,next->thread_info); \
} while (0)
/*
* CPU interrupt mask handling.
...
...
include/asm-arm/unistd.h
View file @
e1ff5fe0
...
...
@@ -454,6 +454,7 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6
#define __ARCH_WANT_STAT64
#define __ARCH_WANT_SYS_ALARM
#define __ARCH_WANT_SYS_GETHOSTNAME
#define __ARCH_WANT_SYS_PAUSE
#define __ARCH_WANT_SYS_TIME
#define __ARCH_WANT_SYS_UTIME
#define __ARCH_WANT_SYS_SOCKETCALL
...
...
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