Commit e347d383 authored by Roland Vossen's avatar Roland Vossen Committed by Greg Kroah-Hartman

staging: brcm80211: replaced macro R_SDREG by function r_sdreg()

Code cleanup. Leads to more readable code and better type checking.
Signed-off-by: default avatarRoland Vossen <rvossen@broadcom.com>
Reviewed-by: default avatarArend van Spriel <arend@broadcom.com>
Reviewed-by: default avatarFranky Lin <frankyl@broadcom.com>
Signed-off-by: default avatarArend van Spriel <arend@broadcom.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent a24dee08
...@@ -403,7 +403,10 @@ struct rte_console { ...@@ -403,7 +403,10 @@ struct rte_console {
BRCMF_SPINWAIT_SLEEP_INIT(sdioh_spinwait_sleep); BRCMF_SPINWAIT_SLEEP_INIT(sdioh_spinwait_sleep);
/* Core reg address translation */ /*
* Core reg address translation.
* Both macro's returns a 32 bits byte address on the backplane bus.
*/
#define CORE_CC_REG(base, field) (base + offsetof(chipcregs_t, field)) #define CORE_CC_REG(base, field) (base + offsetof(chipcregs_t, field))
#define CORE_BUS_REG(base, field) \ #define CORE_BUS_REG(base, field) \
(base + offsetof(struct sdpcmd_regs, field)) (base + offsetof(struct sdpcmd_regs, field))
...@@ -530,7 +533,7 @@ struct chip_info { ...@@ -530,7 +533,7 @@ struct chip_info {
u32 cccorebase; u32 cccorebase;
u32 ccrev; u32 ccrev;
u32 cccaps; u32 cccaps;
u32 buscorebase; u32 buscorebase; /* 32 bits backplane bus address */
u32 buscorerev; u32 buscorerev;
u32 buscoretype; u32 buscoretype;
u32 ramcorebase; u32 ramcorebase;
...@@ -549,7 +552,8 @@ struct brcmf_bus { ...@@ -549,7 +552,8 @@ struct brcmf_bus {
uint varsz; /* Size of variables buffer */ uint varsz; /* Size of variables buffer */
u32 sbaddr; /* Current SB window pointer (-1, invalid) */ u32 sbaddr; /* Current SB window pointer (-1, invalid) */
struct sdpcmd_regs *regs; /* SDIO core */ /* SDIO core, 32 bit address on the backplane bus: */
struct sdpcmd_regs *regs;
uint sdpcmrev; /* SDIO core revision */ uint sdpcmrev; /* SDIO core revision */
uint armrev; /* CPU core revision */ uint armrev; /* CPU core revision */
uint ramrev; /* SOCRAM core revision */ uint ramrev; /* SOCRAM core revision */
...@@ -822,24 +826,26 @@ static bool brcmf_readahead; ...@@ -822,24 +826,26 @@ static bool brcmf_readahead;
(((u8)(bus->tx_max - bus->tx_seq) != 0) && \ (((u8)(bus->tx_max - bus->tx_seq) != 0) && \
(((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0)) (((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0))
/* Macros to get register read/write status */ /*
/* NOTE: these assume a local dhdsdio_bus_t *bus! */ * Reads a register in the SDIO hardware block. This block occupies a series of
#define R_SDREG(regvar, regaddr, retryvar, typ) \ * adresses on the 32 bit backplane bus.
do { \ */
retryvar = 0; \ static void
do { \ r_sdreg32(struct brcmf_bus *bus, u32 *regvar, u32 reg_offset, u32 *retryvar)
regvar = R_REG((u32)(regaddr), typ); \ {
} while (brcmf_sdcard_regfail(bus->card) && \ *retryvar = 0;
(++retryvar <= retry_limit)); \ do {
if (retryvar) { \ *regvar = R_REG(bus->ci->buscorebase + reg_offset, u32);
bus->regfails += (retryvar-1); \ } while (brcmf_sdcard_regfail(bus->card) &&
if (retryvar > retry_limit) { \ (++(*retryvar) <= retry_limit));
DHD_ERROR(("%s: FAILED" #regvar "READ, LINE %d\n", \ if (*retryvar) {
__func__, __LINE__)); \ bus->regfails += (*retryvar-1);
regvar = 0; \ if (*retryvar > retry_limit) {
} \ DHD_ERROR(("FAILED READ %Xh\n", reg_offset));
} \ *regvar = 0;
} while (0) }
}
}
#define W_SDREG(regval, regaddr, retryvar, typ) \ #define W_SDREG(regval, regaddr, retryvar, typ) \
do { \ do { \
...@@ -992,8 +998,9 @@ static int brcmf_sdbrcm_htclk(struct brcmf_bus *bus, bool on, bool pendok) ...@@ -992,8 +998,9 @@ static int brcmf_sdbrcm_htclk(struct brcmf_bus *bus, bool on, bool pendok)
if (pendok && ((bus->ci->buscoretype == PCMCIA_CORE_ID) if (pendok && ((bus->ci->buscoretype == PCMCIA_CORE_ID)
&& (bus->ci->buscorerev == 9))) { && (bus->ci->buscorerev == 9))) {
u32 dummy, retries; u32 dummy, retries;
R_SDREG(dummy, &bus->regs->clockctlstatus, retries, r_sdreg32(bus, &dummy,
u32); offsetof(struct sdpcmd_regs, clockctlstatus),
&retries);
} }
/* Check current status */ /* Check current status */
...@@ -1521,7 +1528,6 @@ static uint brcmf_sdbrcm_sendfromq(struct brcmf_bus *bus, uint maxframes) ...@@ -1521,7 +1528,6 @@ static uint brcmf_sdbrcm_sendfromq(struct brcmf_bus *bus, uint maxframes)
u8 tx_prec_map; u8 tx_prec_map;
struct brcmf_pub *drvr = bus->drvr; struct brcmf_pub *drvr = bus->drvr;
struct sdpcmd_regs *regs = bus->regs;
DHD_TRACE(("%s: Enter\n", __func__)); DHD_TRACE(("%s: Enter\n", __func__));
...@@ -1553,7 +1559,9 @@ static uint brcmf_sdbrcm_sendfromq(struct brcmf_bus *bus, uint maxframes) ...@@ -1553,7 +1559,9 @@ static uint brcmf_sdbrcm_sendfromq(struct brcmf_bus *bus, uint maxframes)
/* In poll mode, need to check for other events */ /* In poll mode, need to check for other events */
if (!bus->intr && cnt) { if (!bus->intr && cnt) {
/* Check device status, signal pending interrupt */ /* Check device status, signal pending interrupt */
R_SDREG(intstatus, &regs->intstatus, retries, u32); r_sdreg32(bus, &intstatus,
offsetof(struct sdpcmd_regs, intstatus),
&retries);
bus->f2txdata++; bus->f2txdata++;
if (brcmf_sdcard_regfail(bus->card)) if (brcmf_sdcard_regfail(bus->card))
break; break;
...@@ -4524,7 +4532,9 @@ static u32 brcmf_sdbrcm_hostmail(struct brcmf_bus *bus) ...@@ -4524,7 +4532,9 @@ static u32 brcmf_sdbrcm_hostmail(struct brcmf_bus *bus)
DHD_TRACE(("%s: Enter\n", __func__)); DHD_TRACE(("%s: Enter\n", __func__));
/* Read mailbox data and ack that we did so */ /* Read mailbox data and ack that we did so */
R_SDREG(hmb_data, &regs->tohostmailboxdata, retries, u32); r_sdreg32(bus, &hmb_data,
offsetof(struct sdpcmd_regs, tohostmailboxdata), &retries);
if (retries <= retry_limit) if (retries <= retry_limit)
W_SDREG(SMB_INT_ACK, &regs->tosbmailbox, retries, u32); W_SDREG(SMB_INT_ACK, &regs->tosbmailbox, retries, u32);
bus->f1regdata += 2; bus->f1regdata += 2;
...@@ -4668,7 +4678,8 @@ static bool brcmf_sdbrcm_dpc(struct brcmf_bus *bus) ...@@ -4668,7 +4678,8 @@ static bool brcmf_sdbrcm_dpc(struct brcmf_bus *bus)
/* Pending interrupt indicates new device status */ /* Pending interrupt indicates new device status */
if (bus->ipend) { if (bus->ipend) {
bus->ipend = false; bus->ipend = false;
R_SDREG(newstatus, &regs->intstatus, retries, u32); r_sdreg32(bus, &newstatus,
offsetof(struct sdpcmd_regs, intstatus), &retries);
bus->f1regdata++; bus->f1regdata++;
if (brcmf_sdcard_regfail(bus->card)) if (brcmf_sdcard_regfail(bus->card))
newstatus = 0; newstatus = 0;
...@@ -4691,7 +4702,8 @@ static bool brcmf_sdbrcm_dpc(struct brcmf_bus *bus) ...@@ -4691,7 +4702,8 @@ static bool brcmf_sdbrcm_dpc(struct brcmf_bus *bus)
if (intstatus & I_HMB_FC_CHANGE) { if (intstatus & I_HMB_FC_CHANGE) {
intstatus &= ~I_HMB_FC_CHANGE; intstatus &= ~I_HMB_FC_CHANGE;
W_SDREG(I_HMB_FC_CHANGE, &regs->intstatus, retries, u32); W_SDREG(I_HMB_FC_CHANGE, &regs->intstatus, retries, u32);
R_SDREG(newstatus, &regs->intstatus, retries, u32); r_sdreg32(bus, &newstatus,
offsetof(struct sdpcmd_regs, intstatus), &retries);
bus->f1regdata += 2; bus->f1regdata += 2;
bus->fcstate = bus->fcstate =
!!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)); !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE));
......
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