Commit e396d610 authored by Biju Das's avatar Biju Das Committed by Geert Uytterhoeven

arm64: dts: renesas: rzg2l-smarc: Enable audio

Enable audio on RZ/G2L SMARC EVK by linking SSI0 with WM8978
audio CODEC.
Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20210921084605.16250-4-biju.das.jz@bp.renesas.comSigned-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 1c8da81c
...@@ -8,6 +8,19 @@ ...@@ -8,6 +8,19 @@
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rzg2l-pinctrl.h> #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
/*
* SSI-WM8978
*
* This command is required when Playback/Capture
*
* amixer cset name='Left Input Mixer L2 Switch' on
* amixer cset name='Right Input Mixer R2 Switch' on
* amixer cset name='Headphone Playback Volume' 100
* amixer cset name='PCM Volume' 100%
* amixer cset name='Input PGA Volume' 25
*
*/
/ { / {
aliases { aliases {
serial0 = &scif0; serial0 = &scif0;
...@@ -21,6 +34,29 @@ chosen { ...@@ -21,6 +34,29 @@ chosen {
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
}; };
audio_mclock: audio_mclock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <11289600>;
};
snd_rzg2l: sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&cpu_dai>;
simple-audio-card,frame-master = <&cpu_dai>;
simple-audio-card,mclk-fs = <256>;
cpu_dai: simple-audio-card,cpu {
sound-dai = <&ssi0>;
};
codec_dai: simple-audio-card,codec {
clocks = <&audio_mclock>;
sound-dai = <&wm8978>;
};
};
usb0_vbus_otg: regulator-usb0-vbus-otg { usb0_vbus_otg: regulator-usb0-vbus-otg {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
...@@ -30,6 +66,14 @@ usb0_vbus_otg: regulator-usb0-vbus-otg { ...@@ -30,6 +66,14 @@ usb0_vbus_otg: regulator-usb0-vbus-otg {
}; };
}; };
&audio_clk1{
clock-frequency = <11289600>;
};
&audio_clk2{
clock-frequency = <12288000>;
};
&ehci0 { &ehci0 {
dr_mode = "otg"; dr_mode = "otg";
status = "okay"; status = "okay";
...@@ -90,6 +134,9 @@ &phyrst { ...@@ -90,6 +134,9 @@ &phyrst {
}; };
&pinctrl { &pinctrl {
pinctrl-0 = <&sound_clk_pins>;
pinctrl-names = "default";
i2c0_pins: i2c0 { i2c0_pins: i2c0 {
pins = "RIIC0_SDA", "RIIC0_SCL"; pins = "RIIC0_SDA", "RIIC0_SCL";
input-enable; input-enable;
...@@ -110,6 +157,18 @@ scif0_pins: scif0 { ...@@ -110,6 +157,18 @@ scif0_pins: scif0 {
<RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */ <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */
}; };
sound_clk_pins: sound_clk {
pins = "AUDIO_CLK1", "AUDIO_CLK2";
input-enable;
};
ssi0_pins: ssi0 {
pinmux = <RZG2L_PORT_PINMUX(45, 0, 1)>, /* BCK */
<RZG2L_PORT_PINMUX(45, 1, 1)>, /* RCK */
<RZG2L_PORT_PINMUX(45, 2, 1)>, /* TXD */
<RZG2L_PORT_PINMUX(45, 3, 1)>; /* RXD */
};
usb0_pins: usb0 { usb0_pins: usb0 {
pinmux = <RZG2L_PORT_PINMUX(4, 0, 1)>, /* VBUS */ pinmux = <RZG2L_PORT_PINMUX(4, 0, 1)>, /* VBUS */
<RZG2L_PORT_PINMUX(5, 0, 1)>, /* OVC */ <RZG2L_PORT_PINMUX(5, 0, 1)>, /* OVC */
...@@ -128,6 +187,13 @@ &scif0 { ...@@ -128,6 +187,13 @@ &scif0 {
status = "okay"; status = "okay";
}; };
&ssi0 {
pinctrl-0 = <&ssi0_pins>;
pinctrl-names = "default";
status = "okay";
};
&usb2_phy0 { &usb2_phy0 {
pinctrl-0 = <&usb0_pins>; pinctrl-0 = <&usb0_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
......
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