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Commit e45a1907 authored by Richard Russon's avatar Richard Russon
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Merge flatcap.org:/home/flatcap/backup/bk/ntfs-2.6 

into flatcap.org:/home/flatcap/backup/bk/ntfs-2.6-devel
parents 718ef9f0 8fc0532a
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Showing with 219 additions and 139 deletions
arch/arm/boot/compressed/head.S
View file @ e45a1907
......@@ -349,11 +349,13 @@ LC0: .word LC0 @ r1
LC1: .word reloc_end - reloc_start
.size LC0, . - LC0
#ifdef CONFIG_ARCH_RPC
.globl params
params: ldr r0, =params_phys
mov pc, lr
.ltorg
.align
#endif
/*
* Turn on the cache. We need to setup some page tables so that we
......
arch/arm/mach-pxa/sleep.S
View file @ e45a1907
......@@ -66,6 +66,37 @@ ENTRY(pxa_cpu_suspend)
@ prepare pointer to physical address 0 (virtual mapping in generic.c)
mov r2, #UNCACHED_PHYS_0
@ Intel PXA255 Specification Update notes problems
@ about suspending with PXBus operating above 133MHz
@ (see Errata 31, GPIO output signals, ... unpredictable in sleep
@
@ We keep the change-down close to the actual suspend on SDRAM
@ as possible to eliminate messing about with the refresh clock
@ as the system will restore with the original speed settings
@
@ Ben Dooks, 13-Sep-2004
ldr r6, =CCCR
ldr r8, [r6] @ keep original value for resume
@ ensure x1 for run and turbo mode with memory clock
bic r7, r8, #CCCR_M_MASK | CCCR_N_MASK
orr r7, r7, #(1<<5) | (2<<7)
@ check that the memory frequency is within limits
and r14, r7, #CCCR_L_MASK
teq r14, #1
bicne r7, r7, #CCCR_L_MASK
orrne r7, r7, #1 @@ 99.53MHz
@ get ready for the change
@ note, since we are making turbo=run, do not remove the turbo
@ as this may cause non-turbo mode on resume
mrc p14, 0, r0, c6, c0, 0
bic r0, r0, #2 @ clear change bit
mcr p14, 0, r0, c6, c0, 0
orr r0, r0, #2 @ initiate change bit
@ align execution to a cache line
b 1f
......@@ -76,6 +107,13 @@ ENTRY(pxa_cpu_suspend)
@ All needed values are now in registers.
@ These last instructions should be in cache
@ initiate the frequency change...
str r7, [r6]
mcr p14, 0, r0, c6, c0, 0
@ restore the original cpu speed value for resume
str r8, [r6]
@ put SDRAM into self-refresh
str r5, [r4]
......@@ -85,8 +123,7 @@ ENTRY(pxa_cpu_suspend)
@ enter sleep mode
mcr p14, 0, r1, c7, c0, 0
20: nop
b 20b @ loop waiting for sleep
20: b 20b @ loop waiting for sleep
/*
* cpu_pxa_resume()
......
arch/arm/mach-s3c2410/irq.c
View file @ e45a1907
/* linux/arch/arm/mach-s3c2410/irq.c
*
* Copyright (c) 2003,2004 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
* Ben Dooks <ben@simtec.co.uk>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
......@@ -27,7 +27,13 @@
*
* 21-Jul-2004 Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org>
* Addition of ADC/TC demux
*/
*
* 04-Oct-2004 Klaus Fetscher <k.fetscher@fetron.de>
* Fix for set_irq_type() on low EINT numbers
*
* 05-Oct-2004 Ben Dooks <ben@simtec.co.uk>
* Tidy up KF's patch and sort out new release
*/
#include <linux/init.h>
......@@ -46,9 +52,6 @@
#include <asm/arch/regs-irq.h>
#include <asm/arch/regs-gpio.h>
#if 0
#include <asm/debug-ll.h>
#endif
#define irqdbf(x...)
#define irqdbf2(x...)
......@@ -195,13 +198,20 @@ s3c_irqext_type(unsigned int irq, unsigned int type)
unsigned long gpcon_offset, extint_offset;
unsigned long newvalue = 0, value;
if ((irq >= IRQ_EINT0) && (irq <= IRQ_EINT7))
if ((irq >= IRQ_EINT0) && (irq <= IRQ_EINT3))
{
gpcon_reg = S3C2410_GPFCON;
extint_reg = S3C2410_EXTINT0;
gpcon_offset = (irq - IRQ_EINT0) * 2;
extint_offset = (irq - IRQ_EINT0) * 4;
}
else if ((irq >= IRQ_EINT4) && (irq <= IRQ_EINT7))
{
gpcon_reg = S3C2410_GPFCON;
extint_reg = S3C2410_EXTINT0;
gpcon_offset = (irq - (EXTINT_OFF)) * 2;
extint_offset = (irq - (EXTINT_OFF)) * 4;
}
else if ((irq >= IRQ_EINT8) && (irq <= IRQ_EINT15))
{
gpcon_reg = S3C2410_GPGCON;
......@@ -269,6 +279,13 @@ static struct irqchip s3c_irqext_chip = {
.type = s3c_irqext_type
};
static struct irqchip s3c_irq_eint0t4 = {
.ack = s3c_irq_ack,
.mask = s3c_irq_mask,
.unmask = s3c_irq_unmask,
.type = s3c_irqext_type
};
/* mask values for the parent registers for each of the interrupt types */
#define INTMSK_UART0 (1UL << (IRQ_UART0 - IRQ_EINT0))
......@@ -549,6 +566,7 @@ s3c_irq_demux_uart2(unsigned int irq,
void __init s3c2410_init_irq(void)
{
unsigned long pend;
unsigned long last;
int irqno;
int i;
......@@ -556,48 +574,51 @@ void __init s3c2410_init_irq(void)
/* first, clear all interrupts pending... */
last = 0;
for (i = 0; i < 4; i++) {
pend = __raw_readl(S3C2410_EINTPEND);
if (pend == 0)
if (pend == 0 || pend == last)
break;
__raw_writel(pend, S3C2410_EINTPEND);
printk("irq: clearing pending ext status %08x\n", (int)pend);
last = pend;
}
last = 0;
for (i = 0; i < 4; i++) {
pend = __raw_readl(S3C2410_INTPND);
if (pend == 0)
if (pend == 0 || pend == last)
break;
__raw_writel(pend, S3C2410_SRCPND);
__raw_writel(pend, S3C2410_INTPND);
printk("irq: clearing pending status %08x\n", (int)pend);
last = pend;
}
last = 0;
for (i = 0; i < 4; i++) {
pend = __raw_readl(S3C2410_SUBSRCPND);
if (pend == 0)
if (pend == 0 || pend == last)
break;
printk("irq: clearing subpending status %08x\n", (int)pend);
__raw_writel(pend, S3C2410_SUBSRCPND);
last = pend;
}
/* register the main interrupts */
irqdbf("s3c2410_init_irq: registering s3c2410 interrupt handlers\n");
for (irqno = IRQ_EINT0; irqno <= IRQ_ADCPARENT; irqno++) {
for (irqno = IRQ_BATT_FLT; irqno <= IRQ_ADCPARENT; irqno++) {
/* set all the s3c2410 internal irqs */
switch (irqno) {
case IRQ_EINT4t7:
case IRQ_EINT8t23:
/* these are already dealt with, so should never
* appear */
break;
/* deal with the special IRQs (cascaded) */
case IRQ_UART0:
......@@ -632,6 +653,13 @@ void __init s3c2410_init_irq(void)
/* external interrupts */
for (irqno = IRQ_EINT0; irqno <= IRQ_EINT3; irqno++) {
irqdbf("registering irq %d (ext int)\n", irqno);
set_irq_chip(irqno, &s3c_irq_eint0t4);
set_irq_handler(irqno, do_edge_IRQ);
set_irq_flags(irqno, IRQF_VALID);
}
for (irqno = IRQ_EINT4; irqno <= IRQ_EINT23; irqno++) {
irqdbf("registering irq %d (extended s3c irq)\n", irqno);
set_irq_chip(irqno, &s3c_irqext_chip);
......
arch/ppc64/kernel/pSeries_lpar.c
View file @ e45a1907
......@@ -135,7 +135,6 @@ void udbg_init_debug_lpar(void)
int find_udbg_vterm(void)
{
struct device_node *stdout_node;
phandle *stdout_ph;
u32 *termno;
char *name;
int found = 0;
......@@ -143,10 +142,10 @@ int find_udbg_vterm(void)
/* find the boot console from /chosen/stdout */
if (!of_chosen)
return 0;
stdout_ph = (phandle *)get_property(of_chosen, "linux,stdout-package", NULL);
if (stdout_ph == NULL)
name = (char *)get_property(of_chosen, "linux,stdout-path", NULL);
if (name == NULL)
return 0;
stdout_node = of_find_node_by_phandle(*stdout_ph);
stdout_node = of_find_node_by_path(name);
if (!stdout_node)
return 0;
......
drivers/char/agp/amd-k7-agp.c
View file @ e45a1907
......@@ -24,11 +24,11 @@ static struct pci_device_id agp_amdk7_pci_table[];
struct amd_page_map {
unsigned long *real;
unsigned long *remapped;
unsigned long __iomem *remapped;
};
static struct _amd_irongate_private {
volatile u8 *registers;
volatile u8 __iomem *registers;
struct amd_page_map **gatt_pages;
int num_tables;
} amd_irongate_private;
......@@ -54,7 +54,7 @@ static int amd_create_page_map(struct amd_page_map *page_map)
global_cache_flush();
for (i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++)
page_map->remapped[i] = agp_bridge->scratch_page;
writel(agp_bridge->scratch_page, page_map->remapped+i);
return 0;
}
......@@ -151,7 +151,7 @@ static int amd_create_gatt_table(void)
}
agp_bridge->gatt_table_real = (u32 *)page_dir.real;
agp_bridge->gatt_table = (u32 *)page_dir.remapped;
agp_bridge->gatt_table = (u32 __iomem *)page_dir.remapped;
agp_bridge->gatt_bus_addr = virt_to_phys(page_dir.real);
/* Get the address for the gart region.
......@@ -165,9 +165,8 @@ static int amd_create_gatt_table(void)
/* Calculate the agp offset */
for (i = 0; i < value->num_entries / 1024; i++, addr += 0x00400000) {
page_dir.remapped[GET_PAGE_DIR_OFF(addr)] =
virt_to_phys(amd_irongate_private.gatt_pages[i]->real);
page_dir.remapped[GET_PAGE_DIR_OFF(addr)] |= 0x00000001;
writel(virt_to_phys(amd_irongate_private.gatt_pages[i]->real) | 1,
page_dir.remapped+GET_PAGE_DIR_OFF(addr));
}
return 0;
......@@ -178,7 +177,7 @@ static int amd_free_gatt_table(void)
struct amd_page_map page_dir;
page_dir.real = (unsigned long *)agp_bridge->gatt_table_real;
page_dir.remapped = (unsigned long *)agp_bridge->gatt_table;
page_dir.remapped = (unsigned long __iomem *)agp_bridge->gatt_table;
amd_free_gatt_pages();
amd_free_page_map(&page_dir);
......@@ -218,7 +217,7 @@ static int amd_irongate_configure(void)
/* Get the memory mapped registers */
pci_read_config_dword(agp_bridge->dev, AMD_MMBASE, &temp);
temp = (temp & PCI_BASE_ADDRESS_MEM_MASK);
amd_irongate_private.registers = (volatile u8 *) ioremap(temp, 4096);
amd_irongate_private.registers = (volatile u8 __iomem *) ioremap(temp, 4096);
/* Write out the address of the gatt table */
OUTREG32(amd_irongate_private.registers, AMD_ATTBASE,
......@@ -263,7 +262,7 @@ static void amd_irongate_cleanup(void)
pci_read_config_dword(agp_bridge->dev, AMD_APSIZE, &temp);
temp = ((temp & ~(0x0000000f)) | previous_size->size_value);
pci_write_config_dword(agp_bridge->dev, AMD_APSIZE, temp);
iounmap((void *) amd_irongate_private.registers);
iounmap((void __iomem *) amd_irongate_private.registers);
}
/*
......@@ -282,7 +281,7 @@ static void amd_irongate_tlbflush(struct agp_memory *temp)
static int amd_insert_memory(struct agp_memory *mem, off_t pg_start, int type)
{
int i, j, num_entries;
unsigned long *cur_gatt;
unsigned long __iomem *cur_gatt;
unsigned long addr;
num_entries = A_SIZE_LVL2(agp_bridge->current_size)->num_entries;
......@@ -297,7 +296,7 @@ static int amd_insert_memory(struct agp_memory *mem, off_t pg_start, int type)
while (j < (pg_start + mem->page_count)) {
addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
cur_gatt = GET_GATT(addr);
if (!PGE_EMPTY(agp_bridge, cur_gatt[GET_GATT_OFF(addr)]))
if (!PGE_EMPTY(agp_bridge, readl(cur_gatt+GET_GATT_OFF(addr))))
return -EBUSY;
j++;
}
......@@ -310,8 +309,7 @@ static int amd_insert_memory(struct agp_memory *mem, off_t pg_start, int type)
for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
cur_gatt = GET_GATT(addr);
cur_gatt[GET_GATT_OFF(addr)] =
agp_generic_mask_memory(mem->memory[i], mem->type);
writel(agp_generic_mask_memory(mem->memory[i], mem->type), cur_gatt+GET_GATT_OFF(addr));
}
amd_irongate_tlbflush(mem);
return 0;
......@@ -320,7 +318,7 @@ static int amd_insert_memory(struct agp_memory *mem, off_t pg_start, int type)
static int amd_remove_memory(struct agp_memory *mem, off_t pg_start, int type)
{
int i;
unsigned long *cur_gatt;
unsigned long __iomem *cur_gatt;
unsigned long addr;
if (type != 0 || mem->type != 0)
......@@ -329,8 +327,7 @@ static int amd_remove_memory(struct agp_memory *mem, off_t pg_start, int type)
for (i = pg_start; i < (mem->page_count + pg_start); i++) {
addr = (i * PAGE_SIZE) + agp_bridge->gart_bus_addr;
cur_gatt = GET_GATT(addr);
cur_gatt[GET_GATT_OFF(addr)] =
(unsigned long) agp_bridge->scratch_page;
writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr));
}
amd_irongate_tlbflush(mem);
......
drivers/char/agp/amd64-agp.c
View file @ e45a1907
......@@ -73,7 +73,7 @@ static void amd64_tlbflush(struct agp_memory *temp)
static int amd64_insert_memory(struct agp_memory *mem, off_t pg_start, int type)
{
int i, j, num_entries;
long tmp;
long long tmp;
u32 pte;
num_entries = agp_num_entries();
......@@ -90,7 +90,7 @@ static int amd64_insert_memory(struct agp_memory *mem, off_t pg_start, int type)
/* gatt table should be empty. */
while (j < (pg_start + mem->page_count)) {
if (!PGE_EMPTY(agp_bridge, agp_bridge->gatt_table[j]))
if (!PGE_EMPTY(agp_bridge, readl(agp_bridge->gatt_table+j)))
return -EBUSY;
j++;
}
......@@ -108,7 +108,7 @@ static int amd64_insert_memory(struct agp_memory *mem, off_t pg_start, int type)
pte |=(tmp & 0x00000000fffff000ULL);
pte |= GPTE_VALID | GPTE_COHERENT;
agp_bridge->gatt_table[j] = pte;
writel(pte, agp_bridge->gatt_table+j);
}
amd64_tlbflush(mem);
return 0;
......
drivers/char/agp/ati-agp.c
View file @ e45a1907
......@@ -42,11 +42,11 @@ static struct gatt_mask ati_generic_masks[] =
typedef struct _ati_page_map {
unsigned long *real;
unsigned long *remapped;
unsigned long __iomem *remapped;
} ati_page_map;
static struct _ati_generic_private {
volatile u8 *registers;
volatile u8 __iomem *registers;
ati_page_map **gatt_pages;
int num_tables;
} ati_generic_private;
......@@ -76,7 +76,7 @@ static int ati_create_page_map(ati_page_map *page_map)
global_cache_flush();
for(i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++)
page_map->remapped[i] = agp_bridge->scratch_page;
writel(agp_bridge->scratch_page, page_map->remapped+i);
return 0;
}
......@@ -206,7 +206,7 @@ static void ati_cleanup(void)
temp = ((temp & ~(0x0000000f)) | previous_size->size_value);
pci_write_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, temp);
}
iounmap((void *) ati_generic_private.registers);
iounmap((volatile u8 __iomem *)ati_generic_private.registers);
}
......@@ -217,7 +217,7 @@ static int ati_configure(void)
/* Get the memory mapped registers */
pci_read_config_dword(agp_bridge->dev, ATI_GART_MMBASE_ADDR, &temp);
temp = (temp & 0xfffff000);
ati_generic_private.registers = (volatile u8 *) ioremap(temp, 4096);
ati_generic_private.registers = (volatile u8 __iomem *) ioremap(temp, 4096);
if (is_r200())
pci_write_config_dword(agp_bridge->dev, ATI_RS100_IG_AGPMODE, 0x20000);
......@@ -261,7 +261,7 @@ static int ati_insert_memory(struct agp_memory * mem,
off_t pg_start, int type)
{
int i, j, num_entries;
unsigned long *cur_gatt;
unsigned long __iomem *cur_gatt;
unsigned long addr;
num_entries = A_SIZE_LVL2(agp_bridge->current_size)->num_entries;
......@@ -276,7 +276,7 @@ static int ati_insert_memory(struct agp_memory * mem,
while (j < (pg_start + mem->page_count)) {
addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
cur_gatt = GET_GATT(addr);
if (!PGE_EMPTY(agp_bridge,cur_gatt[GET_GATT_OFF(addr)]))
if (!PGE_EMPTY(agp_bridge,readl(cur_gatt+GET_GATT_OFF(addr))))
return -EBUSY;
j++;
}
......@@ -290,8 +290,7 @@ static int ati_insert_memory(struct agp_memory * mem,
for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
cur_gatt = GET_GATT(addr);
cur_gatt[GET_GATT_OFF(addr)] =
agp_bridge->driver->mask_memory(mem->memory[i], mem->type);
writel(agp_bridge->driver->mask_memory(mem->memory[i], mem->type), cur_gatt+GET_GATT_OFF(addr));
}
agp_bridge->driver->tlb_flush(mem);
return 0;
......@@ -301,7 +300,7 @@ static int ati_remove_memory(struct agp_memory * mem, off_t pg_start,
int type)
{
int i;
unsigned long *cur_gatt;
unsigned long __iomem *cur_gatt;
unsigned long addr;
if (type != 0 || mem->type != 0) {
......@@ -310,8 +309,7 @@ static int ati_remove_memory(struct agp_memory * mem, off_t pg_start,
for (i = pg_start; i < (mem->page_count + pg_start); i++) {
addr = (i * PAGE_SIZE) + agp_bridge->gart_bus_addr;
cur_gatt = GET_GATT(addr);
cur_gatt[GET_GATT_OFF(addr)] =
(unsigned long) agp_bridge->scratch_page;
writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr));
}
agp_bridge->driver->tlb_flush(mem);
......@@ -340,7 +338,7 @@ static int ati_create_gatt_table(void)
}
agp_bridge->gatt_table_real = (u32 *)page_dir.real;
agp_bridge->gatt_table = (u32 *)page_dir.remapped;
agp_bridge->gatt_table = (u32 __iomem *) page_dir.remapped;
agp_bridge->gatt_bus_addr = virt_to_bus(page_dir.real);
/* Write out the size register */
......@@ -371,9 +369,8 @@ static int ati_create_gatt_table(void)
/* Calculate the agp offset */
for(i = 0; i < value->num_entries / 1024; i++, addr += 0x00400000) {
page_dir.remapped[GET_PAGE_DIR_OFF(addr)] =
virt_to_bus(ati_generic_private.gatt_pages[i]->real);
page_dir.remapped[GET_PAGE_DIR_OFF(addr)] |= 0x00000001;
writel(virt_to_bus(ati_generic_private.gatt_pages[i]->real) | 1,
page_dir.remapped+GET_PAGE_DIR_OFF(addr));
}
return 0;
......@@ -384,7 +381,7 @@ static int ati_free_gatt_table(void)
ati_page_map page_dir;
page_dir.real = (unsigned long *)agp_bridge->gatt_table_real;
page_dir.remapped = (unsigned long *)agp_bridge->gatt_table;
page_dir.remapped = (unsigned long __iomem *)agp_bridge->gatt_table;
ati_free_gatt_pages();
ati_free_page_map(&page_dir);
......
drivers/char/agp/generic.c
View file @ e45a1907
......@@ -35,6 +35,7 @@
#include <linux/pm.h>
#include <linux/agp_backend.h>
#include <linux/vmalloc.h>
#include <asm/io.h>
#include "agp.h"
__u32 *agp_gatt_table;
......@@ -737,7 +738,7 @@ int agp_generic_create_gatt_table(void)
/* AK: bogus, should encode addresses > 4GB */
for (i = 0; i < num_entries; i++)
agp_bridge->gatt_table[i] = (unsigned long) agp_bridge->scratch_page;
writel(agp_bridge->scratch_page, agp_bridge->gatt_table+i);
return 0;
}
......@@ -843,9 +844,8 @@ int agp_generic_insert_memory(struct agp_memory * mem, off_t pg_start, int type)
j = pg_start;
while (j < (pg_start + mem->page_count)) {
if (!PGE_EMPTY(agp_bridge, agp_bridge->gatt_table[j])) {
if (!PGE_EMPTY(agp_bridge, readl(agp_bridge->gatt_table+j)))
return -EBUSY;
}
j++;
}
......@@ -855,9 +855,7 @@ int agp_generic_insert_memory(struct agp_memory * mem, off_t pg_start, int type)
}
for (i = 0, j = pg_start; i < mem->page_count; i++, j++)
agp_bridge->gatt_table[j] =
agp_bridge->driver->mask_memory(
mem->memory[i], mem->type);
writel(agp_bridge->driver->mask_memory(mem->memory[i], mem->type), agp_bridge->gatt_table+j);
agp_bridge->driver->tlb_flush(mem);
return 0;
......@@ -875,10 +873,8 @@ int agp_generic_remove_memory(struct agp_memory *mem, off_t pg_start, int type)
}
/* AK: bogus, should encode addresses > 4GB */
for (i = pg_start; i < (mem->page_count + pg_start); i++) {
agp_bridge->gatt_table[i] =
(unsigned long) agp_bridge->scratch_page;
}
for (i = pg_start; i < (mem->page_count + pg_start); i++)
writel(agp_bridge->scratch_page, agp_bridge->gatt_table+i);
agp_bridge->driver->tlb_flush(mem);
return 0;
......
drivers/char/agp/intel-agp.c
View file @ e45a1907
......@@ -202,7 +202,7 @@ static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
return -EINVAL;
}
for (j = pg_start; j < (pg_start + mem->page_count); j++) {
if (!PGE_EMPTY(agp_bridge, agp_bridge->gatt_table[j]))
if (!PGE_EMPTY(agp_bridge, readl(agp_bridge->gatt_table+j)))
return -EBUSY;
}
......@@ -1768,6 +1768,7 @@ static struct pci_device_id agp_intel_pci_table[] = {
ID(PCI_DEVICE_ID_INTEL_82875_HB),
ID(PCI_DEVICE_ID_INTEL_7505_0),
ID(PCI_DEVICE_ID_INTEL_7205_0),
ID(PCI_DEVICE_ID_INTEL_82915G_HB),
{ }
};
......
drivers/char/agp/intel-mch-agp.c
View file @ e45a1907
......@@ -84,7 +84,7 @@ static struct aper_size_info_fixed intel_i830_sizes[] =
static struct _intel_i830_private {
struct pci_dev *i830_dev; /* device one */
volatile u8 *registers;
volatile u8 __iomem *registers;
int gtt_entries;
} intel_i830_private;
......@@ -172,7 +172,7 @@ static int intel_i830_create_gatt_table(void)
pci_read_config_dword(intel_i830_private.i830_dev,I810_MMADDR,&temp);
temp &= 0xfff80000;
intel_i830_private.registers = (volatile u8 *) ioremap(temp,128 * 4096);
intel_i830_private.registers = (volatile u8 __iomem*) ioremap(temp,128 * 4096);
if (!intel_i830_private.registers)
return (-ENOMEM);
......@@ -255,7 +255,7 @@ static int intel_i830_configure(void)
static void intel_i830_cleanup(void)
{
iounmap((void *) intel_i830_private.registers);
iounmap((void __iomem *) intel_i830_private.registers);
}
static int intel_i830_insert_entries(struct agp_memory *mem,off_t pg_start,
......
drivers/char/agp/nvidia-agp.c
View file @ e45a1907
......@@ -28,7 +28,7 @@ static struct _nvidia_private {
struct pci_dev *dev_1;
struct pci_dev *dev_2;
struct pci_dev *dev_3;
volatile u32 *aperture;
volatile u32 __iomem *aperture;
int num_active_entries;
off_t pg_offset;
u32 wbc_mask;
......@@ -154,7 +154,7 @@ static int nvidia_configure(void)
/* map aperture */
nvidia_private.aperture =
(volatile u32 *) ioremap(apbase, 33 * PAGE_SIZE);
(volatile u32 __iomem *) ioremap(apbase, 33 * PAGE_SIZE);
return 0;
}
......@@ -173,7 +173,7 @@ static void nvidia_cleanup(void)
pci_write_config_dword(nvidia_private.dev_2, NVIDIA_2_GARTCTRL, temp & ~(0x11));
/* unmap aperture */
iounmap((void *) nvidia_private.aperture);
iounmap((void __iomem *) nvidia_private.aperture);
/* restore previous aperture size */
previous_size = A_SIZE_8(agp_bridge->previous_size);
......@@ -206,7 +206,7 @@ static int nvidia_insert_memory(struct agp_memory *mem, off_t pg_start, int type
return -EINVAL;
for(j = pg_start; j < (pg_start + mem->page_count); j++) {
if (!PGE_EMPTY(agp_bridge, agp_bridge->gatt_table[nvidia_private.pg_offset + j]))
if (!PGE_EMPTY(agp_bridge, readl(agp_bridge->gatt_table+nvidia_private.pg_offset+j)))
return -EBUSY;
}
......@@ -215,9 +215,8 @@ static int nvidia_insert_memory(struct agp_memory *mem, off_t pg_start, int type
mem->is_flushed = TRUE;
}
for (i = 0, j = pg_start; i < mem->page_count; i++, j++)
agp_bridge->gatt_table[nvidia_private.pg_offset + j] =
agp_bridge->driver->mask_memory(mem->memory[i], mem->type);
writel(agp_bridge->driver->mask_memory(mem->memory[i], mem->type),
agp_bridge->gatt_table+nvidia_private.pg_offset+j);
agp_bridge->driver->tlb_flush(mem);
return 0;
}
......@@ -229,11 +228,9 @@ static int nvidia_remove_memory(struct agp_memory *mem, off_t pg_start, int type
if ((type != 0) || (mem->type != 0))
return -EINVAL;
for (i = pg_start; i < (mem->page_count + pg_start); i++) {
agp_bridge->gatt_table[nvidia_private.pg_offset + i] =
(unsigned long) agp_bridge->scratch_page;
}
for (i = pg_start; i < (mem->page_count + pg_start); i++)
writel(agp_bridge->scratch_page, agp_bridge->gatt_table+nvidia_private.pg_offset+i);
agp_bridge->driver->tlb_flush(mem);
return 0;
......@@ -265,9 +262,9 @@ static void nvidia_tlbflush(struct agp_memory *mem)
/* flush TLB entries */
for(i = 0; i < 32 + 1; i++)
temp = nvidia_private.aperture[i * PAGE_SIZE / sizeof(u32)];
temp = readl(nvidia_private.aperture+(i * PAGE_SIZE / sizeof(u32)));
for(i = 0; i < 32 + 1; i++)
temp = nvidia_private.aperture[i * PAGE_SIZE / sizeof(u32)];
temp = readl(nvidia_private.aperture+(i * PAGE_SIZE / sizeof(u32)));
}
......
drivers/char/agp/sworks-agp.c
View file @ e45a1907
......@@ -27,12 +27,12 @@
struct serverworks_page_map {
unsigned long *real;
unsigned long *remapped;
unsigned long __iomem *remapped;
};
static struct _serverworks_private {
struct pci_dev *svrwrks_dev; /* device one */
volatile u8 *registers;
volatile u8 __iomem *registers;
struct serverworks_page_map **gatt_pages;
int num_tables;
struct serverworks_page_map scratch_dir;
......@@ -61,9 +61,8 @@ static int serverworks_create_page_map(struct serverworks_page_map *page_map)
}
global_cache_flush();
for(i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++) {
page_map->remapped[i] = agp_bridge->scratch_page;
}
for(i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++)
writel(agp_bridge->scratch_page, page_map->remapped+i);
return 0;
}
......@@ -162,10 +161,8 @@ static int serverworks_create_gatt_table(void)
}
/* Create a fake scratch directory */
for(i = 0; i < 1024; i++) {
serverworks_private.scratch_dir.remapped[i] = (unsigned long) agp_bridge->scratch_page;
page_dir.remapped[i] =
virt_to_phys(serverworks_private.scratch_dir.real);
page_dir.remapped[i] |= 0x00000001;
writel(agp_bridge->scratch_page, serverworks_private.scratch_dir.remapped+i);
writel(virt_to_phys(serverworks_private.scratch_dir.real) | 1, page_dir.remapped+i);
}
retval = serverworks_create_gatt_pages(value->num_entries / 1024);
......@@ -176,7 +173,7 @@ static int serverworks_create_gatt_table(void)
}
agp_bridge->gatt_table_real = (u32 *)page_dir.real;
agp_bridge->gatt_table = (u32 *)page_dir.remapped;
agp_bridge->gatt_table = (u32 __iomem *)page_dir.remapped;
agp_bridge->gatt_bus_addr = virt_to_phys(page_dir.real);
/* Get the address for the gart region.
......@@ -189,11 +186,8 @@ static int serverworks_create_gatt_table(void)
/* Calculate the agp offset */
for(i = 0; i < value->num_entries / 1024; i++) {
page_dir.remapped[i] =
virt_to_phys(serverworks_private.gatt_pages[i]->real);
page_dir.remapped[i] |= 0x00000001;
}
for(i = 0; i < value->num_entries / 1024; i++)
writel(virt_to_phys(serverworks_private.gatt_pages[i]->real)|1, page_dir.remapped+i);
return 0;
}
......@@ -203,7 +197,7 @@ static int serverworks_free_gatt_table(void)
struct serverworks_page_map page_dir;
page_dir.real = (unsigned long *)agp_bridge->gatt_table_real;
page_dir.remapped = (unsigned long *)agp_bridge->gatt_table;
page_dir.remapped = (unsigned long __iomem *)agp_bridge->gatt_table;
serverworks_free_gatt_pages();
serverworks_free_page_map(&page_dir);
......@@ -269,7 +263,7 @@ static int serverworks_configure(void)
/* Get the memory mapped registers */
pci_read_config_dword(agp_bridge->dev, serverworks_private.mm_addr_ofs, &temp);
temp = (temp & PCI_BASE_ADDRESS_MEM_MASK);
serverworks_private.registers = (volatile u8 *) ioremap(temp, 4096);
serverworks_private.registers = (volatile u8 __iomem *) ioremap(temp, 4096);
if (!serverworks_private.registers) {
printk (KERN_ERR PFX "Unable to ioremap() memory.\n");
return -ENOMEM;
......@@ -311,14 +305,14 @@ static int serverworks_configure(void)
static void serverworks_cleanup(void)
{
iounmap((void *) serverworks_private.registers);
iounmap((void __iomem *) serverworks_private.registers);
}
static int serverworks_insert_memory(struct agp_memory *mem,
off_t pg_start, int type)
{
int i, j, num_entries;
unsigned long *cur_gatt;
unsigned long __iomem *cur_gatt;
unsigned long addr;
num_entries = A_SIZE_LVL2(agp_bridge->current_size)->num_entries;
......@@ -334,9 +328,8 @@ static int serverworks_insert_memory(struct agp_memory *mem,
while (j < (pg_start + mem->page_count)) {
addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
cur_gatt = SVRWRKS_GET_GATT(addr);
if (!PGE_EMPTY(agp_bridge, cur_gatt[GET_GATT_OFF(addr)])) {
if (!PGE_EMPTY(agp_bridge, readl(cur_gatt+GET_GATT_OFF(addr))))
return -EBUSY;
}
j++;
}
......@@ -348,8 +341,7 @@ static int serverworks_insert_memory(struct agp_memory *mem,
for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
cur_gatt = SVRWRKS_GET_GATT(addr);
cur_gatt[GET_GATT_OFF(addr)] =
agp_bridge->driver->mask_memory(mem->memory[i], mem->type);
writel(agp_bridge->driver->mask_memory(mem->memory[i], mem->type), cur_gatt+GET_GATT_OFF(addr));
}
serverworks_tlbflush(mem);
return 0;
......@@ -359,7 +351,7 @@ static int serverworks_remove_memory(struct agp_memory *mem, off_t pg_start,
int type)
{
int i;
unsigned long *cur_gatt;
unsigned long __iomem *cur_gatt;
unsigned long addr;
if (type != 0 || mem->type != 0) {
......@@ -372,8 +364,7 @@ static int serverworks_remove_memory(struct agp_memory *mem, off_t pg_start,
for (i = pg_start; i < (mem->page_count + pg_start); i++) {
addr = (i * PAGE_SIZE) + agp_bridge->gart_bus_addr;
cur_gatt = SVRWRKS_GET_GATT(addr);
cur_gatt[GET_GATT_OFF(addr)] =
(unsigned long) agp_bridge->scratch_page;
writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr));
}
serverworks_tlbflush(mem);
......
drivers/char/agp/via-agp.c
View file @ e45a1907
......@@ -438,6 +438,33 @@ static void __devexit agp_via_remove(struct pci_dev *pdev)
agp_put_bridge(bridge);
}
#ifdef CONFIG_PM
static int agp_via_suspend(struct pci_dev *pdev, u32 state)
{
pci_save_state (pdev, pdev->saved_config_space);
pci_set_power_state (pdev, 3);
return 0;
}
static int agp_via_resume(struct pci_dev *pdev)
{
struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
pci_set_power_state (pdev, 0);
pci_restore_state(pdev, pdev->saved_config_space);
if (bridge->driver == &via_agp3_driver)
return via_configure_agp3();
else if (bridge->driver == &via_driver)
return via_configure();
return 0;
}
#endif /* CONFIG_PM */
/* must be the same order as name table above */
static struct pci_device_id agp_via_pci_table[] = {
#define ID(x) \
......@@ -487,6 +514,10 @@ static struct pci_driver agp_via_pci_driver = {
.id_table = agp_via_pci_table,
.probe = agp_via_probe,
.remove = agp_via_remove,
#ifdef CONFIG_PM
.suspend = agp_via_suspend,
.resume = agp_via_resume,
#endif
};
......
drivers/pci/hotplug/shpchp_ctrl.c
View file @ e45a1907
......@@ -2163,12 +2163,14 @@ int shpchp_disable_slot (struct slot *p_slot)
u32 rc = 0;
int ret = 0;
unsigned int devfn;
struct pci_bus *pci_bus = p_slot->ctrl->pci_dev->subordinate;
struct pci_bus *pci_bus;
struct pci_func *func;
if (!p_slot->ctrl)
return 1;
pci_bus = p_slot->ctrl->pci_dev->subordinate;
/* Check to see if (latch closed, card present, power on) */
down(&p_slot->ctrl->crit_sect);
......
drivers/serial/s3c2410.c
View file @ e45a1907
......@@ -675,7 +675,7 @@ serial_s3c2410_get_options(struct uart_port *port, int *baud,
default:
case S3C2410_LCON_PNONE:
/* nothing */
*parity = 'n';
}
/* now calculate the baud rate */
......
include/sound/asequencer.h
View file @ e45a1907
......@@ -640,7 +640,7 @@ struct sndrv_seq_queue_info {
* etc. if the queue is locked for other clients
*/
int owner; /* client id for owner of the queue */
int locked:1; /* timing queue locked for other queues */
unsigned locked:1; /* timing queue locked for other queues */
char name[64]; /* name of this queue */
unsigned int flags; /* flags */
char reserved[60]; /* for future use */
......
include/sound/pcm.h
View file @ e45a1907
......@@ -384,7 +384,7 @@ struct _snd_pcm_substream {
snd_pcm_runtime_t *runtime;
/* -- timer section -- */
snd_timer_t *timer; /* timer */
int timer_running: 1; /* time is running */
unsigned timer_running: 1; /* time is running */
spinlock_t timer_lock;
/* -- next substream -- */
snd_pcm_substream_t *next;
......
include/sound/pcm_oss.h
View file @ e45a1907
......@@ -39,10 +39,10 @@ struct _snd_pcm_oss_setup {
};
typedef struct _snd_pcm_oss_runtime {
int params: 1, /* format/parameter change */
prepare: 1, /* need to prepare the operation */
trigger: 1, /* trigger flag */
sync_trigger: 1; /* sync trigger flag */
unsigned params: 1, /* format/parameter change */
prepare: 1, /* need to prepare the operation */
trigger: 1, /* trigger flag */
sync_trigger: 1; /* sync trigger flag */
int rate; /* requested rate */
int format; /* requested OSS format */
unsigned int channels; /* requested channels */
......@@ -68,7 +68,7 @@ typedef struct _snd_pcm_oss_file {
} snd_pcm_oss_file_t;
typedef struct _snd_pcm_oss_substream {
int oss: 1; /* oss mode */
unsigned oss: 1; /* oss mode */
snd_pcm_oss_setup_t *setup; /* active setup */
snd_pcm_oss_file_t *file;
} snd_pcm_oss_substream_t;
......
include/sound/seq_kernel.h
View file @ e45a1907
......@@ -129,8 +129,8 @@ typedef struct _snd_seq_queue queue_t;
typedef struct {
void *private_data;
int allow_input: 1,
allow_output: 1;
unsigned allow_input: 1,
allow_output: 1;
/*...*/
} snd_seq_client_callback_t;
......
mm/mmap.c
View file @ e45a1907
......@@ -773,13 +773,6 @@ unsigned long do_mmap_pgoff(struct file * file, unsigned long addr,
int accountable = 1;
unsigned long charged = 0;
/*
* Does the application expect PROT_READ to imply PROT_EXEC:
*/
if (unlikely((prot & PROT_READ) &&
(current->personality & READ_IMPLIES_EXEC)))
prot |= PROT_EXEC;
if (file) {
if (is_file_hugepages(file))
accountable = 0;
......@@ -791,6 +784,15 @@ unsigned long do_mmap_pgoff(struct file * file, unsigned long addr,
(file->f_vfsmnt->mnt_flags & MNT_NOEXEC))
return -EPERM;
}
/*
* Does the application expect PROT_READ to imply PROT_EXEC?
*
* (the exception is when the underlying filesystem is noexec
* mounted, in which case we dont add PROT_EXEC.)
*/
if ((prot & PROT_READ) && (current->personality & READ_IMPLIES_EXEC))
if (!(file && (file->f_vfsmnt->mnt_flags & MNT_NOEXEC)))
prot |= PROT_EXEC;
if (!len)
return addr;
......
sound/pci/intel8x0.c
View file @ e45a1907
......@@ -418,13 +418,13 @@ struct _snd_intel8x0 {
snd_pcm_t *pcm[6];
ichdev_t ichd[6];
int multi4: 1,
multi6: 1,
smp20bit: 1;
int in_ac97_init: 1,
in_sdin_init: 1;
int fix_nocache: 1; /* workaround for 440MX */
int buggy_irq: 1; /* workaround for buggy mobos */
unsigned multi4: 1,
multi6: 1,
smp20bit: 1;
unsigned in_ac97_init: 1,
in_sdin_init: 1;
unsigned fix_nocache: 1; /* workaround for 440MX */
unsigned buggy_irq: 1; /* workaround for buggy mobos */
ac97_bus_t *ac97_bus;
ac97_t *ac97[3];
......
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