Commit e4a68009 authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Thierry Reding

ARM: tegra: Re-add removed SoC id macro to tegra_resume()

Commit d127e9c5 ("ARM: tegra: make tegra_resume can work with current and later
chips") removed tegra_get_soc_id macro leaving used cpu register corrupted after
branching to v7_invalidate_l1() and as result causing execution of unintended
code on tegra20. Possibly it was expected that r6 would be SoC id func argument
since common cpu reset handler is setting r6 before branching to tegra_resume(),
but neither tegra20_lp1_reset() nor tegra30_lp1_reset() aren't setting r6
register before jumping to resume function. Fix it by re-adding macro.

Fixes: d127e9c5 (ARM: tegra: make tegra_resume can work with current and later chips)
Cc: <stable@vger.kernel.org> # v3.13+
Reviewed-by: default avatarFelipe Balbi <balbi@ti.com>
Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent f114040e
...@@ -51,6 +51,7 @@ ENTRY(tegra_resume) ...@@ -51,6 +51,7 @@ ENTRY(tegra_resume)
THUMB( it ne ) THUMB( it ne )
bne cpu_resume @ no bne cpu_resume @ no
tegra_get_soc_id TEGRA_APB_MISC_BASE, r6
/* Are we on Tegra20? */ /* Are we on Tegra20? */
cmp r6, #TEGRA20 cmp r6, #TEGRA20
beq 1f @ Yes beq 1f @ Yes
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment