Commit e5670e18 authored by Suravee Suthikulpanit's avatar Suravee Suthikulpanit Committed by Joerg Roedel

iommu/amd: Specify PCI segment ID when getting pci device

Upcoming AMD systems can have multiple PCI segments. Hence pass PCI
segment ID to pci_get_domain_bus_and_slot() instead of '0'.
Co-developed-by: default avatarVasant Hegde <vasant.hegde@amd.com>
Signed-off-by: default avatarVasant Hegde <vasant.hegde@amd.com>
Signed-off-by: default avatarSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Link: https://lore.kernel.org/r/20220706113825.25582-32-vasant.hegde@amd.comSigned-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent a45627ba
...@@ -1962,7 +1962,8 @@ static int __init iommu_init_pci(struct amd_iommu *iommu) ...@@ -1962,7 +1962,8 @@ static int __init iommu_init_pci(struct amd_iommu *iommu)
int cap_ptr = iommu->cap_ptr; int cap_ptr = iommu->cap_ptr;
int ret; int ret;
iommu->dev = pci_get_domain_bus_and_slot(0, PCI_BUS_NUM(iommu->devid), iommu->dev = pci_get_domain_bus_and_slot(iommu->pci_seg->id,
PCI_BUS_NUM(iommu->devid),
iommu->devid & 0xff); iommu->devid & 0xff);
if (!iommu->dev) if (!iommu->dev)
return -ENODEV; return -ENODEV;
...@@ -2025,7 +2026,8 @@ static int __init iommu_init_pci(struct amd_iommu *iommu) ...@@ -2025,7 +2026,8 @@ static int __init iommu_init_pci(struct amd_iommu *iommu)
int i, j; int i, j;
iommu->root_pdev = iommu->root_pdev =
pci_get_domain_bus_and_slot(0, iommu->dev->bus->number, pci_get_domain_bus_and_slot(iommu->pci_seg->id,
iommu->dev->bus->number,
PCI_DEVFN(0, 0)); PCI_DEVFN(0, 0));
/* /*
......
...@@ -473,7 +473,7 @@ static void dump_command(unsigned long phys_addr) ...@@ -473,7 +473,7 @@ static void dump_command(unsigned long phys_addr)
pr_err("CMD[%d]: %08x\n", i, cmd->data[i]); pr_err("CMD[%d]: %08x\n", i, cmd->data[i]);
} }
static void amd_iommu_report_rmp_hw_error(volatile u32 *event) static void amd_iommu_report_rmp_hw_error(struct amd_iommu *iommu, volatile u32 *event)
{ {
struct iommu_dev_data *dev_data = NULL; struct iommu_dev_data *dev_data = NULL;
int devid, vmg_tag, flags; int devid, vmg_tag, flags;
...@@ -485,7 +485,7 @@ static void amd_iommu_report_rmp_hw_error(volatile u32 *event) ...@@ -485,7 +485,7 @@ static void amd_iommu_report_rmp_hw_error(volatile u32 *event)
flags = (event[1] >> EVENT_FLAGS_SHIFT) & EVENT_FLAGS_MASK; flags = (event[1] >> EVENT_FLAGS_SHIFT) & EVENT_FLAGS_MASK;
spa = ((u64)event[3] << 32) | (event[2] & 0xFFFFFFF8); spa = ((u64)event[3] << 32) | (event[2] & 0xFFFFFFF8);
pdev = pci_get_domain_bus_and_slot(0, PCI_BUS_NUM(devid), pdev = pci_get_domain_bus_and_slot(iommu->pci_seg->id, PCI_BUS_NUM(devid),
devid & 0xff); devid & 0xff);
if (pdev) if (pdev)
dev_data = dev_iommu_priv_get(&pdev->dev); dev_data = dev_iommu_priv_get(&pdev->dev);
...@@ -505,7 +505,7 @@ static void amd_iommu_report_rmp_hw_error(volatile u32 *event) ...@@ -505,7 +505,7 @@ static void amd_iommu_report_rmp_hw_error(volatile u32 *event)
pci_dev_put(pdev); pci_dev_put(pdev);
} }
static void amd_iommu_report_rmp_fault(volatile u32 *event) static void amd_iommu_report_rmp_fault(struct amd_iommu *iommu, volatile u32 *event)
{ {
struct iommu_dev_data *dev_data = NULL; struct iommu_dev_data *dev_data = NULL;
int devid, flags_rmp, vmg_tag, flags; int devid, flags_rmp, vmg_tag, flags;
...@@ -518,7 +518,7 @@ static void amd_iommu_report_rmp_fault(volatile u32 *event) ...@@ -518,7 +518,7 @@ static void amd_iommu_report_rmp_fault(volatile u32 *event)
flags = (event[1] >> EVENT_FLAGS_SHIFT) & EVENT_FLAGS_MASK; flags = (event[1] >> EVENT_FLAGS_SHIFT) & EVENT_FLAGS_MASK;
gpa = ((u64)event[3] << 32) | event[2]; gpa = ((u64)event[3] << 32) | event[2];
pdev = pci_get_domain_bus_and_slot(0, PCI_BUS_NUM(devid), pdev = pci_get_domain_bus_and_slot(iommu->pci_seg->id, PCI_BUS_NUM(devid),
devid & 0xff); devid & 0xff);
if (pdev) if (pdev)
dev_data = dev_iommu_priv_get(&pdev->dev); dev_data = dev_iommu_priv_get(&pdev->dev);
...@@ -544,13 +544,14 @@ static void amd_iommu_report_rmp_fault(volatile u32 *event) ...@@ -544,13 +544,14 @@ static void amd_iommu_report_rmp_fault(volatile u32 *event)
#define IS_WRITE_REQUEST(flags) \ #define IS_WRITE_REQUEST(flags) \
((flags) & EVENT_FLAG_RW) ((flags) & EVENT_FLAG_RW)
static void amd_iommu_report_page_fault(u16 devid, u16 domain_id, static void amd_iommu_report_page_fault(struct amd_iommu *iommu,
u16 devid, u16 domain_id,
u64 address, int flags) u64 address, int flags)
{ {
struct iommu_dev_data *dev_data = NULL; struct iommu_dev_data *dev_data = NULL;
struct pci_dev *pdev; struct pci_dev *pdev;
pdev = pci_get_domain_bus_and_slot(0, PCI_BUS_NUM(devid), pdev = pci_get_domain_bus_and_slot(iommu->pci_seg->id, PCI_BUS_NUM(devid),
devid & 0xff); devid & 0xff);
if (pdev) if (pdev)
dev_data = dev_iommu_priv_get(&pdev->dev); dev_data = dev_iommu_priv_get(&pdev->dev);
...@@ -613,7 +614,7 @@ static void iommu_print_event(struct amd_iommu *iommu, void *__evt) ...@@ -613,7 +614,7 @@ static void iommu_print_event(struct amd_iommu *iommu, void *__evt)
} }
if (type == EVENT_TYPE_IO_FAULT) { if (type == EVENT_TYPE_IO_FAULT) {
amd_iommu_report_page_fault(devid, pasid, address, flags); amd_iommu_report_page_fault(iommu, devid, pasid, address, flags);
return; return;
} }
...@@ -654,10 +655,10 @@ static void iommu_print_event(struct amd_iommu *iommu, void *__evt) ...@@ -654,10 +655,10 @@ static void iommu_print_event(struct amd_iommu *iommu, void *__evt)
pasid, address, flags); pasid, address, flags);
break; break;
case EVENT_TYPE_RMP_FAULT: case EVENT_TYPE_RMP_FAULT:
amd_iommu_report_rmp_fault(event); amd_iommu_report_rmp_fault(iommu, event);
break; break;
case EVENT_TYPE_RMP_HW_ERR: case EVENT_TYPE_RMP_HW_ERR:
amd_iommu_report_rmp_hw_error(event); amd_iommu_report_rmp_hw_error(iommu, event);
break; break;
case EVENT_TYPE_INV_PPR_REQ: case EVENT_TYPE_INV_PPR_REQ:
pasid = PPR_PASID(*((u64 *)__evt)); pasid = PPR_PASID(*((u64 *)__evt));
......
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