Commit e5a06939 authored by Chris Metcalf's avatar Chris Metcalf

drivers/net/tile/: on-chip network drivers for the tile architecture

This change adds the first network driver for the tile architecture,
supporting the on-chip XGBE and GBE shims.

The infrastructure is present for the TILE-Gx networking drivers (another
three source files in the new directory) but for now the the actual
tilegx sources are waiting on releasing hardware to initial customers.

Note that arch/tile/include/hv/* are "upstream" headers from the
Tilera hypervisor and will probably benefit less from LKML review.
Signed-off-by: default avatarChris Metcalf <cmetcalf@tilera.com>
parent 239b0b44
...@@ -5828,6 +5828,7 @@ W: http://www.tilera.com/scm/ ...@@ -5828,6 +5828,7 @@ W: http://www.tilera.com/scm/
S: Supported S: Supported
F: arch/tile/ F: arch/tile/
F: drivers/char/hvc_tile.c F: drivers/char/hvc_tile.c
F: drivers/net/tile/
TLAN NETWORK DRIVER TLAN NETWORK DRIVER
M: Samuel Chessman <chessman@tux.org> M: Samuel Chessman <chessman@tux.org>
......
...@@ -137,4 +137,56 @@ static inline void finv_buffer(void *buffer, size_t size) ...@@ -137,4 +137,56 @@ static inline void finv_buffer(void *buffer, size_t size)
mb_incoherent(); mb_incoherent();
} }
/*
* Flush & invalidate a VA range that is homed remotely on a single core,
* waiting until the memory controller holds the flushed values.
*/
static inline void finv_buffer_remote(void *buffer, size_t size)
{
char *p;
int i;
/*
* Flush and invalidate the buffer out of the local L1/L2
* and request the home cache to flush and invalidate as well.
*/
__finv_buffer(buffer, size);
/*
* Wait for the home cache to acknowledge that it has processed
* all the flush-and-invalidate requests. This does not mean
* that the flushed data has reached the memory controller yet,
* but it does mean the home cache is processing the flushes.
*/
__insn_mf();
/*
* Issue a load to the last cache line, which can't complete
* until all the previously-issued flushes to the same memory
* controller have also completed. If we weren't striping
* memory, that one load would be sufficient, but since we may
* be, we also need to back up to the last load issued to
* another memory controller, which would be the point where
* we crossed an 8KB boundary (the granularity of striping
* across memory controllers). Keep backing up and doing this
* until we are before the beginning of the buffer, or have
* hit all the controllers.
*/
for (i = 0, p = (char *)buffer + size - 1;
i < (1 << CHIP_LOG_NUM_MSHIMS()) && p >= (char *)buffer;
++i) {
const unsigned long STRIPE_WIDTH = 8192;
/* Force a load instruction to issue. */
*(volatile char *)p;
/* Jump to end of previous stripe. */
p -= STRIPE_WIDTH;
p = (char *)((unsigned long)p | (STRIPE_WIDTH - 1));
}
/* Wait for the loads (and thus flushes) to have completed. */
__insn_mf();
}
#endif /* _ASM_TILE_CACHEFLUSH_H */ #endif /* _ASM_TILE_CACHEFLUSH_H */
...@@ -292,8 +292,18 @@ extern int kstack_hash; ...@@ -292,8 +292,18 @@ extern int kstack_hash;
/* Are we using huge pages in the TLB for kernel data? */ /* Are we using huge pages in the TLB for kernel data? */
extern int kdata_huge; extern int kdata_huge;
/* Support standard Linux prefetching. */
#define ARCH_HAS_PREFETCH
#define prefetch(x) __builtin_prefetch(x)
#define PREFETCH_STRIDE CHIP_L2_LINE_SIZE() #define PREFETCH_STRIDE CHIP_L2_LINE_SIZE()
/* Bring a value into the L1D, faulting the TLB if necessary. */
#ifdef __tilegx__
#define prefetch_L1(x) __insn_prefetch_l1_fault((void *)(x))
#else
#define prefetch_L1(x) __insn_prefetch_L1((void *)(x))
#endif
#else /* __ASSEMBLY__ */ #else /* __ASSEMBLY__ */
/* Do some slow action (e.g. read a slow SPR). */ /* Do some slow action (e.g. read a slow SPR). */
......
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/*
* Copyright 2010 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation, version 2.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for
* more details.
*/
/**
* Error codes returned from NetIO routines.
*/
#ifndef __NETIO_ERRORS_H__
#define __NETIO_ERRORS_H__
/**
* @addtogroup error
*
* @brief The error codes returned by NetIO functions.
*
* NetIO functions return 0 (defined as ::NETIO_NO_ERROR) on success, and
* a negative value if an error occurs.
*
* In cases where a NetIO function failed due to a error reported by
* system libraries, the error code will be the negation of the
* system errno at the time of failure. The @ref netio_strerror()
* function will deliver error strings for both NetIO and system error
* codes.
*
* @{
*/
/** The set of all NetIO errors. */
typedef enum
{
/** Operation successfully completed. */
NETIO_NO_ERROR = 0,
/** A packet was successfully retrieved from an input queue. */
NETIO_PKT = 0,
/** Largest NetIO error number. */
NETIO_ERR_MAX = -701,
/** The tile is not registered with the IPP. */
NETIO_NOT_REGISTERED = -701,
/** No packet was available to retrieve from the input queue. */
NETIO_NOPKT = -702,
/** The requested function is not implemented. */
NETIO_NOT_IMPLEMENTED = -703,
/** On a registration operation, the target queue already has the maximum
* number of tiles registered for it, and no more may be added. On a
* packet send operation, the output queue is full and nothing more can
* be queued until some of the queued packets are actually transmitted. */
NETIO_QUEUE_FULL = -704,
/** The calling process or thread is not bound to exactly one CPU. */
NETIO_BAD_AFFINITY = -705,
/** Cannot allocate memory on requested controllers. */
NETIO_CANNOT_HOME = -706,
/** On a registration operation, the IPP specified is not configured
* to support the options requested; for instance, the application
* wants a specific type of tagged headers which the configured IPP
* doesn't support. Or, the supplied configuration information is
* not self-consistent, or is out of range; for instance, specifying
* both NETIO_RECV and NETIO_NO_RECV, or asking for more than
* NETIO_MAX_SEND_BUFFERS to be preallocated. On a VLAN or bucket
* configure operation, the number of items, or the base item, was
* out of range.
*/
NETIO_BAD_CONFIG = -707,
/** Too many tiles have registered to transmit packets. */
NETIO_TOOMANY_XMIT = -708,
/** Packet transmission was attempted on a queue which was registered
with transmit disabled. */
NETIO_UNREG_XMIT = -709,
/** This tile is already registered with the IPP. */
NETIO_ALREADY_REGISTERED = -710,
/** The Ethernet link is down. The application should try again later. */
NETIO_LINK_DOWN = -711,
/** An invalid memory buffer has been specified. This may be an unmapped
* virtual address, or one which does not meet alignment requirements.
* For netio_input_register(), this error may be returned when multiple
* processes specify different memory regions to be used for NetIO
* buffers. That can happen if these processes specify explicit memory
* regions with the ::NETIO_FIXED_BUFFER_VA flag, or if tmc_cmem_init()
* has not been called by a common ancestor of the processes.
*/
NETIO_FAULT = -712,
/** Cannot combine user-managed shared memory and cache coherence. */
NETIO_BAD_CACHE_CONFIG = -713,
/** Smallest NetIO error number. */
NETIO_ERR_MIN = -713,
#ifndef __DOXYGEN__
/** Used internally to mean that no response is needed; never returned to
* an application. */
NETIO_NO_RESPONSE = 1
#endif
} netio_error_t;
/** @} */
#endif /* __NETIO_ERRORS_H__ */
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...@@ -988,8 +988,12 @@ static long __write_once initfree = 1; ...@@ -988,8 +988,12 @@ static long __write_once initfree = 1;
/* Select whether to free (1) or mark unusable (0) the __init pages. */ /* Select whether to free (1) or mark unusable (0) the __init pages. */
static int __init set_initfree(char *str) static int __init set_initfree(char *str)
{ {
strict_strtol(str, 0, &initfree); long val;
pr_info("initfree: %s free init pages\n", initfree ? "will" : "won't"); if (strict_strtol(str, 0, &val)) {
initfree = val;
pr_info("initfree: %s free init pages\n",
initfree ? "will" : "won't");
}
return 1; return 1;
} }
__setup("initfree=", set_initfree); __setup("initfree=", set_initfree);
......
...@@ -2945,6 +2945,18 @@ source "drivers/s390/net/Kconfig" ...@@ -2945,6 +2945,18 @@ source "drivers/s390/net/Kconfig"
source "drivers/net/caif/Kconfig" source "drivers/net/caif/Kconfig"
config TILE_NET
tristate "Tilera GBE/XGBE network driver support"
depends on TILE
default y
select CRC32
help
This is a standard Linux network device driver for the
on-chip Tilera Gigabit Ethernet and XAUI interfaces.
To compile this driver as a module, choose M here: the module
will be called tile_net.
config XEN_NETDEV_FRONTEND config XEN_NETDEV_FRONTEND
tristate "Xen network device frontend driver" tristate "Xen network device frontend driver"
depends on XEN depends on XEN
......
...@@ -301,3 +301,4 @@ obj-$(CONFIG_CAIF) += caif/ ...@@ -301,3 +301,4 @@ obj-$(CONFIG_CAIF) += caif/
obj-$(CONFIG_OCTEON_MGMT_ETHERNET) += octeon/ obj-$(CONFIG_OCTEON_MGMT_ETHERNET) += octeon/
obj-$(CONFIG_PCH_GBE) += pch_gbe/ obj-$(CONFIG_PCH_GBE) += pch_gbe/
obj-$(CONFIG_TILE_NET) += tile/
#
# Makefile for the TILE on-chip networking support.
#
obj-$(CONFIG_TILE_NET) += tile_net.o
ifdef CONFIG_TILEGX
tile_net-objs := tilegx.o mpipe.o iorpc_mpipe.o dma_queue.o
else
tile_net-objs := tilepro.o
endif
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