Commit e5f23736 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher

drm/amd/powerplay: refine code in amd_powerplay.c (v2)

1. use flag PP_DPM_DISABLED within powerplay
   notify amdgpu dpm state by cgs interface.
2. delete redundant virtualization check in
   powerplay

v2: squash in fix for hwmgr_init (Rex)
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 63cdc76e
...@@ -98,10 +98,6 @@ static int amdgpu_pp_early_init(void *handle) ...@@ -98,10 +98,6 @@ static int amdgpu_pp_early_init(void *handle)
amd_pp->cgs_device ? amd_pp->cgs_device : amd_pp->cgs_device ? amd_pp->cgs_device :
amd_pp->pp_handle); amd_pp->pp_handle);
if (ret == PP_DPM_DISABLED) {
adev->pm.dpm_enabled = false;
return 0;
}
return ret; return ret;
} }
...@@ -154,14 +150,6 @@ static int amdgpu_pp_hw_init(void *handle) ...@@ -154,14 +150,6 @@ static int amdgpu_pp_hw_init(void *handle)
ret = adev->powerplay.ip_funcs->hw_init( ret = adev->powerplay.ip_funcs->hw_init(
adev->powerplay.pp_handle); adev->powerplay.pp_handle);
if (ret == PP_DPM_DISABLED) {
adev->pm.dpm_enabled = false;
return 0;
}
if ((amdgpu_dpm != 0) && !amdgpu_sriov_vf(adev))
adev->pm.dpm_enabled = true;
return ret; return ret;
} }
......
...@@ -30,6 +30,8 @@ ...@@ -30,6 +30,8 @@
#include "pp_instance.h" #include "pp_instance.h"
#include "power_state.h" #include "power_state.h"
#define PP_DPM_DISABLED 0xCCCC
static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_task task_id, static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_task task_id,
void *input, void *output); void *input, void *output);
...@@ -99,10 +101,6 @@ static int pp_early_init(void *handle) ...@@ -99,10 +101,6 @@ static int pp_early_init(void *handle)
if (ret) if (ret)
return -EINVAL; return -EINVAL;
if ((pp_handle->pm_en == 0)
|| cgs_is_virtualization_enabled(pp_handle->device))
return PP_DPM_DISABLED;
return 0; return 0;
} }
...@@ -114,7 +112,7 @@ static int pp_sw_init(void *handle) ...@@ -114,7 +112,7 @@ static int pp_sw_init(void *handle)
ret = pp_check(pp_handle); ret = pp_check(pp_handle);
if (ret == 0 || ret == PP_DPM_DISABLED) { if (ret >= 0) {
hwmgr = pp_handle->hwmgr; hwmgr = pp_handle->hwmgr;
if (hwmgr->smumgr_funcs->smu_init == NULL) if (hwmgr->smumgr_funcs->smu_init == NULL)
...@@ -134,7 +132,7 @@ static int pp_sw_fini(void *handle) ...@@ -134,7 +132,7 @@ static int pp_sw_fini(void *handle)
struct pp_instance *pp_handle = (struct pp_instance *)handle; struct pp_instance *pp_handle = (struct pp_instance *)handle;
ret = pp_check(pp_handle); ret = pp_check(pp_handle);
if (ret == 0 || ret == PP_DPM_DISABLED) { if (ret >= 0) {
hwmgr = pp_handle->hwmgr; hwmgr = pp_handle->hwmgr;
if (hwmgr->smumgr_funcs->smu_fini == NULL) if (hwmgr->smumgr_funcs->smu_fini == NULL)
...@@ -153,7 +151,7 @@ static int pp_hw_init(void *handle) ...@@ -153,7 +151,7 @@ static int pp_hw_init(void *handle)
ret = pp_check(pp_handle); ret = pp_check(pp_handle);
if (ret == 0 || ret == PP_DPM_DISABLED) { if (ret >= 0) {
hwmgr = pp_handle->hwmgr; hwmgr = pp_handle->hwmgr;
if (hwmgr->smumgr_funcs->start_smu == NULL) if (hwmgr->smumgr_funcs->start_smu == NULL)
...@@ -165,16 +163,17 @@ static int pp_hw_init(void *handle) ...@@ -165,16 +163,17 @@ static int pp_hw_init(void *handle)
return -EINVAL;; return -EINVAL;;
} }
if (ret == PP_DPM_DISABLED) if (ret == PP_DPM_DISABLED)
return PP_DPM_DISABLED; goto exit;
ret = hwmgr_hw_init(pp_handle);
if (ret)
goto exit;
} }
return ret;
ret = hwmgr_hw_init(pp_handle); exit:
if (ret)
goto err;
return 0;
err:
pp_handle->pm_en = 0; pp_handle->pm_en = 0;
return PP_DPM_DISABLED; cgs_notify_dpm_enabled(hwmgr->device, false);
return 0;
} }
static int pp_hw_fini(void *handle) static int pp_hw_fini(void *handle)
...@@ -275,39 +274,34 @@ static int pp_suspend(void *handle) ...@@ -275,39 +274,34 @@ static int pp_suspend(void *handle)
int ret = 0; int ret = 0;
ret = pp_check(pp_handle); ret = pp_check(pp_handle);
if (ret == 0)
if (ret == PP_DPM_DISABLED) hwmgr_hw_suspend(pp_handle);
return 0; return 0;
else if (ret != 0)
return ret;
return hwmgr_hw_suspend(pp_handle);
} }
static int pp_resume(void *handle) static int pp_resume(void *handle)
{ {
struct pp_hwmgr *hwmgr; struct pp_hwmgr *hwmgr;
int ret, ret1; int ret;
struct pp_instance *pp_handle = (struct pp_instance *)handle; struct pp_instance *pp_handle = (struct pp_instance *)handle;
ret1 = pp_check(pp_handle); ret = pp_check(pp_handle);
if (ret1 != 0 && ret1 != PP_DPM_DISABLED) if (ret < 0)
return ret1; return ret;
hwmgr = pp_handle->hwmgr; hwmgr = pp_handle->hwmgr;
if (hwmgr->smumgr_funcs->start_smu == NULL) if (hwmgr->smumgr_funcs->start_smu == NULL)
return -EINVAL; return -EINVAL;
ret = hwmgr->smumgr_funcs->start_smu(pp_handle->hwmgr); if (hwmgr->smumgr_funcs->start_smu(pp_handle->hwmgr)) {
if (ret) {
pr_err("smc start failed\n"); pr_err("smc start failed\n");
hwmgr->smumgr_funcs->smu_fini(pp_handle->hwmgr); hwmgr->smumgr_funcs->smu_fini(pp_handle->hwmgr);
return ret; return -EINVAL;
} }
if (ret1 == PP_DPM_DISABLED) if (ret == PP_DPM_DISABLED)
return 0; return 0;
return hwmgr_hw_resume(pp_handle); return hwmgr_hw_resume(pp_handle);
...@@ -1190,9 +1184,6 @@ int amd_powerplay_reset(void *handle) ...@@ -1190,9 +1184,6 @@ int amd_powerplay_reset(void *handle)
struct pp_instance *instance = (struct pp_instance *)handle; struct pp_instance *instance = (struct pp_instance *)handle;
int ret; int ret;
if (cgs_is_virtualization_enabled(instance->hwmgr->device))
return PP_DPM_DISABLED;
ret = pp_check(instance); ret = pp_check(instance);
if (ret != 0) if (ret != 0)
return ret; return ret;
...@@ -1203,7 +1194,7 @@ int amd_powerplay_reset(void *handle) ...@@ -1203,7 +1194,7 @@ int amd_powerplay_reset(void *handle)
ret = hwmgr_hw_init(instance); ret = hwmgr_hw_init(instance);
if (ret) if (ret)
return PP_DPM_DISABLED; return ret;
return hwmgr_handle_task(instance, AMD_PP_TASK_COMPLETE_INIT, NULL, NULL); return hwmgr_handle_task(instance, AMD_PP_TASK_COMPLETE_INIT, NULL, NULL);
} }
......
...@@ -33,8 +33,6 @@ ...@@ -33,8 +33,6 @@
extern const struct amd_ip_funcs pp_ip_funcs; extern const struct amd_ip_funcs pp_ip_funcs;
extern const struct amd_pm_funcs pp_dpm_funcs; extern const struct amd_pm_funcs pp_dpm_funcs;
#define PP_DPM_DISABLED 0xCCCC
enum amd_pp_sensors { enum amd_pp_sensors {
AMDGPU_PP_SENSOR_GFX_SCLK = 0, AMDGPU_PP_SENSOR_GFX_SCLK = 0,
AMDGPU_PP_SENSOR_VDDNB, AMDGPU_PP_SENSOR_VDDNB,
......
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