Commit e615be89 authored by Dave Jones's avatar Dave Jones Committed by Dave Jones

[CPUFREQ] Transmeta longrun driver fix.

(From Stelian Pop)
Upon investigation, the reason is that trying to set the performance
to 80% in longrun_determine_freqs leaves the performance to 100%.
The performance level, at least on this particular model, can be lowered
only in 33% steps. And in order to put the performance to 66%, the
code should try to set the barrier to 70%.
                                                                                                           
The following patch does even more, it tries every value from 80%
to 10% in 10% steps, until it succeeds in lowering the performance.
I'm not sure this is the best way to do it but in any case,
it works for me (and should continue to work for everybody else).
parent 234658da
...@@ -142,6 +142,7 @@ static unsigned int __init longrun_determine_freqs(unsigned int *low_freq, ...@@ -142,6 +142,7 @@ static unsigned int __init longrun_determine_freqs(unsigned int *low_freq,
u32 msr_lo, msr_hi; u32 msr_lo, msr_hi;
u32 save_lo, save_hi; u32 save_lo, save_hi;
u32 eax, ebx, ecx, edx; u32 eax, ebx, ecx, edx;
u32 try_hi;
struct cpuinfo_x86 *c = cpu_data; struct cpuinfo_x86 *c = cpu_data;
if (!low_freq || !high_freq) if (!low_freq || !high_freq)
...@@ -184,12 +185,14 @@ static unsigned int __init longrun_determine_freqs(unsigned int *low_freq, ...@@ -184,12 +185,14 @@ static unsigned int __init longrun_determine_freqs(unsigned int *low_freq,
* upper limit to make the calculation more accurate. * upper limit to make the calculation more accurate.
*/ */
cpuid(0x80860007, &eax, &ebx, &ecx, &edx); cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
if (ecx > 90) { /* try decreasing in 10% steps, some processors react only
/* set to 0 to 80 perf_pctg */ * on some barrier values */
for (try_hi = 80; try_hi > 0 && ecx > 90; try_hi -=10) {
/* set to 0 to try_hi perf_pctg */
msr_lo &= 0xFFFFFF80; msr_lo &= 0xFFFFFF80;
msr_hi &= 0xFFFFFF80; msr_hi &= 0xFFFFFF80;
msr_lo |= 0; msr_lo |= 0;
msr_hi |= 80; msr_hi |= try_hi;
wrmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi); wrmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
/* read out current core MHz and current perf_pctg */ /* read out current core MHz and current perf_pctg */
......
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