Commit e80ca013 authored by Daniel Pieczko's avatar Daniel Pieczko Committed by David S. Miller

sfc: add "port_" prefix to MAC stats

The MAC stats are per-port and will only be displayed on the PF
with control of the link (one per physical port). Vadapter stats
will also be displayed for this PF, so distinguish the MAC stats
by adding a prefix of "port_".
Signed-off-by: default avatarShradha Shah <sshah@solarflare.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 1d051e00
This diff is collapsed.
...@@ -2891,11 +2891,11 @@ ...@@ -2891,11 +2891,11 @@
/* enum: RXDP counter: Number of times an emergency descriptor fetch was /* enum: RXDP counter: Number of times an emergency descriptor fetch was
* performed. Valid for EF10 with PM_AND_RXDP_COUNTERS capability only. * performed. Valid for EF10 with PM_AND_RXDP_COUNTERS capability only.
*/ */
#define MC_CMD_MAC_RXDP_EMERGENCY_FETCH_CONDITIONS 0x47 #define MC_CMD_MAC_RXDP_HLB_FETCH_CONDITIONS 0x47
/* enum: RXDP counter: Number of times the DPCPU waited for an existing /* enum: RXDP counter: Number of times the DPCPU waited for an existing
* descriptor fetch. Valid for EF10 with PM_AND_RXDP_COUNTERS capability only. * descriptor fetch. Valid for EF10 with PM_AND_RXDP_COUNTERS capability only.
*/ */
#define MC_CMD_MAC_RXDP_EMERGENCY_WAIT_CONDITIONS 0x48 #define MC_CMD_MAC_RXDP_HLB_WAIT_CONDITIONS 0x48
/* enum: Start of GMAC stats buffer space, for Siena only. */ /* enum: Start of GMAC stats buffer space, for Siena only. */
#define MC_CMD_GMAC_DMABUF_START 0x40 #define MC_CMD_GMAC_DMABUF_START 0x40
/* enum: End of GMAC stats buffer space, for Siena only. */ /* enum: End of GMAC stats buffer space, for Siena only. */
......
...@@ -407,59 +407,59 @@ struct siena_nic_data { ...@@ -407,59 +407,59 @@ struct siena_nic_data {
}; };
enum { enum {
EF10_STAT_tx_bytes = GENERIC_STAT_COUNT, EF10_STAT_port_tx_bytes = GENERIC_STAT_COUNT,
EF10_STAT_tx_packets, EF10_STAT_port_tx_packets,
EF10_STAT_tx_pause, EF10_STAT_port_tx_pause,
EF10_STAT_tx_control, EF10_STAT_port_tx_control,
EF10_STAT_tx_unicast, EF10_STAT_port_tx_unicast,
EF10_STAT_tx_multicast, EF10_STAT_port_tx_multicast,
EF10_STAT_tx_broadcast, EF10_STAT_port_tx_broadcast,
EF10_STAT_tx_lt64, EF10_STAT_port_tx_lt64,
EF10_STAT_tx_64, EF10_STAT_port_tx_64,
EF10_STAT_tx_65_to_127, EF10_STAT_port_tx_65_to_127,
EF10_STAT_tx_128_to_255, EF10_STAT_port_tx_128_to_255,
EF10_STAT_tx_256_to_511, EF10_STAT_port_tx_256_to_511,
EF10_STAT_tx_512_to_1023, EF10_STAT_port_tx_512_to_1023,
EF10_STAT_tx_1024_to_15xx, EF10_STAT_port_tx_1024_to_15xx,
EF10_STAT_tx_15xx_to_jumbo, EF10_STAT_port_tx_15xx_to_jumbo,
EF10_STAT_rx_bytes, EF10_STAT_port_rx_bytes,
EF10_STAT_rx_bytes_minus_good_bytes, EF10_STAT_port_rx_bytes_minus_good_bytes,
EF10_STAT_rx_good_bytes, EF10_STAT_port_rx_good_bytes,
EF10_STAT_rx_bad_bytes, EF10_STAT_port_rx_bad_bytes,
EF10_STAT_rx_packets, EF10_STAT_port_rx_packets,
EF10_STAT_rx_good, EF10_STAT_port_rx_good,
EF10_STAT_rx_bad, EF10_STAT_port_rx_bad,
EF10_STAT_rx_pause, EF10_STAT_port_rx_pause,
EF10_STAT_rx_control, EF10_STAT_port_rx_control,
EF10_STAT_rx_unicast, EF10_STAT_port_rx_unicast,
EF10_STAT_rx_multicast, EF10_STAT_port_rx_multicast,
EF10_STAT_rx_broadcast, EF10_STAT_port_rx_broadcast,
EF10_STAT_rx_lt64, EF10_STAT_port_rx_lt64,
EF10_STAT_rx_64, EF10_STAT_port_rx_64,
EF10_STAT_rx_65_to_127, EF10_STAT_port_rx_65_to_127,
EF10_STAT_rx_128_to_255, EF10_STAT_port_rx_128_to_255,
EF10_STAT_rx_256_to_511, EF10_STAT_port_rx_256_to_511,
EF10_STAT_rx_512_to_1023, EF10_STAT_port_rx_512_to_1023,
EF10_STAT_rx_1024_to_15xx, EF10_STAT_port_rx_1024_to_15xx,
EF10_STAT_rx_15xx_to_jumbo, EF10_STAT_port_rx_15xx_to_jumbo,
EF10_STAT_rx_gtjumbo, EF10_STAT_port_rx_gtjumbo,
EF10_STAT_rx_bad_gtjumbo, EF10_STAT_port_rx_bad_gtjumbo,
EF10_STAT_rx_overflow, EF10_STAT_port_rx_overflow,
EF10_STAT_rx_align_error, EF10_STAT_port_rx_align_error,
EF10_STAT_rx_length_error, EF10_STAT_port_rx_length_error,
EF10_STAT_rx_nodesc_drops, EF10_STAT_port_rx_nodesc_drops,
EF10_STAT_rx_pm_trunc_bb_overflow, EF10_STAT_port_rx_pm_trunc_bb_overflow,
EF10_STAT_rx_pm_discard_bb_overflow, EF10_STAT_port_rx_pm_discard_bb_overflow,
EF10_STAT_rx_pm_trunc_vfifo_full, EF10_STAT_port_rx_pm_trunc_vfifo_full,
EF10_STAT_rx_pm_discard_vfifo_full, EF10_STAT_port_rx_pm_discard_vfifo_full,
EF10_STAT_rx_pm_trunc_qbb, EF10_STAT_port_rx_pm_trunc_qbb,
EF10_STAT_rx_pm_discard_qbb, EF10_STAT_port_rx_pm_discard_qbb,
EF10_STAT_rx_pm_discard_mapping, EF10_STAT_port_rx_pm_discard_mapping,
EF10_STAT_rx_dp_q_disabled_packets, EF10_STAT_port_rx_dp_q_disabled_packets,
EF10_STAT_rx_dp_di_dropped_packets, EF10_STAT_port_rx_dp_di_dropped_packets,
EF10_STAT_rx_dp_streaming_packets, EF10_STAT_port_rx_dp_streaming_packets,
EF10_STAT_rx_dp_hlb_fetch, EF10_STAT_port_rx_dp_hlb_fetch,
EF10_STAT_rx_dp_hlb_wait, EF10_STAT_port_rx_dp_hlb_wait,
EF10_STAT_COUNT EF10_STAT_COUNT
}; };
......
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