Commit e82700b8 authored by Niklas Söderlund's avatar Niklas Söderlund Committed by David S. Miller

ravb: Make it clear the information relates to maximum frame size

The struct member rx_max_buf_size was added before split descriptor
support was added. It is unclear if the value describes the full skb
frame buffer or the data descriptor buffer which can be combined into a
single skb.

Rename it to make it clear it referees to the maximum frame size and can
cover multiple descriptors.
Signed-off-by: default avatarNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: default avatarPaul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: default avatarSergey Shtylyov <s.shtylyov@omp.ru>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 4123c3fb
...@@ -1059,7 +1059,7 @@ struct ravb_hw_info { ...@@ -1059,7 +1059,7 @@ struct ravb_hw_info {
int stats_len; int stats_len;
size_t max_rx_len; size_t max_rx_len;
u32 tccr_mask; u32 tccr_mask;
u32 rx_max_buf_size; u32 rx_max_frame_size;
unsigned aligned_tx: 1; unsigned aligned_tx: 1;
/* hardware features */ /* hardware features */
......
...@@ -2684,7 +2684,7 @@ static const struct ravb_hw_info ravb_gen3_hw_info = { ...@@ -2684,7 +2684,7 @@ static const struct ravb_hw_info ravb_gen3_hw_info = {
.stats_len = ARRAY_SIZE(ravb_gstrings_stats), .stats_len = ARRAY_SIZE(ravb_gstrings_stats),
.max_rx_len = RX_BUF_SZ + RAVB_ALIGN - 1, .max_rx_len = RX_BUF_SZ + RAVB_ALIGN - 1,
.tccr_mask = TCCR_TSRQ0 | TCCR_TSRQ1 | TCCR_TSRQ2 | TCCR_TSRQ3, .tccr_mask = TCCR_TSRQ0 | TCCR_TSRQ1 | TCCR_TSRQ2 | TCCR_TSRQ3,
.rx_max_buf_size = SZ_2K, .rx_max_frame_size = SZ_2K,
.internal_delay = 1, .internal_delay = 1,
.tx_counters = 1, .tx_counters = 1,
.multi_irqs = 1, .multi_irqs = 1,
...@@ -2710,7 +2710,7 @@ static const struct ravb_hw_info ravb_gen2_hw_info = { ...@@ -2710,7 +2710,7 @@ static const struct ravb_hw_info ravb_gen2_hw_info = {
.stats_len = ARRAY_SIZE(ravb_gstrings_stats), .stats_len = ARRAY_SIZE(ravb_gstrings_stats),
.max_rx_len = RX_BUF_SZ + RAVB_ALIGN - 1, .max_rx_len = RX_BUF_SZ + RAVB_ALIGN - 1,
.tccr_mask = TCCR_TSRQ0 | TCCR_TSRQ1 | TCCR_TSRQ2 | TCCR_TSRQ3, .tccr_mask = TCCR_TSRQ0 | TCCR_TSRQ1 | TCCR_TSRQ2 | TCCR_TSRQ3,
.rx_max_buf_size = SZ_2K, .rx_max_frame_size = SZ_2K,
.aligned_tx = 1, .aligned_tx = 1,
.gptp = 1, .gptp = 1,
.nc_queues = 1, .nc_queues = 1,
...@@ -2733,7 +2733,7 @@ static const struct ravb_hw_info ravb_rzv2m_hw_info = { ...@@ -2733,7 +2733,7 @@ static const struct ravb_hw_info ravb_rzv2m_hw_info = {
.stats_len = ARRAY_SIZE(ravb_gstrings_stats), .stats_len = ARRAY_SIZE(ravb_gstrings_stats),
.max_rx_len = RX_BUF_SZ + RAVB_ALIGN - 1, .max_rx_len = RX_BUF_SZ + RAVB_ALIGN - 1,
.tccr_mask = TCCR_TSRQ0 | TCCR_TSRQ1 | TCCR_TSRQ2 | TCCR_TSRQ3, .tccr_mask = TCCR_TSRQ0 | TCCR_TSRQ1 | TCCR_TSRQ2 | TCCR_TSRQ3,
.rx_max_buf_size = SZ_2K, .rx_max_frame_size = SZ_2K,
.multi_irqs = 1, .multi_irqs = 1,
.err_mgmt_irqs = 1, .err_mgmt_irqs = 1,
.gptp = 1, .gptp = 1,
...@@ -2758,7 +2758,7 @@ static const struct ravb_hw_info gbeth_hw_info = { ...@@ -2758,7 +2758,7 @@ static const struct ravb_hw_info gbeth_hw_info = {
.stats_len = ARRAY_SIZE(ravb_gstrings_stats_gbeth), .stats_len = ARRAY_SIZE(ravb_gstrings_stats_gbeth),
.max_rx_len = ALIGN(GBETH_RX_BUFF_MAX, RAVB_ALIGN), .max_rx_len = ALIGN(GBETH_RX_BUFF_MAX, RAVB_ALIGN),
.tccr_mask = TCCR_TSRQ0, .tccr_mask = TCCR_TSRQ0,
.rx_max_buf_size = SZ_8K, .rx_max_frame_size = SZ_8K,
.aligned_tx = 1, .aligned_tx = 1,
.tx_counters = 1, .tx_counters = 1,
.carrier_counters = 1, .carrier_counters = 1,
...@@ -2967,7 +2967,8 @@ static int ravb_probe(struct platform_device *pdev) ...@@ -2967,7 +2967,8 @@ static int ravb_probe(struct platform_device *pdev)
priv->avb_link_active_low = priv->avb_link_active_low =
of_property_read_bool(np, "renesas,ether-link-active-low"); of_property_read_bool(np, "renesas,ether-link-active-low");
ndev->max_mtu = info->rx_max_buf_size - (ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN); ndev->max_mtu = info->rx_max_frame_size -
(ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN);
ndev->min_mtu = ETH_MIN_MTU; ndev->min_mtu = ETH_MIN_MTU;
/* FIXME: R-Car Gen2 has 4byte alignment restriction for tx buffer /* FIXME: R-Car Gen2 has 4byte alignment restriction for tx buffer
......
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