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Commit e87d10b2 authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'renesas-soc2-for-v3.17' of... 

Merge tag 'renesas-soc2-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

Merge "Second Round of Renesas ARM Based SoC Updates for v3.17" from Simon
Horman:

* Suspend on non-SMP update for r8a7790
* Move r8a7791.h out of mach directory.
  This is part of a multi-stage effort to move headers
  out of that directory.

* tag 'renesas-soc2-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: Allow r8a7791 to build non-SMP APMU code
  ARM: shmobile: Move r8a7791 reset code to pm-r8a7791.c
  ARM: shmobile: Allow r8a7790 to build non-SMP APMU code
  ARM: shmobile: Move r8a7790 reset code to pm-r8a7790.c
  ARM: shmobile: Use __init for APMU suspend init function
  ARM: shmobile: Adjust APMU code to build for non-SMP
  ARM: shmobile: Allow use of boot code for non-SMP case
  ARM: shmobile: Move r8a7791.h
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents e1ddcdef bfe4cfa8
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arch/arm/mach-shmobile/Makefile
View file @ e87d10b2
......@@ -34,17 +34,19 @@ obj-$(CONFIG_ARCH_R8A7791) += clock-r8a7791.o
obj-$(CONFIG_ARCH_R7S72100) += clock-r7s72100.o
endif
# CPU reset vector handling objects
cpu-y := platsmp.o headsmp.o
cpu-$(CONFIG_ARCH_R8A7790) += platsmp-apmu.o
cpu-$(CONFIG_ARCH_R8A7791) += platsmp-apmu.o
# SMP objects
smp-y := platsmp.o headsmp.o
smp-y := $(cpu-y)
smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o platsmp-scu.o
smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o platsmp-scu.o
smp-$(CONFIG_ARCH_R8A7790) += smp-r8a7790.o platsmp-apmu.o
smp-$(CONFIG_ARCH_R8A7791) += smp-r8a7791.o platsmp-apmu.o
smp-$(CONFIG_ARCH_R8A7790) += smp-r8a7790.o
smp-$(CONFIG_ARCH_R8A7791) += smp-r8a7791.o
smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o platsmp-scu.o
# IRQ objects
obj-$(CONFIG_ARCH_SH7372) += entry-intc.o
# PM objects
obj-$(CONFIG_SUSPEND) += suspend.o
obj-$(CONFIG_CPU_IDLE) += cpuidle.o
......@@ -53,8 +55,11 @@ obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o pm-rmobile.o
obj-$(CONFIG_ARCH_SH73A0) += pm-sh73a0.o
obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o pm-rmobile.o
obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o pm-rcar.o
obj-$(CONFIG_ARCH_R8A7790) += pm-r8a7790.o pm-rcar.o
obj-$(CONFIG_ARCH_R8A7791) += pm-r8a7791.o pm-rcar.o
obj-$(CONFIG_ARCH_R8A7790) += pm-r8a7790.o pm-rcar.o $(cpu-y)
obj-$(CONFIG_ARCH_R8A7791) += pm-r8a7791.o pm-rcar.o $(cpu-y)
# IRQ objects
obj-$(CONFIG_ARCH_SH7372) += entry-intc.o
# Board objects
ifdef CONFIG_ARCH_SHMOBILE_MULTI
......
arch/arm/mach-shmobile/board-koelsch-reference.c
View file @ e87d10b2
......@@ -23,11 +23,13 @@
#include <linux/kernel.h>
#include <linux/of_platform.h>
#include <linux/platform_data/rcar-du.h>
#include <mach/r8a7791.h>
#include <asm/mach/arch.h>
#include "clock.h"
#include "common.h"
#include "irqs.h"
#include "r8a7791.h"
#include "rcar-gen2.h"
/* DU */
......
arch/arm/mach-shmobile/board-koelsch.c
View file @ e87d10b2
......@@ -45,11 +45,13 @@
#include <linux/spi/flash.h>
#include <linux/spi/rspi.h>
#include <linux/spi/spi.h>
#include <mach/r8a7791.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include "common.h"
#include "irqs.h"
#include "r8a7791.h"
#include "rcar-gen2.h"
/* DU */
......
arch/arm/mach-shmobile/headsmp.S
View file @ e87d10b2
......@@ -10,14 +10,17 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/linkage.h>
#include <linux/init.h>
#include <linux/linkage.h>
#include <linux/threads.h>
#include <asm/memory.h>
#ifdef CONFIG_SMP
ENTRY(shmobile_invalidate_start)
bl v7_invalidate_l1
b secondary_startup
ENDPROC(shmobile_invalidate_start)
#endif
/*
* Reset vector for secondary CPUs.
......@@ -68,7 +71,7 @@ shmobile_smp_boot_find_mpidr:
shmobile_smp_boot_next:
add r1, r1, #1
cmp r1, #CONFIG_NR_CPUS
cmp r1, #NR_CPUS
blo shmobile_smp_boot_find_mpidr
b shmobile_smp_sleep
......@@ -85,10 +88,10 @@ ENDPROC(shmobile_smp_sleep)
.globl shmobile_smp_mpidr
shmobile_smp_mpidr:
1: .space CONFIG_NR_CPUS * 4
1: .space NR_CPUS * 4
.globl shmobile_smp_fn
shmobile_smp_fn:
2: .space CONFIG_NR_CPUS * 4
2: .space NR_CPUS * 4
.globl shmobile_smp_arg
shmobile_smp_arg:
3: .space CONFIG_NR_CPUS * 4
3: .space NR_CPUS * 4
arch/arm/mach-shmobile/platsmp-apmu.c
View file @ e87d10b2
......@@ -15,6 +15,7 @@
#include <linux/of_address.h>
#include <linux/smp.h>
#include <linux/suspend.h>
#include <linux/threads.h>
#include <asm/cacheflush.h>
#include <asm/cp15.h>
#include <asm/proc-fns.h>
......@@ -25,13 +26,13 @@
static struct {
void __iomem *iomem;
int bit;
} apmu_cpus[CONFIG_NR_CPUS];
} apmu_cpus[NR_CPUS];
#define WUPCR_OFFS 0x10
#define PSTR_OFFS 0x40
#define CPUNCR_OFFS(n) (0x100 + (0x10 * (n)))
static int apmu_power_on(void __iomem *p, int bit)
static int __maybe_unused apmu_power_on(void __iomem *p, int bit)
{
/* request power on */
writel_relaxed(BIT(bit), p + WUPCR_OFFS);
......@@ -50,7 +51,7 @@ static int apmu_power_off(void __iomem *p, int bit)
return 0;
}
static int apmu_power_off_poll(void __iomem *p, int bit)
static int __maybe_unused apmu_power_off_poll(void __iomem *p, int bit)
{
int k;
......@@ -73,7 +74,7 @@ static int apmu_wrap(int cpu, int (*fn)(void __iomem *p, int cpu))
static void apmu_init_cpu(struct resource *res, int cpu, int bit)
{
if (apmu_cpus[cpu].iomem)
if ((cpu >= ARRAY_SIZE(apmu_cpus)) || apmu_cpus[cpu].iomem)
return;
apmu_cpus[cpu].iomem = ioremap_nocache(res->start, resource_size(res));
......@@ -137,6 +138,7 @@ void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus)
apmu_parse_cfg(apmu_init_cpu);
}
#ifdef CONFIG_SMP
int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
/* For this particular CPU register boot vector */
......@@ -144,6 +146,7 @@ int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle)
return apmu_wrap(cpu, apmu_power_on);
}
#endif
#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_SUSPEND)
/* nicked from arch/arm/mach-exynos/hotplug.c */
......@@ -237,7 +240,7 @@ static int shmobile_smp_apmu_enter_suspend(suspend_state_t state)
return 0;
}
void shmobile_smp_apmu_suspend_init(void)
void __init shmobile_smp_apmu_suspend_init(void)
{
shmobile_suspend_ops.enter = shmobile_smp_apmu_enter_suspend;
}
......
arch/arm/mach-shmobile/pm-r8a7790.c
View file @ e87d10b2
......@@ -11,12 +11,22 @@
*/
#include <linux/kernel.h>
#include <linux/smp.h>
#include <asm/io.h>
#include "common.h"
#include "pm-rcar.h"
#include "r8a7790.h"
/* RST */
#define RST 0xe6160000
#define CA15BAR 0x0020
#define CA7BAR 0x0030
#define CA15RESCNT 0x0040
#define CA7RESCNT 0x0044
/* On-chip RAM */
#define MERAM 0xe8080000
/* SYSC */
#define SYSCIER 0x0c
#define SYSCIMR 0x10
......@@ -40,8 +50,33 @@ static inline void r8a7790_sysc_init(void) {}
void __init r8a7790_pm_init(void)
{
void __iomem *p;
u32 bar;
static int once;
if (!once++)
r8a7790_sysc_init();
if (once++)
return;
/* MERAM for jump stub, because BAR requires 256KB aligned address */
p = ioremap_nocache(MERAM, shmobile_boot_size);
memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
iounmap(p);
/* setup reset vectors */
p = ioremap_nocache(RST, 0x63);
bar = (MERAM >> 8) & 0xfffffc00;
writel_relaxed(bar, p + CA15BAR);
writel_relaxed(bar, p + CA7BAR);
writel_relaxed(bar | 0x10, p + CA15BAR);
writel_relaxed(bar | 0x10, p + CA7BAR);
/* de-assert reset for all CPUs */
writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
p + CA15RESCNT);
writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) | 0x5a5a0000,
p + CA7RESCNT);
iounmap(p);
r8a7790_sysc_init();
shmobile_smp_apmu_suspend_init();
}
arch/arm/mach-shmobile/pm-r8a7791.c
View file @ e87d10b2
......@@ -10,10 +10,17 @@
* for more details.
*/
#include <asm/io.h>
#include <linux/kernel.h>
#include <mach/r8a7791.h>
#include <linux/smp.h>
#include <asm/io.h>
#include "common.h"
#include "pm-rcar.h"
#include "r8a7791.h"
#define RST 0xe6160000
#define CA15BAR 0x0020
#define CA15RESCNT 0x0040
#define RAM 0xe6300000
/* SYSC */
#define SYSCIER 0x0c
......@@ -38,10 +45,29 @@ static inline void r8a7791_sysc_init(void) {}
void __init r8a7791_pm_init(void)
{
void __iomem *p;
u32 bar;
static int once;
if (once++)
return;
/* RAM for jump stub, because BAR requires 256KB aligned address */
p = ioremap_nocache(RAM, shmobile_boot_size);
memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
iounmap(p);
/* setup reset vectors */
p = ioremap_nocache(RST, 0x63);
bar = (RAM >> 8) & 0xfffffc00;
writel_relaxed(bar, p + CA15BAR);
writel_relaxed(bar | 0x10, p + CA15BAR);
/* enable clocks to all CPUs */
writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
p + CA15RESCNT);
iounmap(p);
r8a7791_sysc_init();
shmobile_smp_apmu_suspend_init();
}
arch/arm/mach-shmobile/setup-r8a7791.c
View file @ e87d10b2
......@@ -26,10 +26,12 @@
#include <linux/platform_data/irq-renesas-irqc.h>
#include <linux/serial_sci.h>
#include <linux/sh_timer.h>
#include <mach/r8a7791.h>
#include <asm/mach/arch.h>
#include "common.h"
#include "irqs.h"
#include "r8a7791.h"
#include "rcar-gen2.h"
static const struct resource pfc_resources[] __initconst = {
......
arch/arm/mach-shmobile/smp-r8a7790.c
View file @ e87d10b2
......@@ -24,13 +24,6 @@
#include "pm-rcar.h"
#include "r8a7790.h"
#define RST 0xe6160000
#define CA15BAR 0x0020
#define CA7BAR 0x0030
#define CA15RESCNT 0x0040
#define CA7RESCNT 0x0044
#define MERAM 0xe8080000
static struct rcar_sysc_ch r8a7790_ca15_scu = {
.chan_offs = 0x180, /* PWRSR5 .. PWRER5 */
.isr_bit = 12, /* CA15-SCU */
......@@ -43,35 +36,11 @@ static struct rcar_sysc_ch r8a7790_ca7_scu = {
static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)
{
void __iomem *p;
u32 bar;
/* let APMU code install data related to shmobile_boot_vector */
shmobile_smp_apmu_prepare_cpus(max_cpus);
/* MERAM for jump stub, because BAR requires 256KB aligned address */
p = ioremap_nocache(MERAM, shmobile_boot_size);
memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
iounmap(p);
/* setup reset vectors */
p = ioremap_nocache(RST, 0x63);
bar = (MERAM >> 8) & 0xfffffc00;
writel_relaxed(bar, p + CA15BAR);
writel_relaxed(bar, p + CA7BAR);
writel_relaxed(bar | 0x10, p + CA15BAR);
writel_relaxed(bar | 0x10, p + CA7BAR);
/* enable clocks to all CPUs */
writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
p + CA15RESCNT);
writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) | 0x5a5a0000,
p + CA7RESCNT);
iounmap(p);
/* turn on power to SCU */
r8a7790_pm_init();
shmobile_smp_apmu_suspend_init();
rcar_sysc_power_up(&r8a7790_ca15_scu);
rcar_sysc_power_up(&r8a7790_ca7_scu);
}
......
arch/arm/mach-shmobile/smp-r8a7791.c
View file @ e87d10b2
......@@ -17,42 +17,19 @@
#include <linux/init.h>
#include <linux/smp.h>
#include <linux/io.h>
#include <asm/smp_plat.h>
#include <mach/r8a7791.h>
#include "common.h"
#include "r8a7791.h"
#include "rcar-gen2.h"
#define RST 0xe6160000
#define CA15BAR 0x0020
#define CA15RESCNT 0x0040
#define RAM 0xe6300000
static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus)
{
void __iomem *p;
u32 bar;
/* let APMU code install data related to shmobile_boot_vector */
shmobile_smp_apmu_prepare_cpus(max_cpus);
/* RAM for jump stub, because BAR requires 256KB aligned address */
p = ioremap_nocache(RAM, shmobile_boot_size);
memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
iounmap(p);
/* setup reset vectors */
p = ioremap_nocache(RST, 0x63);
bar = (RAM >> 8) & 0xfffffc00;
writel_relaxed(bar, p + CA15BAR);
writel_relaxed(bar | 0x10, p + CA15BAR);
/* enable clocks to all CPUs */
writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
p + CA15RESCNT);
iounmap(p);
r8a7791_pm_init();
shmobile_smp_apmu_suspend_init();
}
static int r8a7791_smp_boot_secondary(unsigned int cpu,
......
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