Commit e89c5d07 authored by Kukjin Kim's avatar Kukjin Kim

ARM: S5P6442: Tidy register and disable clock usage

This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using.
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 9f6bb3f5
...@@ -340,7 +340,7 @@ void __init_or_cpufreq s5p6442_setup_clocks(void) ...@@ -340,7 +340,7 @@ void __init_or_cpufreq s5p6442_setup_clocks(void)
clk_pclkd1.rate = pclkd1; clk_pclkd1.rate = pclkd1;
} }
static struct clk init_clocks_disable[] = { static struct clk init_clocks_off[] = {
{ {
.name = "pdma", .name = "pdma",
.id = -1, .id = -1,
...@@ -408,23 +408,13 @@ static struct clk *clks[] __initdata = { ...@@ -408,23 +408,13 @@ static struct clk *clks[] __initdata = {
void __init s5p6442_register_clocks(void) void __init s5p6442_register_clocks(void)
{ {
struct clk *clkptr;
int i, ret;
s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
clkptr = init_clocks_disable; s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
for (i = 0; i < ARRAY_SIZE(init_clocks_disable); i++, clkptr++) { s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
ret = s3c24xx_register_clock(clkptr);
if (ret < 0) {
printk(KERN_ERR "Fail to register clock %s (%d)\n",
clkptr->name, ret);
} else
(clkptr->enable)(clkptr, 0);
}
s3c_pwmclk_init(); s3c_pwmclk_init();
} }
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