Commit e900db70 authored by Jakub Kicinski's avatar Jakub Kicinski Committed by Jakub Kicinski

nfp: parametrize QCP offset/size using dev_info

The queue controller (QCP) is accessed based on a device specific
offset. The NFP3800 device also supports more queues.

Furthermore, the NFP3800 VFs also access the QCP differently to how the
NFP6000 VFs accesses it, though still indirectly. Fortunately, we can
remove the offset all together for both VF types. This is safe for
NFP6000 VFs since the offset was effectively a wrap around and only used
for convenience to have it set the same as the NFP6000 PF.

Use nfp_dev_info to store queue controller parameters.
Signed-off-by: default avatarDirk van der Merwe <dirk.vandermerwe@netronome.com>
Signed-off-by: default avatarJakub Kicinski <jakub.kicinski@netronome.com>
Signed-off-by: default avatarFei Qin <fei.qin@corigine.com>
Signed-off-by: default avatarSimon Horman <simon.horman@corigine.com>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 9ba1dc99
......@@ -796,7 +796,6 @@ static inline void nn_pci_flush(struct nfp_net *nn)
* either add to a pointer or to read the pointer value.
*/
#define NFP_QCP_QUEUE_ADDR_SZ 0x800
#define NFP_QCP_QUEUE_AREA_SZ 0x80000
#define NFP_QCP_QUEUE_OFF(_x) ((_x) * NFP_QCP_QUEUE_ADDR_SZ)
#define NFP_QCP_QUEUE_ADD_RPTR 0x0000
#define NFP_QCP_QUEUE_ADD_WPTR 0x0004
......@@ -805,9 +804,6 @@ static inline void nn_pci_flush(struct nfp_net *nn)
#define NFP_QCP_QUEUE_STS_HI 0x000c
#define NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask 0x3ffff
/* The offset of a QCP queues in the PCIe Target */
#define NFP_PCIE_QUEUE(_q) (0x80000 + (NFP_QCP_QUEUE_ADDR_SZ * ((_q) & 0xff)))
/* nfp_qcp_ptr - Read or Write Pointer of a queue */
enum nfp_qcp_ptr {
NFP_QCP_READ_PTR = 0,
......@@ -876,6 +872,8 @@ static inline u32 nfp_qcp_wr_ptr_read(u8 __iomem *q)
return _nfp_qcp_read(q, NFP_QCP_WRITE_PTR);
}
u32 nfp_qcp_queue_offset(const struct nfp_dev_info *dev_info, u16 queue);
static inline bool nfp_net_is_data_vnic(struct nfp_net *nn)
{
WARN_ON_ONCE(!nn->dp.netdev && nn->port);
......
......@@ -40,6 +40,7 @@
#include <net/vxlan.h>
#include <net/xdp_sock_drv.h>
#include "nfpcore/nfp_dev.h"
#include "nfpcore/nfp_nsp.h"
#include "ccm.h"
#include "nfp_app.h"
......@@ -65,6 +66,12 @@ void nfp_net_get_fw_version(struct nfp_net_fw_version *fw_ver,
put_unaligned_le32(reg, fw_ver);
}
u32 nfp_qcp_queue_offset(const struct nfp_dev_info *dev_info, u16 queue)
{
queue &= dev_info->qc_idx_mask;
return dev_info->qc_addr_offset + NFP_QCP_QUEUE_ADDR_SZ * queue;
}
static dma_addr_t nfp_net_dma_map_rx(struct nfp_net_dp *dp, void *frag)
{
return dma_map_single_attrs(dp->dev, frag + NFP_NET_RX_BUF_HEADROOM,
......
......@@ -496,8 +496,9 @@ static int nfp_net_pci_map_mem(struct nfp_pf *pf)
}
cpp_id = NFP_CPP_ISLAND_ID(0, NFP_CPP_ACTION_RW, 0, 0);
mem = nfp_cpp_map_area(pf->cpp, "net.qc", cpp_id, NFP_PCIE_QUEUE(0),
NFP_QCP_QUEUE_AREA_SZ, &pf->qc_area);
mem = nfp_cpp_map_area(pf->cpp, "net.qc", cpp_id,
nfp_qcp_queue_offset(pf->dev_info, 0),
pf->dev_info->qc_area_sz, &pf->qc_area);
if (IS_ERR(mem)) {
nfp_err(pf->cpp, "Failed to map Queue Controller area.\n");
err = PTR_ERR(mem);
......
......@@ -40,7 +40,7 @@ static const char nfp_net_driver_name[] = "nfp_netvf";
static const struct pci_device_id nfp_netvf_pci_device_ids[] = {
{ PCI_VENDOR_ID_NETRONOME, PCI_DEVICE_ID_NETRONOME_NFP6000_VF,
PCI_VENDOR_ID_NETRONOME, PCI_ANY_ID,
PCI_ANY_ID, 0, NFP_DEV_NFP6000,
PCI_ANY_ID, 0, NFP_DEV_NFP6000_VF,
},
{ 0, } /* Required last entry. */
};
......@@ -169,9 +169,9 @@ static int nfp_netvf_pci_probe(struct pci_dev *pdev,
}
startq = readl(ctrl_bar + NFP_NET_CFG_START_TXQ);
tx_bar_off = NFP_PCIE_QUEUE(startq);
tx_bar_off = nfp_qcp_queue_offset(dev_info, startq);
startq = readl(ctrl_bar + NFP_NET_CFG_START_RXQ);
rx_bar_off = NFP_PCIE_QUEUE(startq);
rx_bar_off = nfp_qcp_queue_offset(dev_info, startq);
/* Allocate and initialise the netdev */
nn = nfp_net_alloc(pdev, dev_info, ctrl_bar, true,
......
......@@ -2,14 +2,24 @@
/* Copyright (C) 2019 Netronome Systems, Inc. */
#include <linux/dma-mapping.h>
#include <linux/kernel.h>
#include "nfp_dev.h"
const struct nfp_dev_info nfp_dev_info[NFP_DEV_CNT] = {
[NFP_DEV_NFP6000] = {
.dma_mask = DMA_BIT_MASK(40),
.qc_idx_mask = GENMASK(7, 0),
.qc_addr_offset = 0x80000,
.chip_names = "NFP4000/NFP5000/NFP6000",
.pcie_cfg_expbar_offset = 0x0400,
.pcie_expl_offset = 0x1000,
.qc_area_sz = 0x80000,
},
[NFP_DEV_NFP6000_VF] = {
.dma_mask = DMA_BIT_MASK(40),
.qc_idx_mask = GENMASK(7, 0),
.qc_addr_offset = 0,
},
};
......@@ -8,14 +8,21 @@
enum nfp_dev_id {
NFP_DEV_NFP6000,
NFP_DEV_NFP6000_VF,
NFP_DEV_CNT,
};
struct nfp_dev_info {
/* Required fields */
u64 dma_mask;
u32 qc_idx_mask;
u32 qc_addr_offset;
/* PF-only fields */
const char *chip_names;
u32 pcie_cfg_expbar_offset;
u32 pcie_expl_offset;
u32 qc_area_sz;
};
extern const struct nfp_dev_info nfp_dev_info[NFP_DEV_CNT];
......
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