[PATCH] 1081/1: addition of new header files for the Intel PXA250/210 architecture

This patch populates the linux/include/asm-arm/arch-pxa directory.

include/asm-arm/arch-pxa/dma.h

+/*
+ *  linux/include/asm-arm/arch-pxa/dma.h
+ *
+ *  Author:	Nicolas Pitre
+ *  Created:	Jun 15, 2001
+ *  Copyright:	MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_ARCH_DMA_H
+#define __ASM_ARCH_DMA_H
+
+#define MAX_DMA_ADDRESS		0xffffffff
+
+/* No DMA as the rest of the world see it */
+#define MAX_DMA_CHANNELS	0
+
+/*
+ * Descriptor structure for PXA's DMA engine
+ * Note: this structure must always be aligned to a 16-byte boundary.
+ */
+
+typedef struct {
+	volatile u32 ddadr;	/* Points to the next descriptor + flags */
+	volatile u32 dsadr;	/* DSADR value for the current transfer */
+	volatile u32 dtadr;	/* DTADR value for the current transfer */
+	volatile u32 dcmd;	/* DCMD value for the current transfer */
+} pxa_dma_desc;
+
+/*
+ * DMA registration
+ */
+
+typedef enum {
+	DMA_PRIO_HIGH = 0,
+	DMA_PRIO_MEDIUM = 4,
+	DMA_PRIO_LOW = 8
+} pxa_dma_prio;
+
+int pxa_request_dma (char *name,
+			 pxa_dma_prio prio,
+			 void (*irq_handler)(int, void *, struct pt_regs *),
+			 void *data);
+
+void pxa_free_dma (int dma_ch);
+
+#endif /* _ASM_ARCH_DMA_H */

include/asm-arm/arch-pxa/hardware.h

+/*
+ *  linux/include/asm-arm/arch-pxa/hardware.h
+ *
+ *  Author:	Nicolas Pitre
+ *  Created:	Jun 15, 2001
+ *  Copyright:	MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H
+
+#include <linux/config.h>
+#include <asm/mach-types.h>
+
+
+/*
+ * These are statically mapped PCMCIA IO space for designs using it as a
+ * generic IO bus, typically with ISA parts, hardwired IDE interfaces, etc.
+ * The actual PCMCIA code is mapping required IO region at run time.
+ */
+#define PCMCIA_IO_0_BASE	0xf6000000
+#define PCMCIA_IO_1_BASE	0xf7000000
+
+
+/*
+ * Intel PXA internal I/O mappings
+ */
+
+#define io_p2v(x)	\
+	(((x) < 0x44000000) ? ((x) - 0x40000000 + 0xfc000000) :	\
+	 ((x) < 0x48000000) ? ((x) - 0x44000000 + 0xfe000000) :	\
+	 		      ((x) - 0x48000000 + 0xff000000))
+#define io_v2p( x )	\
+	(((x) < 0xfe000000) ? ((x) - 0xfc000000 + 0x40000000) :	\
+	 ((x) < 0xff000000) ? ((x) - 0xfe000000 + 0x44000000) :	\
+	 		      ((x) - 0xff000000 + 0x48000000))
+
+#ifndef __ASSEMBLY__
+
+#if 0
+# define __REG(x)	(*((volatile u32 *)io_p2v(x)))
+#else
+/*
+ * This __REG() version gives the same results as the one above,  except
+ * that we are fooling gcc somehow so it generates far better and smaller
+ * assembly code for access to contigous registers.  It's a shame that gcc
+ * doesn't guess this by itself.
+ */
+#include <asm/types.h>
+typedef struct { volatile u32 offset[1024]; } __regbase;
+# define __REGP(x)	((__regbase *)((x)&~4095))->offset[((x)&4095)>>2]
+# define __REG(x)	__REGP(io_p2v(x))
+#endif
+
+/* Let's kick gcc's ass again... */
+# define __REG2(x,y)	\
+	( __builtin_constant_p(y) ? (__REG((x) + (y))) \
+				  : (*(volatile u32 *)((u32)&__REG(x) + (y))) )
+
+# define __PREG(x)	(io_v2p((u32)&(x)))
+
+#else
+
+# define __REG(x)	io_p2v(x)
+# define __PREG(x)	io_v2p(x)
+
+#endif
+
+#include "pxa-regs.h"
+
+#ifndef __ASSEMBLY__
+
+/*
+ * Handy routine to set GPIO alternate functions
+ */
+extern void pxa_gpio_mode( int gpio_mode );
+
+/*
+ * return current lclk frequency in units of 10kHz
+ */
+extern unsigned int get_lclk_frequency_10khz(void);
+
+#endif
+
+
+/*
+ * Implementation specifics
+ */
+
+#include "lubbock.h"
+#include "idp.h"
+
+#endif  /* _ASM_ARCH_HARDWARE_H */

include/asm-arm/arch-pxa/ide.h

+/*
+ * linux/include/asm-arm/arch-pxa/ide.h
+ *
+ * Author:	George Davis
+ * Created:	Jan 10, 2002
+ * Copyright:	MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *
+ * Originally based upon linux/include/asm-arm/arch-sa1100/ide.h
+ *
+ */
+
+#include <linux/config.h>
+#include <asm/irq.h>
+#include <asm/hardware.h>
+#include <asm/mach-types.h>
+
+
+/*
+ * Set up a hw structure for a specified data port, control port and IRQ.
+ * This should follow whatever the default interface uses.
+ */
+static __inline__ void
+ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq)
+{
+	ide_ioreg_t reg;
+	int i;
+	int regincr = 1;
+
+	memset(hw, 0, sizeof(*hw));
+
+	reg = (ide_ioreg_t)data_port;
+
+	for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
+		hw->io_ports[i] = reg;
+		reg += regincr;
+	}
+
+	hw->io_ports[IDE_CONTROL_OFFSET] = (ide_ioreg_t) ctrl_port;
+
+	if (irq)
+		*irq = 0;
+}
+
+
+/*
+ * Register the standard ports for this architecture with the IDE driver.
+ */
+static __inline__ void
+ide_init_default_hwifs(void)
+{
+	/* Nothing to declare... */
+}

include/asm-arm/arch-pxa/io.h

+/*
+ * linux/include/asm-arm/arch-pxa/io.h
+ *
+ * Copied from asm/arch/sa1100/io.h
+ */
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+#define IO_SPACE_LIMIT 0xffffffff
+
+/*
+ * We don't actually have real ISA nor PCI buses, but there is so many
+ * drivers out there that might just work if we fake them...
+ */
+#define __io(a)			(a)
+#define __mem_pci(a)		((unsigned long)(a))
+#define __mem_isa(a)		((unsigned long)(a))
+
+#endif

include/asm-arm/arch-pxa/irq.h

+/*
+ * linux/include/asm-arm/arch-pxa/irq.h
+ *
+ * Author:	Nicolas Pitre
+ * Created:	Jun 15, 2001
+ * Copyright:	MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#define fixup_irq(x)	(x)
+
+/*
+ * This prototype is required for cascading of multiplexed interrupts.
+ * Since it doesn't exist elsewhere, we'll put it here for now.
+ */
+extern void do_IRQ(int irq, struct pt_regs *regs);

include/asm-arm/arch-pxa/irqs.h

+/*
+ *  linux/include/asm-arm/arch-pxa/irqs.h
+ *
+ *  Author:	Nicolas Pitre
+ *  Created:	Jun 15, 2001
+ *  Copyright:	MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#define PXA_IRQ_SKIP	8	/* The first 8 IRQs are reserved */
+#define PXA_IRQ(x)		((x) - PXA_IRQ_SKIP)
+
+#define	IRQ_GPIO0	PXA_IRQ(8)	/* GPIO0 Edge Detect */
+#define	IRQ_GPIO1	PXA_IRQ(9)	/* GPIO1 Edge Detect */
+#define	IRQ_GPIO_2_80	PXA_IRQ(10)	/* GPIO[2-80] Edge Detect */
+#define	IRQ_USB		PXA_IRQ(11)	/* USB Service */
+#define	IRQ_PMU		PXA_IRQ(12)	/* Performance Monitoring Unit */
+#define	IRQ_I2S		PXA_IRQ(13)	/* I2S Interrupt */
+#define	IRQ_AC97	PXA_IRQ(14)	/* AC97 Interrupt */
+#define	IRQ_LCD		PXA_IRQ(17)	/* LCD Controller Service Request */
+#define	IRQ_I2C		PXA_IRQ(18)	/* I2C Service Request */
+#define	IRQ_ICP		PXA_IRQ(19)	/* ICP Transmit/Receive/Error */
+#define	IRQ_STUART	PXA_IRQ(20)	/* STUART Transmit/Receive/Error */
+#define	IRQ_BTUART	PXA_IRQ(21)	/* BTUART Transmit/Receive/Error */
+#define	IRQ_FFUART	PXA_IRQ(22)	/* FFUART Transmit/Receive/Error*/
+#define	IRQ_MMC		PXA_IRQ(23)	/* MMC Status/Error Detection */
+#define	IRQ_SSP		PXA_IRQ(24)	/* SSP Service Request */
+#define	IRQ_DMA 	PXA_IRQ(25)	/* DMA Channel Service Request */
+#define	IRQ_OST0 	PXA_IRQ(26)	/* OS Timer match 0 */
+#define	IRQ_OST1 	PXA_IRQ(27)	/* OS Timer match 1 */
+#define	IRQ_OST2 	PXA_IRQ(28)	/* OS Timer match 2 */
+#define	IRQ_OST3 	PXA_IRQ(29)	/* OS Timer match 3 */
+#define	IRQ_RTC1Hz	PXA_IRQ(30)	/* RTC HZ Clock Tick */
+#define	IRQ_RTCAlrm	PXA_IRQ(31)	/* RTC Alarm */
+
+#define GPIO_2_80_TO_IRQ(x)	\
+			PXA_IRQ((x) - 2 + 32)
+#define IRQ_GPIO(x)	(((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_80_TO_IRQ(x))
+
+#define IRQ_TO_GPIO_2_80(i)	\
+			((i) - PXA_IRQ(32) + 2)
+#define IRQ_TO_GPIO(i)	((i) - (((i) > IRQ_GPIO1) ? IRQ_GPIO(2) : IRQ_GPIO(0)))
+
+#define	NR_IRQS		(IRQ_GPIO(80) + 1)
+
+#if defined(CONFIG_SA1111)
+
+#define IRQ_SA1111_START	(IRQ_GPIO(80) + 1)
+#define SA1111_IRQ(x)		(IRQ_SA1111_START + (x))
+
+#define IRQ_GPAIN0		SA1111_IRQ(0)
+#define IRQ_GPAIN1		SA1111_IRQ(1)
+#define IRQ_GPAIN2		SA1111_IRQ(2)
+#define IRQ_GPAIN3		SA1111_IRQ(3)
+#define IRQ_GPBIN0		SA1111_IRQ(4)
+#define IRQ_GPBIN1		SA1111_IRQ(5)
+#define IRQ_GPBIN2		SA1111_IRQ(6)
+#define IRQ_GPBIN3		SA1111_IRQ(7)
+#define IRQ_GPBIN4		SA1111_IRQ(8)
+#define IRQ_GPBIN5		SA1111_IRQ(9)
+#define IRQ_GPCIN0		SA1111_IRQ(10)
+#define IRQ_GPCIN1		SA1111_IRQ(11)
+#define IRQ_GPCIN2		SA1111_IRQ(12)
+#define IRQ_GPCIN3		SA1111_IRQ(13)
+#define IRQ_GPCIN4		SA1111_IRQ(14)
+#define IRQ_GPCIN5		SA1111_IRQ(15)
+#define IRQ_GPCIN6		SA1111_IRQ(16)
+#define IRQ_GPCIN7		SA1111_IRQ(17)
+#define IRQ_MSTXINT		SA1111_IRQ(18)
+#define IRQ_MSRXINT		SA1111_IRQ(19)
+#define IRQ_MSSTOPERRINT	SA1111_IRQ(20)
+#define IRQ_TPTXINT		SA1111_IRQ(21)
+#define IRQ_TPRXINT		SA1111_IRQ(22)
+#define IRQ_TPSTOPERRINT	SA1111_IRQ(23)
+#define SSPXMTINT	SA1111_IRQ(24)
+#define SSPRCVINT	SA1111_IRQ(25)
+#define SSPROR		SA1111_IRQ(26)
+#define AUDXMTDMADONEA	SA1111_IRQ(32)
+#define AUDRCVDMADONEA	SA1111_IRQ(33)
+#define AUDXMTDMADONEB	SA1111_IRQ(34)
+#define AUDRCVDMADONEB	SA1111_IRQ(35)
+#define AUDTFSR		SA1111_IRQ(36)
+#define AUDRFSR		SA1111_IRQ(37)
+#define AUDTUR		SA1111_IRQ(38)
+#define AUDROR		SA1111_IRQ(39)
+#define AUDDTS		SA1111_IRQ(40)
+#define AUDRDD		SA1111_IRQ(41)
+#define AUDSTO		SA1111_IRQ(42)
+#define USBPWR		SA1111_IRQ(43)
+#define NIRQHCIM	SA1111_IRQ(44)
+#define HCIBUFFACC	SA1111_IRQ(45)
+#define HCIRMTWKP	SA1111_IRQ(46)
+#define NHCIMFCIR	SA1111_IRQ(47)
+#define PORT_RESUME	SA1111_IRQ(48)
+#define S0_READY_NINT	SA1111_IRQ(49)
+#define S1_READY_NINT	SA1111_IRQ(50)
+#define S0_CD_VALID	SA1111_IRQ(51)
+#define S1_CD_VALID	SA1111_IRQ(52)
+#define S0_BVD1_STSCHG	SA1111_IRQ(53)
+#define S1_BVD1_STSCHG	SA1111_IRQ(54)
+
+#define SA1111_IRQ_MAX	SA1111_IRQ(54)
+
+#undef NR_IRQS
+#define NR_IRQS		(SA1111_IRQ_MAX + 1)
+
+#endif	// defined(CONFIG_SA1111)
+
+#if defined(CONFIG_ARCH_LUBBOCK) || defined(CONFIG_ARCH_PXA_IDP)
+#if CONFIG_SA1111
+#define LUBBOCK_IRQ(x)	(SA1111_IRQ_MAX + 1 + (x))
+#else
+#define LUBBOCK_IRQ(x)	(IRQ_GPIO(80) + 1 + (x))
+#endif
+
+#define LUBBOCK_SD_IRQ		LUBBOCK_IRQ(0)
+#define LUBBOCK_SA1111_IRQ	LUBBOCK_IRQ(1)
+#define LUBBOCK_USB_IRQ		LUBBOCK_IRQ(2)
+#define LUBBOCK_ETH_IRQ		LUBBOCK_IRQ(3)
+#define LUBBOCK_UCB1400_IRQ	LUBBOCK_IRQ(4)
+#define LUBBOCK_BB_IRQ		LUBBOCK_IRQ(5)
+
+#undef NR_IRQS
+#define NR_IRQS		(LUBBOCK_IRQ(5) + 1)
+
+#endif	// CONFIG_ARCH_LUBBOCK
+
+
+

include/asm-arm/arch-pxa/keyboard.h

+/*
+ *  linux/include/asm-arm/arch-pxa/keyboard.h
+ *
+ *  This file contains the architecture specific keyboard definitions
+ */
+
+#ifndef _PXA_KEYBOARD_H
+#define _PXA_KEYBOARD_H
+
+#include <linux/config.h>
+#include <asm/mach-types.h>
+#include <asm/hardware.h>
+
+extern struct kbd_ops_struct *kbd_ops;
+
+#define kbd_disable_irq()	do { } while(0);
+#define kbd_enable_irq()	do { } while(0);
+
+extern int sa1111_kbd_init_hw(void);
+
+static inline void kbd_init_hw(void)
+{
+	if (machine_is_lubbock())
+		sa1111_kbd_init_hw();
+}
+
+
+#endif  /* _PXA_KEYBOARD_H */
+

include/asm-arm/arch-pxa/lubbock.h

+/*
+ *  linux/include/asm-arm/arch-pxa/lubbock.h
+ *
+ *  Author:	Nicolas Pitre
+ *  Created:	Jun 15, 2001
+ *  Copyright:	MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#define LUBBOCK_FPGA_PHYS	PXA_CS2_PHYS
+#define LUBBOCK_FPGA_VIRT	(0xf0000000)	/* phys 0x08000000 */
+#define LUBBOCK_ETH_BASE	(0xf1000000)	/* phys 0x0c000000 */
+#define LUBBOCK_SA1111_BASE	(0xf4000000)	/* phys 0x10000000 */
+
+#define LUB_P2V(x)		((x) - LUBBOCK_FPGA_PHYS + LUBBOCK_FPGA_VIRT)
+#define LUB_V2P(x)		((x) - LUBBOCK_FPGA_VIRT + LUBBOCK_FPGA_PHYS)
+
+#ifndef __ASSEMBLY__
+#  define __LUB_REG(x)		(*((volatile unsigned long *)LUB_P2V(x)))
+#else
+#  define __LUB_REG(x)		LUB_P2V(x)
+#endif
+
+/* board level registers in the CPLD: (offsets from CPLD_BASE) */
+
+#define WHOAMI			0	// card ID's (see programmers manual)
+#define HEX_LED			0x10	// R/W access to 8 7 segment displays
+#define DISC_BLNK_LED		0x40 	// R/W [15-8] enables for hex leds, [7-0] discrete LEDs
+#define CONF_SWITCHES		0x50	// RO [1] flash wrt prot, [0] 0= boot from rom, 1= flash
+#define USER_SWITCHES		0x60	// RO [15-8] dip switches, [7-0] 2 hex encoding switches
+#define MISC_WR			0x80	// R/W various system controls -see manual
+#define MISC_RD			0x90	// RO various system status bits -see manual
+//#define LUB_IRQ_MASK_EN		0xC0    // R/W 0= mask, 1= enable of TS, codec, ethernet, USB, SA1111, and card det. irq's
+//#define LUB_IRQ_SET_CLR		0xD0	// R/W 1= set, 0 = clear IRQ's from TS, codec, etc...
+//#define LUB_GP			0x100	// R/W [15-0] 16 bits of general purpose I/o for hacking
+
+
+/* FPGA register physical addresses */
+#define _LUB_WHOAMI		(LUBBOCK_FPGA_PHYS + 0x000)
+#define _LUB_HEXLED		(LUBBOCK_FPGA_PHYS + 0x010)
+#define _LUB_DISC_BLNK_LED	(LUBBOCK_FPGA_PHYS + 0x040)
+#define _LUB_CONF_SWITCHES	(LUBBOCK_FPGA_PHYS + 0x050)
+#define _LUB_USER_SWITCHES	(LUBBOCK_FPGA_PHYS + 0x060)
+#define _LUB_MISC_WR		(LUBBOCK_FPGA_PHYS + 0x080)
+#define _LUB_MISC_RD		(LUBBOCK_FPGA_PHYS + 0x090)
+#define _LUB_IRQ_MASK_EN	(LUBBOCK_FPGA_PHYS + 0x0C0)
+#define _LUB_IRQ_SET_CLR	(LUBBOCK_FPGA_PHYS + 0x0D0)
+#define _LUB_GP			(LUBBOCK_FPGA_PHYS + 0x100)
+
+/* FPGA register virtual addresses */
+#define LUB_WHOAMI		__LUB_REG(_LUB_WHOAMI)
+#define LUB_HEXLED		__LUB_REG(_LUB_HEXLED)
+#define LUB_DISC_BLNK_LED	__LUB_REG(_LUB_DISC_BLNK_LED)
+#define LUB_CONF_SWITCHES	__LUB_REG(_LUB_CONF_SWITCHES)
+#define LUB_USER_SWITCHES	__LUB_REG(_LUB_USER_SWITCHES)
+#define LUB_MISC_WR		__LUB_REG(_LUB_MISC_WR)
+#define LUB_MISC_RD		__LUB_REG(_LUB_MISC_RD)
+#define LUB_IRQ_MASK_EN		__LUB_REG(_LUB_IRQ_MASK_EN)
+#define LUB_IRQ_SET_CLR		__LUB_REG(_LUB_IRQ_SET_CLR)
+#define LUB_GP			__LUB_REG(_LUB_GP)
+
+/* GPIOs */
+
+#define GPIO_LUBBOCK_IRQ	0
+#define IRQ_GPIO_LUBBOCK_IRQ	IRQ_GPIO0
+
+
+/*
+ * LED macros
+ */
+
+#define LEDS_BASE LUB_DISC_BLNK_LED
+
+// 8 discrete leds available for general use:
+
+#define D28	0x1
+#define D27	0x2
+#define D26	0x4
+#define D25	0x8
+#define D24	0x10
+#define D23	0x20
+#define D22	0x40
+#define D21	0x80
+
+/* Note: bits [15-8] are used to enable/blank the 8 7 segment hex displays so
+*  be sure to not monkey with them here.
+*/
+
+#define HEARTBEAT_LED	D28
+#define SYS_BUSY_LED    D27
+#define HEXLEDS_BASE LUB_HEXLED
+
+#define HEARTBEAT_LED_ON  (LEDS_BASE &= ~HEARTBEAT_LED)
+#define HEARTBEAT_LED_OFF (LEDS_BASE |= HEARTBEAT_LED)
+#define SYS_BUSY_LED_OFF  (LEDS_BASE |= SYS_BUSY_LED)
+#define SYS_BUSY_LED_ON   (LEDS_BASE &= ~SYS_BUSY_LED)
+
+// use x = D26-D21 for these, please...
+#define DISCRETE_LED_ON(x) (LEDS_BASE &= ~(x))
+#define DISCRETE_LED_OFF(x) (LEDS_BASE |= (x))
+
+#ifndef __ASSEMBLY__
+
+//extern int hexled_val = 0;
+
+#endif
+
+#define BUMP_COUNTER (HEXLEDS_BASE = hexled_val++)
+#define DEC_COUNTER (HEXLEDS_BASE = hexled_val--)

include/asm-arm/arch-pxa/memory.h

+/*
+ *  linux/include/asm-arm/arch-pxa/memory.h
+ *
+ * Author:	Nicolas Pitre
+ * Copyright:	(C) 2001 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+
+/*
+ * Task size: 3GB
+ */
+#define TASK_SIZE	(0xc0000000UL)
+#define TASK_SIZE_26	(0x04000000UL)
+
+/*
+ * This decides where the kernel will search for a free chunk of vm
+ * space during mmap's.
+ */
+#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
+
+/*
+ * Page offset: 3GB
+ */
+#define PAGE_OFFSET	(0xc0000000UL)
+
+/*
+ * Physical DRAM offset.
+ */
+#define PHYS_OFFSET	(0xa0000000UL)
+#define PHYS_TO_NID(addr)	(0)
+
+/*
+ * physical vs virtual ram conversion
+ */
+#define __virt_to_phys__is_a_macro
+#define __phys_to_virt__is_a_macro
+#define __virt_to_phys(x)	((x) - PAGE_OFFSET + PHYS_OFFSET)
+#define __phys_to_virt(x)	((x) - PHYS_OFFSET + PAGE_OFFSET)
+
+/*
+ * Virtual view <-> DMA view memory address translations
+ * virt_to_bus: Used to translate the virtual address to an
+ *		address suitable to be passed to set_dma_addr
+ * bus_to_virt: Used to convert an address for DMA operations
+ *		to an address that the kernel can use.
+ */
+#define __virt_to_bus__is_a_macro
+#define __bus_to_virt__is_a_macro
+#define __virt_to_bus(x)	 __virt_to_phys(x)
+#define __bus_to_virt(x)	 __phys_to_virt(x)
+
+#endif

include/asm-arm/arch-pxa/param.h

+/*
+ *  linux/include/asm-arm/arch-pxa/param.h
+ */

include/asm-arm/arch-pxa/serial.h

+/*
+ *  linux/include/asm-arm/arch-pxa/serial.h
+ *
+ * Author:	Nicolas Pitre
+ * Copyright:	(C) 2001 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+
+#define BAUD_BASE	921600
+
+/* Standard COM flags */
+#define STD_COM_FLAGS (ASYNC_SKIP_TEST)
+
+#define RS_TABLE_SIZE	5
+
+#define STD_SERIAL_PORT_DEFNS	\
+	{	\
+		type:			PORT_PXA,	\
+		xmit_fifo_size:		64,		\
+		baud_base:		BAUD_BASE,	\
+		iomem_base:		&FFUART,	\
+		iomem_reg_shift:	2,		\
+		io_type:		SERIAL_IO_MEM,	\
+		irq:			IRQ_FFUART,	\
+		flags:			STD_COM_FLAGS,	\
+	}, {	\
+		type:			PORT_PXA,	\
+		xmit_fifo_size:		64,		\
+		baud_base:		BAUD_BASE,	\
+		iomem_base:		&STUART,	\
+		iomem_reg_shift:	2,		\
+		io_type:		SERIAL_IO_MEM,	\
+		irq:			IRQ_STUART,	\
+		flags:			STD_COM_FLAGS,	\
+	}, {	\
+		type:			PORT_PXA,	\
+		xmit_fifo_size:		64,		\
+		baud_base:		BAUD_BASE,	\
+		iomem_base:		&BTUART,	\
+		iomem_reg_shift:	2,		\
+		io_type:		SERIAL_IO_MEM,	\
+		irq:			IRQ_BTUART,	\
+		flags:			STD_COM_FLAGS,	\
+	}
+
+#define EXTRA_SERIAL_PORT_DEFNS
+

include/asm-arm/arch-pxa/system.h

+/*
+ * linux/include/asm-arm/arch-pxa/system.h
+ *
+ * Author:	Nicolas Pitre
+ * Created:	Jun 15, 2001
+ * Copyright:	MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "hardware.h"
+
+static inline void arch_idle(void)
+{
+	if (!hlt_counter) {
+		int flags;
+		local_irq_save(flags);
+		if(!need_resched())
+			cpu_do_idle(0);
+		local_irq_restore(flags);
+	}
+}
+
+
+static inline void arch_reset(char mode)
+{
+	if (mode == 's') {
+		/* Jump into ROM at address 0 */
+		cpu_reset(0);
+	} else {
+		/* Initialize the watchdog and let it fire */
+		OWER = OWER_WME;
+		OSSR = OSSR_M3;
+		OSMR3 = OSCR + 36864;	/* ... in 10 ms */
+	}
+}
+

include/asm-arm/arch-pxa/time.h

+/*
+ * linux/include/asm-arm/arch-pxa/time.h
+ *
+ * Author:	Nicolas Pitre
+ * Created:	Jun 15, 2001
+ * Copyright:	MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+
+static inline unsigned long pxa_get_rtc_time(void)
+{
+	return RCNR;
+}
+
+static int pxa_set_rtc(void)
+{
+	unsigned long current_time = xtime.tv_sec;
+
+	if (RTSR & RTSR_ALE) {
+		/* make sure not to forward the clock over an alarm */
+		unsigned long alarm = RTAR;
+		if (current_time >= alarm && alarm >= RCNR)
+			return -ERESTARTSYS;
+	}
+	RCNR = current_time;
+	return 0;
+}
+
+/* IRQs are disabled before entering here from do_gettimeofday() */
+static unsigned long pxa_gettimeoffset (void)
+{
+	unsigned long ticks_to_match, elapsed, usec;
+
+	/* Get ticks before next timer match */
+	ticks_to_match = OSMR0 - OSCR;
+
+	/* We need elapsed ticks since last match */
+	elapsed = LATCH - ticks_to_match;
+
+	/* Now convert them to usec */
+	usec = (unsigned long)(elapsed*tick)/LATCH;
+
+	return usec;
+}
+
+static void pxa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+	long flags;
+	int next_match;
+
+	/* Loop until we get ahead of the free running timer.
+	 * This ensures an exact clock tick count and time acuracy.
+	 * IRQs are disabled inside the loop to ensure coherence between
+	 * lost_ticks (updated in do_timer()) and the match reg value, so we
+	 * can use do_gettimeofday() from interrupt handlers.
+	 */
+	do {
+		do_leds();
+		do_set_rtc();
+		local_irq_save( flags );
+		do_timer(regs);
+		OSSR = OSSR_M0;  /* Clear match on timer 0 */
+		next_match = (OSMR0 += LATCH);
+		local_irq_restore( flags );
+	} while( (signed long)(next_match - OSCR) <= 0 );
+}
+
+void __init time_init(void)
+{
+	gettimeoffset = pxa_gettimeoffset;
+	set_rtc = pxa_set_rtc;
+	xtime.tv_sec = pxa_get_rtc_time();
+	timer_irq.handler = pxa_timer_interrupt;
+	OSMR0 = 0;		/* set initial match at 0 */
+	OSSR = 0xf;		/* clear status on all timers */
+	setup_irq(IRQ_OST0, &timer_irq);
+	OIER |= OIER_E0;	/* enable match on timer 0 to cause interrupts */
+	OSCR = 0;		/* initialize free-running timer, force first match */
+}
+

include/asm-arm/arch-pxa/timex.h

+/*
+ * linux/include/asm-arm/arch-pxa/timex.h
+ *
+ * Author:	Nicolas Pitre
+ * Created:	Jun 15, 2001
+ * Copyright:	MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * PXA250/210 timer
+ */
+#define CLOCK_TICK_RATE		3686400
+#define CLOCK_TICK_FACTOR	80

include/asm-arm/arch-pxa/uncompress.h

+/*
+ * linux/include/asm-arm/arch-pxa/uncompress.h
+ *
+ * Author:	Nicolas Pitre
+ * Copyright:	(C) 2001 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#define FFUART		((volatile unsigned long *)0x40100000)
+#define BTUART		((volatile unsigned long *)0x40200000)
+#define STUART		((volatile unsigned long *)0x40700000)
+
+#define UART		FFUART
+
+
+static __inline__ void putc(char c)
+{
+	while (!(UART[5] & 0x20));
+	UART[0] = c;
+}
+
+/*
+ * This does not append a newline
+ */
+static void puts(const char *s)
+{
+	while (*s) {
+		putc(*s);
+		if (*s == '\n')
+			putc('\r');
+		s++;
+	}
+}
+
+/*
+ * nothing to do
+ */
+#define arch_decomp_setup()
+#define arch_decomp_wdog()

include/asm-arm/arch-pxa/vmalloc.h

+/*
+ * linux/include/asm-arm/arch-pxa/vmalloc.h
+ *
+ * Author:	Nicolas Pitre
+ * Copyright:	(C) 2001 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * Just any arbitrary offset to the start of the vmalloc VM area: the
+ * current 8MB value just means that there will be a 8MB "hole" after the
+ * physical memory until the kernel virtual memory starts.  That means that
+ * any out-of-bounds memory accesses will hopefully be caught.
+ * The vmalloc() routines leaves a hole of 4kB between each vmalloced
+ * area for the same reason. ;)
+ */
+#define VMALLOC_OFFSET	  (8*1024*1024)
+#define VMALLOC_START	  (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
+#define VMALLOC_VMADDR(x) ((unsigned long)(x))
+#define VMALLOC_END       (0xe8000000)