Commit e91f41ef authored by Piotr Sawicki's avatar Piotr Sawicki Committed by Dan Williams

isci: merge port ready substates into primary state machine

This conversion was complicated by the fact that the ready state exit routine
took unconditional action beyond just stopping the substate machine (like in
previous conversions).  In order to ensure identical behaviour every state
transition needs to be instrumented to catch ready-->!ready transitions and
execute scic_sds_port_invalidate_dummy_remote_node()
Reported-by: default avatarChristoph Hellwig <hch@lst.de>
Signed-off-by: default avatarPiotr Sawicki <piotr.sawicki@intel.com>
[fix ready state exit handling]
Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
parent c777c26c
This diff is collapsed.
......@@ -81,12 +81,13 @@ enum isci_status {
* The core port object provides the the abstraction for an SCU port.
*/
struct scic_sds_port {
/**
* This field contains the information for the base port state machine.
*/
struct sci_base_state_machine state_machine;
bool ready_exit;
/**
* This field is the port index that is reported to the SCI USER.
* This allows the actual hardware physical port to change without
......@@ -150,11 +151,6 @@ struct scic_sds_port {
*/
struct scic_sds_port_state_handler *state_handlers;
/**
* This field is the ready substate machine for the port.
*/
struct sci_base_state_machine ready_substate_machine;
/* / Memory mapped hardware register space */
/**
......@@ -175,7 +171,6 @@ struct scic_sds_port {
* This field is the VIIT register space for ths port object.
*/
struct scu_viit_entry __iomem *viit_registers;
};
......@@ -228,35 +223,6 @@ struct scic_port_properties {
u32 phy_mask;
};
/**
* enum SCIC_SDS_PORT_READY_SUBSTATES -
*
* This enumeration depicts all of the states for the core port ready substate
* machine.
*/
enum scic_sds_port_ready_substates {
/**
* The substate where the port is started and ready but has no
* active phys.
*/
SCIC_SDS_PORT_READY_SUBSTATE_WAITING,
/**
* The substate where the port is started and ready and there is
* at least one phy operational.
*/
SCIC_SDS_PORT_READY_SUBSTATE_OPERATIONAL,
/**
* The substate where the port is started and there was an
* add/remove phy event. This state is only used in Automatic
* Port Configuration Mode (APC)
*/
SCIC_SDS_PORT_READY_SUBSTATE_CONFIGURING,
SCIC_SDS_PORT_READY_MAX_SUBSTATES
};
/**
* enum scic_sds_port_states - This enumeration depicts all the states for the
* common port state machine.
......@@ -286,6 +252,25 @@ enum scic_sds_port_states {
*/
SCI_BASE_PORT_STATE_READY,
/**
* The substate where the port is started and ready but has no
* active phys.
*/
SCIC_SDS_PORT_READY_SUBSTATE_WAITING,
/**
* The substate where the port is started and ready and there is
* at least one phy operational.
*/
SCIC_SDS_PORT_READY_SUBSTATE_OPERATIONAL,
/**
* The substate where the port is started and there was an
* add/remove phy event. This state is only used in Automatic
* Port Configuration Mode (APC)
*/
SCIC_SDS_PORT_READY_SUBSTATE_CONFIGURING,
/**
* This state indicates the port is in the process of performing a hard
* reset. Thus, the user is unable to perform IO operations on this
......
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