Commit e9b1bfa5 authored by Dillon Varone's avatar Dillon Varone Committed by Alex Deucher

drm/amd/display: Select correct DTO source

[WHY&HOW]
Change criteria for setting DTO source value, and always set it regardless of
the signal type.
Reviewed-by: default avatarAriel Bernstein <Eric.Bernstein@amd.com>
Acked-by: default avatarPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: default avatarDillon Varone <dillon.varone@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 34d292d5
...@@ -985,7 +985,7 @@ static bool dcn31_program_pix_clk( ...@@ -985,7 +985,7 @@ static bool dcn31_program_pix_clk(
struct bp_pixel_clock_parameters bp_pc_params = {0}; struct bp_pixel_clock_parameters bp_pc_params = {0};
enum transmitter_color_depth bp_pc_colour_depth = TRANSMITTER_COLOR_DEPTH_24; enum transmitter_color_depth bp_pc_colour_depth = TRANSMITTER_COLOR_DEPTH_24;
// For these signal types Driver to program DP_DTO without calling VBIOS Command table // For these signal types Driver to program DP_DTO without calling VBIOS Command table
if (dc_is_dp_signal(pix_clk_params->signal_type)) { if (dc_is_dp_signal(pix_clk_params->signal_type) || dc_is_virtual_signal(pix_clk_params->signal_type)) {
if (e) { if (e) {
/* Set DTO values: phase = target clock, modulo = reference clock*/ /* Set DTO values: phase = target clock, modulo = reference clock*/
REG_WRITE(PHASE[inst], e->target_pixel_rate_khz * e->mult_factor); REG_WRITE(PHASE[inst], e->target_pixel_rate_khz * e->mult_factor);
......
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